A Novel Design of Single Branch Wideband Rectifier for Low-Power Application

This paper proposes a novel design of single branch wideband rectifier working at low input power level. Both the impedance tuning part and a dual-band matching network are adopted for wideband impedance matching. Theoretical analysis of the proposed wideband rectifier is presented and its closed-form design equations are derived. As an illustrated example, a wideband rectifier is designed and fabricated. Experimental results show that the fabricated rectifier features wide operated fractional bandwidth of more than 50%, low input power level from –5.0 dBm to 5 dBm, as well as a simple circuit structure and design procedure.


Introduction
With the rapid increase of ambient wireless power density, wireless energy harvesting provides an attractive solution to supply low-power electronic devices for wireless sensor network, the internet of things, and low power consumer electronics applications [1]. High-efficiency rectifiers are crucial for realizing a large amount of dc output power in above devices [2], [3]. Since the environment contains substantial signal power spread over a wide frequency spectrum, the multiband or wideband rectifier, which can harvest the ambient RF power at multiple frequencies simultaneously, features higher RF-DC conversion compared with a single narrow band rectifier.
By connecting several rectifying branches in parallel, multiband rectifiers are implemented in [4], [5] while each operates in a narrow band. In order to simplify the circuit structure, each rectifying branch can realize impedance matching at more than one frequency band by using multi-band impedance matching network in [6], [7]. However, these designs all require multiple rectifying branches, leading to a relatively complex design process and high manufacturing cost.
Using voltage doubling circuit topology, a wideband rectifier with broad bandwidth from 4.0 to 6.3 GHz and wide input power range from 4 to 20 dBm is implemented in [8]. To extend the operation bandwidth, a novel matching network is presented in [9] through three-step impedance manipulating a fractional bandwidth of 44.9% is obtained with the minimum input level of 3 dBm. For low input power level application, an impedance matching network with operated band from 0.45 to 0.9 GHz is presented in [10] based on a shunt and series LC bandpass matching topology, and the efficiency increases linearly with the input power from -30 to 0 dBm.

Wideband Rectifier Design
The proposed wideband rectifier as shown in Fig. 1 is composed of a full-wave voltage doubler rectifying circuit (C1, C2, D1 and D2), the presented WIMN (including Part I, Part II) and a resistive load R L . It is worth pointing out that the WIMN is the key to realize a broadband rectifier and we will give its design process in detail.

Voltage Doubler Rectifying Circuit
The full-wave voltage doubler rectifying circuit converts RF power to DC power. The load R L is placed at the output port for collecting the DC power. The diodes D1 and D2 of the rectifying circuit are chosen as SMS7630 from Skyworks due to their low threshold voltage which makes them suitable for low power application. The two chip capacitors C1 and C2 are properly selected to ensure that the AC energy is fully stored during rectification.

Design of Part I in WIMN
The Part I composed of an inductor L1 and a transmission line TL1 is used to tune the input impedance Z m . The introduction of L1 is to balance the input impedance Z in and make it maintain a constant slope over the whole operated frequency band. The design principle of L1 is to shift the natural resonant frequency of the original rectifying circuit to a lower frequency away from the operated frequency band. To meet the condition of impedance matching in the following Part II, we could make the real part of Z m remain stable while the imaginary part of Z m to be odd symmetry about the center frequency of the expected bandwidth. This means the impedance Z m at the starting frequency and ending frequency of the operation bandwidth is conjugated.
To solve the characteristic impedance Z 1 and electric length θ 1 of TL1, we choose the starting frequency f 1 and ending frequency f 2 of the expected frequency band as the first pair of frequencies. The input impedances Z in are assumed as Z in1 = R in1 + jX in1 at f 1 and Z in2 = R in2 + jX in2 at f 2 respectively. According to the transmission line theory, the impedance Z m at f 1 and f 2 can be expressed as: The relationship between f 1 and f 2 is defined as p = f 2 /f 1 (p ≥ 1). If we make the impedance Z m to be conjugated at f 1 and f 2 : Then the characteristic impedance Z 1 and electric length θ 1 can be calculated from (1) -(3) as:

Design of Part II in WIMN
The Part II consists of two transmission lines (TL2, TL3) with different parameters ((Z 2 , θ 2 ), (Z 3 , θ 3 )). The dual-band matching network is employed for the second pair of frequencies (f 3 , f 4 ), which are also symmetrical to the center frequency f 0 = f 1 /2 + f 2 /2. The initial value of f 3 is typically set as (f 1 /2 + f 0 /2), while the initial value of f 4 is chosen as (f 0 /2 + f 2 /2). Considering the bandwidth of each passband and the coupling between them, the final value of f 3 , f 4 can be further obtained by optimization with the aid of advanced design system (ADS) software.
Using the impedance tuning result in Part I, the input impedance Z m at f 3 and f 4 can be expressed as: Suppose that the source impedance Z A is a real impedance, the electrical length θ 2 and θ 3 can be obtained as [15] where k = f 4 /f 3 (k ≥ 1).
The value of Z 2 can then be solved by the following quartic equation: 4 3 2 Choosing a positive real value in the four solutions of Z 2 , the value of Z 3 can be further obtained by one of the following two equations: Thus, we can obtain the parameters of the TL2 and TL3 from (7) -(9).

Experimental Results
A wideband rectifier is designed based on the above design rule with the operated frequency band from 1.7 GHz to 2.5 GHz. Firstly, the center frequency of the expected band is chosen as 2.1 GHz, and the first pair of frequencies f 1 , f 2 are selected as 1.7 GHz and 2.5 GHz. The capacitor C1 and C2 are both selected as 100 nF, and the load R L is chosen as 1 kΩ for our application scenario. The simulated result of input impedance Z in with different inductor value L1 at the input power of -5.0 dBm is shown in Fig. 2. It can be observed that the real and imaginary part of Z in change greatly when L1 increases to 10 nH. However, when L1 is above 30 nH, the variation of real and imaginary part as L1 changes can be neglected.
As the value of L1 increases from 0 nH to 200 nH, for the operated frequency band from 1.7 GHz to 2.5 GHz, the real part fluctuation of the input impedance Z in decreases from 16.8 Ω to 10.4 Ω while the imaginary part fluctuation varies from -j·64.6 Ω to -j·50.8 Ω. Therefore, the variation of input impedance is greatly reduced and a smaller slope of the input impedance Z in with frequency is achieved, which is helpful for broadband impedance matching. It is worth noting that for the operated band of this designed rectifier, the load impedance of D2 may be dominated by R L due to the introduced L1, leading to an increased AC component which will be discussed in the following. The final value of L1 is chosen as 200 nH in this design.
We could further obtain the input impedance Z in1 = (52.2 -j·102. 6) Ω and Z in2 = (41. 8 -j·51.9) Ω respectively at an input power level of -5 dBm. According to (4), (5), the characteristic impedance Z 1 and electrical length θ 1 are calculated to be 175.9 Ω and 52.9° correspondingly at f 1 . Figure 3 depicts the curve of input impedance Z m over the whole expected frequency band at different input power levels. It is demonstrated that through the use of Part1, the real part of Z m remains stable and the imaginary part is odd symmetrical to the center frequency f 0 = 2.1 GHz.
Secondly, the second pair of frequencies f 3 , f 4 is selected as 1.8 GHz and 2.4 GHz respectively and the impedance Z A is selected as 50 Ω. Thus, we can obtain the Z m (f 3 ) = (40.8 -j·20.0) Ω, Z m (f 4 ) = (39.9 + j·32.7) Ω at the input power level of -5 dBm. R m2 , X m2 are taken as the average value of real part and imaginary part of Z m (f 3 ) and Z m (f 4 ) respectively, which are 40.4 Ω and -j·26.4 Ω respectively. According to (7), (8), the characteristic impedance Z 2 and electric length θ 2 = θ 3 are calculated to be 25.3 Ω and 77.1° at 1.8 GHz respectively. The characteristic impedance Z 3 is calculated to be 29.2 Ω by using (9). Finally, the above initial parameters are optimized by ADS software and the layout of the proposed rectifier is shown in Fig. 4. The capacitance model from Murata [16] and the inductance model from Coilcraft [17] are employed during the optimization process.    The final optimized values of the fabricated rectifier are the following: w0 = 1.0 mm, w1 = 0.5 mm, w2 = 8.6 mm, w3 = 7.7 mm, w4 = 0.5 mm, b1 = 9.8 mm, b2 = b3 = 26.0 mm, b4 = 8.6 mm, L1 = 200 nH. The simulated reflection coefficient of the rectifier is shown in Fig. 5, where the frequency band with |S 11 | below -10 dB is from 1.5 GHz to 2.5 GHz at the input power level from -5 dBm to 5 dBm. For comparison, the simulated reflection coefficient result in the case of the removed inductor L1 is also given in Fig. 5. It can be clearly found that the rectifier with L1 has better broadband impedance matching and wider operated bandwidth.
The above designed wideband rectifier is manufactured and Figure 6 shows the photograph of the final fabricated rectifier. The employed substrate is TANOIC TLY-5 with the thickness of 1.575 mm, relative dielectric constant of 2.2, and loss tangent of 0.0009. The package size of the employed load R L is 1206 (3.2 mm × 1.6 mm) and the pack-    Figure 7 shows the measured and simulated reflection coefficient |S 11 | and efficiency versus frequency at the input power of -5 dBm. It is seen that the measured |S 11 | is better than -10 dB from 1.3 GHz to 2.3 GHz, featuring a fractional frequency bandwidth of 55.6%. We could find that a small frequency shift exists between the measured and the simulated reflection coefficient results, which may result from the model discrepancy between simulation and actual circuit.
The parasitic effect and fabrication error will cause an inconsistency between the actual Z in and the designed value (Z in1 and Z in2 ). Thus, the actual frequency pair which meets the conjugated impedance Z m condition in Part I deviates from the originally designed frequency pair f 1 and f 2 . When applying the dual-band matching network in Part II, the optimum impedance matching frequency is shifted from the original designed frequency. Moreover, the wideband impedance matching performance is slightly deteriorated due to the frequency shift.
By slighty tuning the parameters of three transmission lines (TL1, TL2, TL3), the above frequency shift can be corrected with the modified simulation result added in Fig. 7. In this case, the length b1 changes from 9.8 mm to 12.1 mm, the width w2 changes from 8.6 mm to 8.9 mm and the width w3 changes from 7.7 mm to 7.2 mm. We could find that a better agreement between simulation and measurement results is obtained and the frequency shift is corrected.
The RF-DC conversion efficiency of the rectifier can be expressed as [6] DC DC where P DC is the output power in dc, P RF is the input RF power to the rectifier, V DC is the output voltage. The RF signal generator (Agilent E8257D) is used to feed the proposed rectifier and the measurement setup is depicted in Fig. 8. By changing the input power and frequency, the dc voltage is measured by voltage meter. Figure 9 shows the measured RF-DC conversion efficiency versus frequency at different input power levels for the fabricated rectifier. When the input power varies from   0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6  -5 to 5 dBm, the power conversion efficiency is higher than 30% from 1.3-2.3 GHz, which reveals a broadband performance of the rectifier. As the input power increases up to 5 dBm, the conversion efficiency is higher than 50% from 1.3-2.2 GHz. Therefore, the rectifier can achieve high efficiency within a broad frequency band at low input power density.
The simulated and measured conversion efficiency with different input power level at 1.6 GHz is depicted in Fig. 10, where the measured results agree well with the simulated ones. When the input power level is decreased from 5 dBm to -15 dBm, the efficiency is reduced from 57.6% to 16.3% due to the nonlinearity of the rectifier. To further evaluate the load impedance on the conversion efficiency, the circuit simulation for different loads at the low input power level of -5.0 dBm is conducted with the simulated result plotted in Fig. 11. We can find that when the load impedance R L is below 2.0 kΩ, the average efficiency in the operated frequency band increases as the load R L becomes larger. As the load R L is up to 4.0 kΩ, a slight reduction of the average efficiency occurs.
Since the real high-frequency load resistance R L has apparently low parasitic capacitance, we further investigate the parasitic capacitance effect on the performance of the proposed rectifier. The simulated reflection coefficient and conversion efficiency results at the input power of -5 dBm are shown in Fig. 12 and Fig. 13 respectively. It can be observed that in Fig. 12, when the parasitic capacitance of R L increases, two resonant frequencies in the reflection coefficient are closer, leading to a slight reduction of operation bandwidth. When the parasitic capacitance increases up to 50 pF, the reduction of upper operated frequency with |S 11 | below -10 dB is 100 MHz while the lower operated frequency almost remains the same. Moreover, the frequency band for power conversion efficiency higher than 30% is changed from 1.44-2.64 GHz to 1.34-2.48 GHz. Compared with the case of no L1, the proposed rectifier with L1 features better impedance matching in the operated   I  II  III  I  II  III  I  II  frequency band even when the parasitic capacitance of load is up to 50 pF.
To analyze the effect of L1 on the influence of AC ripple, the high-order harmonics of the proposed rectifier are evaluated with the aid of ADS harmonic balance simulation. The harmonics simulation of three circuit models (model I, II and III) is conducted for comparison. The model III is the final circuit simulation model of the designed rectifier where both the actual parasitic effects of L1 (L1 = 200 nH) and C2 are considered. While in both model I and II, the inductor L1 is not introduced. In model I, the L1-C2 serial branch is replaced with an ideal lumped component C2 where no parasitic effect is considered. In model II, the actual parasitic effect of C2 is included.
The simulated DC and AC components of output voltage at three frequencies covering the operated frequency band are listed in Tab. 1 for the input power of -5 dBm. It can be seen that the AC component of model I for the three kinds of high-order harmonics is quite low. When the actual parasitic effect of C2 is introduced, the AC ripple of model II is largely increased especially for the 2nd harmonic, and the 1st harmonic at the higher frequency of 2.5 GHz is also increased greatly. When the actual parasitic effects of L1 (L1 = 200 nH) and C2 are both included, a big increase of the 1st harmonic occurs at 1.5 GHz and 2.0 GHz and a small increase occurs at 2.5 GHz compared with the results of model II. Moreover, a small reduction of the 2nd harmonic is observed. Thus, the introduction of L1 increases the AC component of the 1st harmonic for the proposed rectifier. In practical RF energy harvesting system, an additional low-pass filter can be employed to reduce the large AC output.
The comparison between our broadband rectifier and other related designs is shown in Tab out that the reported broadband rectifiers in Tab. 2 operate at various input power levels and frequency range for different application scenarios. As can be seen from this table, our design features a relatively wider bandwidth at the input power level around 5 dBm when compared with [8,9,14]. At lower input power level around -5 (-10) dBm, our design shows broader bandwidth at the expense of slightly decreased conversion efficiency when compared with [6]. References [12], [13] show higher conversion efficiency due to the increased input power level. Compared with these reported rectifiers, the proposed wideband rectifier has a single branch rectifier circuit, which features simple design complexity and concrete design rule. This will make it a great potential candidate for practical industrial applications.

Conclusion
A single branch wideband rectifier using a novel wideband impedance matching network is proposed in this paper and its design process is provided in detail. The design process is validated by the fabricated rectifier which shows a fractional bandwidth of 55.6% at the input level of 5 dBm. With a concrete design rule and simple circuit structure, the presented wideband rectifier has great potential of ambient wireless energy harvesting application. Going forward, our study is on the improvement of conversion efficiency at lower input level, the reduction of AC ripple and the combination of the proposed rectifier with the antenna to implement high-efficiency broadband rectenna.