FBMC Transmitters with Reduced Complexity

Filter Bank MultiCarrier (FBMC) modulation is currently considered as one of the key enablers for future 5G technologies. In the literature, two approaches are applied for the modulation of FBMC signals: Frequency Spreading (FS) and PolyPhase (PP) implementation. The complexity requirements of FBMC transmitters is considered to be one of the key research fields. In this paper various FBMC implementations are compared in terms of complexity and quantization error. An alternative design approach is suggested: the two full size Inverse Fast Fourier Transforms (IFFTs) in the standard PP can be replaced by two half size IFFTs taking advantage of real valued data processing. It is shown that the complexity of the design will be almost reduced by half. Furthermore, the proposed alternative method has the lowest quantization error among the investigated transmitter architectures, which is a key issue in hardware with low precision arithmetics.


Introduction
Orthogonal Frequency Division Multiplexing (OFDM) is the most prominent technology in wireless broadband communication.One of its major advantages is the design simplicity which benefits from Inverse Fast Fourier Transform (IFFT) as a modulator and FFT as a demodulator.Despite many advantages, OFDM suffers from several disadvantages like its spectral inefficiency caused by cyclic prefix which is considered as a waste of bandwidth.Currently, research areas are studying other alternatives to overcome the above mentioned deficiency in order to satisfy the ever increasing demand for throughput especially with the introduction of Internet of Things (IoT) and the expected increase in need for more services and applications.To achieve this goal and without losing the privilege of simple practical design, the researchers' focus has shifted to other technologies such as the Filter Bank MultiCarrier (FBMC) modulation scheme which can satisfy the previously mentioned spectral requirements with some additional signal processing [1].
FBMC is being strongly considered as the physical layer solution for 5G communication systems.The basic idea of FBMC is that the time-domain symbol duration is enlarged and filtering with a prototype filter is applied.In order to counteract the data rate loss due to the enlarged symbols, the symbols overlap in the frequency-and in the time-domain as well and as a result, the original data rate can be maintained.
Numerous approaches have addressed the efficient implementation of FBMC transmitters.A straightforward solution employing an enlarged IFFT with Frequency Spreading (FS) is presented in [2], which uses frequency-domain construction of the symbols.A significant complexity reduction can be achieved by using two IFFTs and two PolyPhase (PP) filter structures as shown in [3].Further reduction can be achieved by applying minor additional signal processing to enable the usage of only a single IFFT [4].Other design proposals also exist for reducing the complexity of FBMC transmitter such as [5], [6] where the number of operations is reduced but it requires modifications to the existing hardware blocks, e.g. the IFFT.Further methods for reducing the hardware requirements of the FBMC transmitter using doubled processing frequency can be found in [7], [8].
In this paper an alternative FBMC transmitter is introduced where half size IFFTs can be used.The complexity of the proposed scheme is almost equivalent to the one introduced in [4].The difference between the two architectures is that the new one provides two parallel routes for real and imaginary signal processing.The simulation results also show that the alternative architecture has the lowest quantization error among the currently presented implementations.This is advantageous because it is expected that numerous low level hardware -especially low cost sensors -will be heavily used in the IoT environment where the quantization error will play an important role.
The paper is organized as follows.Section 2 presents the FBMC modulation scheme and the currently available transmitter architectures.In Sec. 3 the proposed alternative FBMC transmitter with a reduced IFFT size is described.In Sec. 4, the expected number of operations -in terms of multiplications -for the proposed transmitter scheme is compared with that of the other schemes.Furthermore, Sec. 5 presents simulations of the quantization error for the described transmitter structures.Finally, Sec. 6 draws the conclusion.

FBMC Modulation Scheme
In this section the FBMC signal model is introduced.Later, three possible implementation solutions for the FBMC transmitter are discussed.

FBMC Signal Model
The FBMC modulation scheme is capable of transmitting N parallel streams -combined into one symbol -using Offset Qaudrature Amplitude Modulation (OQAM).The complex input stream C is split into real ( {C}) and imaginary ( {C}) parts, and they are transmitted with an offset of a half symbol duration N.Then, each stream is filtered by a prototype filter p 0 and modulated to a separate subcarrier frequency.The resulting discrete time-domain baseband FBMC signal can be expressed as: where j = √ −1 is the imaginary unit and C k [m] is the complex QAM value -taken from the complex modulation alphabet -in the m th symbol on the k th subcarrier with the frequency f k = 2π N k.Each subcarrier is additionally multiplied by a phase rotation factor Θ k = e j π 2 k in order to ensure the orthogonality between the neighboring subcarriers and the consecutive symbols.The filter bank implementation of (1) can be seen in Fig. 1.
The length L of the prototype filter chosen as an integer number of the signaling time: L = K N, where K is also interpreted as the overlapping factor.During this paper the prototype filter defined by [2] is used with an overlapping factor K = 4.The time-domain structure of the FBMC signal is shown in Fig. 2. It can be seen that the m th symbol is overlapping with the time-domain symbols with indices m−3, . . ., m+3.At a given time instant four symbols overlap in the resulting FBMC signal, which corresponds to the overlapping factor.Considering the OQAM, an offset of N/2 can be seen between the symbols generated from {C} and {C}.

FBMC Transmitter Schemes
In this section various implementation possibilities for the FBMC signal generation are discussed.The direct implementation based on Fig. 1 is inefficient.As a result, several alternatives for reducing complexity will be introduced as follows: FS implementation with enlarged IFFTs, complexity reduction possibility using two IFFTs and two PP filterbanks, and an implementation possibility with only one IFFT and two PP filterbanks.

Frequency Spreading Implementation
The scheme described in this section was introduced in [2], [10].The basic idea in this transmitter structure is to construct the transmitted symbols in the frequencydomain, and then convert them to the time-domain using enlarged IFFTs.
The real and imaginary data parts are extracted from the input data symbols C[m] and are treated separately where an IFFT of size K N is applied at each data part.The k th subcarrier is multiplied with the phase rotating factor Θ k and spread around the discrete frequency with the index kK.Each spread value is multiplied by the frequency-domain coefficients of the prototype filter P κ -where κ = 0, . . ., K − 1 -in a symmetric manner.P κ=0 is considered as unity.
The generating procedure for the partial FBMC signal x [n] when K = 4 is presented in Fig. 3.It can be seen that only the directly neighboring subcarriers overlap, but due to the phase rotation factors they alternatively switch between purely real and purely imaginary values.As a result, they can be separated without any interference from the other subcarriers.After creating the time-domain symbols a Parallel-to-Serial (P/S) conversion is performed and with the aid of a buffer the symbols are overlapped as presented in Fig. 2. The generation of the other partial FBMC signal x [n] can be performed in a similar manner using the corresponding Θ k+1 phase rotation factors and a time offset of N/2.Finally, the resulting FBMC signal can be expressed as: x The entire FBMC signal generation using FS can be seen in Fig. 5.

Polyphase Implementation
The FS implementation is inefficient due to the enlarged IFFT.A considerable amount of reduction can be achieved using PP filtering.The Z-Transform of the prototype filter can be calculated as: (3) Equation ( 3) can be represented in an N-band PP form as well, cosidering the fact that L = K N: where P 0,i z N is the i th PP decomposition of the prototype filter P 0 (z) and it can be expressed as: As shown in Fig. 1, the modulated transmitter filter p k for the k th subcarrier can be given as From ( 6) and using PP representation given in (3), the Z-transform of the k th filter p k [n] can be expressed as Considering W N = e j 2π N , (7) can be represented in the following matrix form . . .
which can be expanded as where the first vector represents the phase rotation which is multiplied element-wise ( ) with a matrix (W), which is the Inverse Discrete Fourier Transform (IDFT) matrix and the last one is an PP decomposition with the corresponding delays.The structure realizing ( 9) is shown in Fig. 4. Finally, the FBMC transmitter using two N-IFFT and PP filtering is presented in Fig. 6.

Polyphase Implementation with a Single N-IFFT
Further computational complexity reduction can be achieved by exploiting real valued data processing.This idea was presented in [4].The presented scheme can be seen in Fig. 7. Compared to the transmitter structure presented in Fig. 6, the basic concept is to move the phase rotation factor from the input to the output of the IFFT.The effect of multiplying the input sequence with the phase rotation factor Θ k = e j π 2 k can be considered -based on the frequency shift property of the IFFT -as an N/4 circular shift in the timedomain at the output of the IFFT.As a result a single IFFT can be applied, where the input signal -after replacing Θ k with a circular shift at the output -can be expressed as This way a single IFFT is applied for two input sequences simultaneously -one of them is considered as purely real and the other as purely imaginary.After performing the IFFT, the spectrum of the two input signals can be retrieved from the output signal using simple signal processing as presented in Appendix A. A detailed description of the separation can be found in [9].This way an IFFT can be spared compared to the previously presented transmitter scheme with the cost of some additional signal processing.As mentioned above, an N/4 circular shift is applied to the two outpout signals.The following blocks of the transmitter chain remain unaltered with PP filtering, P/S conversion and an N/2 delay compo-nent.This FBMC transmitter structure is especially useful for reconfiguring and extending existing OFDM transmitters.

FBMC Transmitter with Two N/2-IFFT Blocks
In this section an alternative structure is presented for reducing the complexity of FBMC signal generation by exploiting real valued data processing.In the proposed scheme the structure presented in Fig. 6 is modified so that two IFFT are used with size of N/2 instead of N. The extraction of the real and imaginary parts from the complex input C[m] remains unaltered.From the two real valued input symbols, two complex valued symbols with half length are formed as: After applying the N/2-IFFT to each sequence separately, data separation and expansion is performed to form the symbols with length N from the output symbols with length N/2.Detailed signal processing steps for calculating the N-IFFT of a real valued signal using N/2-IFFT are shown in Appendix B. A detailed description of the separation can be found in [9].Finally, -as shown in Sec.2.2.3 -the multiplication by the phase rotation factor Θ k in frequencydomain will be translated into N/4 circular shift in the timedomain at the output of the IFFT.The following signal processing blocks remain unaltered.The resulting architecture of the presented scheme is shown in Fig. 8.

Calculation Complexity
In this section the computational complexity for the four presented schemes is compared.The comparison is performed based on the number of real multiplications necessary to process input sequence of size N.The summary of the required number of multiplications is presented in Tab. 1.The required number of multiplications for FS and general PP implementation is taken from [3], [11] and the formulas for the two modified PP implementation solutions using a single N-IFFT and two N/2-IFFT are calculated based on the equations presented in Appendices A and B. The IFFT is considered to be implemented using Split Radix algorithm.The multiplication with ±j is considered negligible, furthermore for the last two methods it is replaced by a cyclic rotation of N/4.
The equations given in Tab. 1 are visualized in Fig. 9 for K = 4.As it can be seen, the FS method has the highest computational complexity.Using PP implementation with two N-IFFT, the required number of multiplications can be significantly reduced.A further reduction in complexity can be achieved using the implementation with a single N-IFFT.The complexity requirements for the proposed method using two N/2-IFFT is significantly lower than the FS and standard PP methods, but it is slightly higher than that of the PP implementation using single N-IFFT.However, its benefit is that it provides completely parallel processing routes for the real and imaginary data.

Simulation Results
In this section the simulation results are presented for the previously introduced four FBMC transmitter schemes.During the simulations the parameters presented in Tab.2 were used.
For comparison, the four FBMC transmitter schemes were implemented using 32-bit -single precision -floating point arithmetic, and as a reference a 64-bit -double precision -floating point FS based transmitter was used.The simulations were performed using MATLAB 2017b.The quantization error was calculated as the difference between the single precision and the reference FBMC signal with double precision: The simulation results are shown in Fig. 10.The histogram of the values of the quantization error is depicted together with their mean value µ and standard deviation σ for the four FBMC transmitter schemes.As it can be seen the largest error is produced by the single precision implementation of the FS architecture.This is mainly due to the enlarged IFFT size.The implementations using one and two N-IFFT have a relatively similar quantization error but lower than the quantization error of the FS scheme.The difference can be explained by the fact that in case of using two N-IFFTs the real or imaginary part of some inputs are unused, so the resulting quantization error is smaller.The smallest quantization error (lowest µ and σ) is produced by the alternative method using two N/2-IFFT.Furthermore, Fig. 11 shows the quantization error over the FBMC signal averaged in a moving window with a size of an FBMC symbol L = K N = 1024.It can be seen that the quantization error is relatively constant over the time-domain FBMC signal for all the implementations.The results also correspond with the conclusions derived from Fig. 10: the FS implementation has the highest quantization error.The error signal of the PP implementation using single IFFT is higher than that of the PP implementation using two IFFTs.The lowest error is produced by the proposed alternative FBMC transmitter implementation.

Conclusion
In this paper the most popular FBMC modulator architectures were described and compared.An alternative FBMC transmitter architecture was also presented based on the previous schemes.Using the proposed method, the IFFT size can be reduced by half with some additional signal processing.It was shown that the computational load of the proposed scheme is comparable with the currently known most efficient implementations.The additional advantage of the proposed alternative FBMC transmitter scheme is that -based on the simulation results -it has the lowest quantization error; this feature is significant in low cost hardware implementation where only reduced arithmetical complexity is available.

Symbol m- 1 (Fig. 2 .
Fig. 2. Signal structure of a time-domain FBMC signal with an overlapping factor of K = 4.

Fig. 3 .
Fig. 3. Creating an FBMC signal x [n] from the real part of the modulation values C[m] for K = 4.

Fig. 8 .
Fig. 8.The proposed alternative architecture for creating the FBMC signal using two N /2-IFFT and PP filtering.

Fig. 9 .
Fig. 9. Number of real multiplications for the different FBMC modulator schemes for K = 4 in the function of the number of subcarriers N .

Fig. 10 .
Fig. 10.Histogram of the quantization errors for the four FBMC transmitters.

Fig. 11 .
Fig. 11.Quantization error [n] averaged in a moving widow with length equal to the FBMC symbol size (L = 1024)