A CMOS Morlet Wavelet Generator

The design and characterization of a CMOS circuit for Morlet wavelet generation is introduced. With the proposed Morlet wavelet circuit, it is possible to reach a low power consumption, improve standard deviation (σ) control and also have a small form factor. A prototype in a double poly, three metal layers, 0.5μm CMOS process from MOSIS foundry was carried out in order to verify the functionality of the proposal. However, the design methodology can be extended to different CMOS processes. According to the performance exhibited by the circuit, may be useful in many different signal processing tasks such as nonlinear time-variant systems.


Introduction
Analog signal processing owes its importance to its strong presence in electronic systems, communications systems, measuring instruments and control equipment among others in which analog signal processing plays an important role.Some examples of analog signal processing include filtering, equalization, impedance matching and magnitude and phase modulation, to name a few.However, Fourier analysis does not provide information about the moment in which the frequency components occur.For that purpose, we use the wavelet transform, which supplies information about the instant when the frequency events appear.Wavelets are a powerful tool which can be used for a wide range of applications, such as: signal processing [1], data compression [2], smoothing and image denoising [3], fingerprint verification [4], among others [5][6][7][8][9][10][11][12].There are different types of wavelets, each one with different characteristics and specific applications.One of the simplest is the Haar wavelet, which is widely used for signal analysis using continuous or discrete transforms, and has only one vanishing moment [13].Another widely used wavelet in the signal analysis is the Mexican hat, whose name comes from the symmetrical shape of its graph.This wavelet is the second derivative of the Gaussian probability density function and has a linear phase response [14].Daubechies is another wavelet that is characterized by an order N depending on the desired number of vanishing moments, where N is a positive integer.The essential property of wavelets is the so-called compact support, which indicates if the wavelet is of finite duration.
There are several software tools for the analysis and implementation of wavelets (Fortran, IDL, Matlab and Python), however, they have a high consumption of resources in hardware.Instead, dedicated hardware can be used, which has the benefits of a lower consumption of resources and higher processing speed.This paper presents the design of a Morlet wavelet generator circuit which takes advantage of the MOS transistor operating in weak inversion where it has the necessary exponential behavior to generate the Gaussian shape.The resulting circuit is compact and exhibits ultra low power consumption.The paper is organized as follows: Section 2 presents a brief mathematical Morlet wavelet review; Sec. 3 introduces the proposed architecture for Morlet wave generation; Sec. 4 shows the realization of Morlet wavelet; Sec. 5 shows the reported experimental results; finally, conclusions are drawn in Sec. 6.

Morlet Wavelet
The wavelet transform is generated using dilatations and translations of the function ψ(t).These translation and dilation processes are defined as: where τ conducts the translation and a provides the dilation.The mother wavelet ψ * τ,a (t), can be a modulated function composed of two parts: The Morlet wavelet is constructed by modulating a sinusoidal signal by a Gaussian shape.Hence, it is not a finitetime function.However, the energy in this wavelet is confined to a finite interval.Only the real part of the function ψ * τ,a (t) is considered for non-stationary signal analysis.The real part of the Morlet wavelet is given by: From ( 3), three different blocks are required to build the Morlet wavelet: a Gaussian bell shape generator, a sinusoidal source, and a multiplier.In order to perform the multiplication and the sinusoidal signal generation, several topologies have proved to be functional and have enhanced performance [15][16][17][18].The block diagram realization for (3) is given in Fig. 1.Although the Gaussian generator is a very common function, there are scarce reports on this topic.Some relevant articles are considered: In [19] a Gaussian generator is proposed using switched current circuits with the disadvantage of using various control signals.In [20], the MOS-translinear principle is exploited.However, it results in a circuit too complex for implementation.Finally, [21] and [22] use a simple circuit which exploits the transistor weak inversion region, obtaining an acceptable performance.

MOS Transistor in Weak Inversion
The minimum voltage to operate an MOS transistor is determined by two parameters; the threshold voltage (V TH ) and the voltage applied between the gate and the source terminals (V GS ) of the transistors.To achieve low-voltage circuits, designers need to minimize these two parameters.The threshold voltage can be reduced by modifying the process (low threshold technologies are available at the expense of higher production cost), however, V TH is not a controllable parameter for integrated circuit designers [23].The other parameter that can be modified is the V GS voltage, reducing V GS below V TH the transistor operates in weak inversion region.The transistor weak inversion conditions are [24], [25]: In this region the transistor operates at low voltage and low power consumption and the drain current is given by: Lineal Fig. 2. Block diagram for the realization of a Gaussian function.where V DS is the drain-source voltage, V BS is the source-bulk voltage, V t is the thermal voltage kT/q and V o is the Early voltage.n is the slope factor, where normally n < 2 but becomes n ≈ 1 for high values of V GS .I DO is the current related to transconductance parameter K, and is defined by Neglecting the Early and body (V BS = 0) effects (5) becomes: In CMOS AMI 0.5 µm, typical values are: V THN = 0.7 V; V THP = 0.9 V; µ n C ox = 58.4µA/V 2 , n ≈ 1.With these technology values and the proposed transistor size W /L = 120 the expected current is:

Morlet Wavelet Realization
The operating principle of Gaussian circuit is described in [21], and the block design to realize the Gaussian function is shown in Fig. 2, where the input to the first block should be a triangular wave follow by a squaring block and an exponential circuit.The proposed circuit to generate a Gaussian function is show in Fig. 3.
In this circuit, the input signal is a triangular waveform, which is applied to a P-type transistor (M 5 ) operating in the saturation region.As a result, the drain current of M 5 is proportional to the square of the input voltage.Neglecting the channel modulation effect, the conditions in this operating region are [25]: The output current in M 5 is converted to voltage through transistor M 2 operating in the linear region, thereby the V D2 is proportional to squared v in .The conditions at the linear region are [25]: According to the previous equations, the equivalent resistance is: Note that voltage V b = V GS1,2 is used to bias the transistors M 1 and M 2 .I bias is set small enough to make transistors M 3 and M 4 work in weak inversion.Under this condition, we can express the currents in M 3 and M 4 as nV t e −V S4 nV t (13) where V G3 =V G4 , V S3 = I D3 • R DS1 .If we combine I D3 and I D4 and assuming that I D5 is greater than I D4 , which we can safely assume because M 5 operates in saturation and M 4 in weak inversion, I D4 is: The exponential current is inversely proportional to I D5 and R DS2 and the variance is controlled by V b .The design considerations for those transistors are low bias current (I bias ) and large dimensions.As shown in Sec. 2, the current has an exponential behavior in this region.The drain current of M 4 should be a Gaussian waveform, which is converted to voltage using resistor R G in order to have it available in the next stage.
In accordance to Fig. 1, the Gaussian function needs to be multiplied by a cosine function to generate a Morlet wavelet.For this reason, the next block is a four-quadrant multiplier based on Gilbert cell [26].The Gilbert cell is composed of six MOS transistors, which form three differential pairs operating in saturation, generating a differential output current [26].The schematic is shown in Fig. 4 [15].The four-quadrant multiplier output current is given by [26]: The term I y1 − I y2 is generated by the bottom differential pair [26]: where y is the bottom differential pair input and K 3 is its transconductance, therefore, the output current of the Gilbert multiplier is given by [26]: where K = µC ox W /L and x, y are the voltage inputs.Notice that the multiplier cell requires differential inputs.Figure 5 shows the circuit that modifies the Gaussian and sine waves into a differential signal in order to interconnect the gaussian circuit with the multiplier.

Experimental Results
A prototype of the CMOS circuit for a Morlet Wavelet generator was implemented in a double poly, three metal   layers, 0.5 µm ON Semiconductors CMOS technology from MOSIS foundry.The die photo is shown in Fig. 6.Since the Gaussian circuit uses transistors operating in weak-inversion, this block is suitable for low voltage and low power applications.In addition, the layout of the gaussian circuit is compact as it only uses five transistors requiring an area of 99 µm × 27 µm.This layout includes a current mirror with a ratio of 1 : (1/10) in order to facilitate the measurement of the circuit, and two single-to-differential converters blocks.Figure 7 shows the output voltage of the Gaussian circuit.In this figure, V b is swept from 0.5 V to 1.5 V, where the applied Finally, the four-quadrant multiplier allows us to multiply the Gaussian function and the sine wave, providing the Morlet wave shown in Fig. 8.In this particular case, the triangular function goes from 1.6 kHz to 10 kHz and the sinusoidal function runs at 60 kHz.

Conclusion
This paper presents the design of a Morlet wave generator based on a simple Gaussian circuit which is suitable for low-voltage, low-power applications.The design takes advantage of the various operating regions of the MOS transistor.A prototype of the proposal was implemented in a double poly, three metal layers, 0.5 µm in CMOS technology from MOSIS foundry.The prototype is compact with an active area of 205.95 µm × 192.45 µm.The results obtained in the characterization show that using the weak-inversion region of the MOS transistor is an appropriate option for attaining Gaussian functions with 10 µA.The total power consumption of the Morlet wavelets was 287 µA with ±1.5 V of the total power supply and can generate a Gaussian function at a maximum frequency of 673 kHz.The variation of σ is obtained with V b , which varies from −0.5 V to 1.5 V. Table 1 shows a comparison of circuits that generate Gaus-sian functions and Morlet wavelet.It can be seen that our proposal has fewer transistors with respect to other topologies, whereby a good form factor, smaller number of nodes whereby a wider bandwidth is achieved is obtained with lower power consumption.It can be concluded that the proposed Morlet wavelet generator has an acceptable performance in terms of power consumption, the frequency of operation and control of the standard deviation sigma.

Fig. 8 .
Fig. 8. Morlet output waveform of the prototype.triangular waveform has an amplitude of 500 mV at 10 kHz.Note that this characterization has been made by a voltagevoltage relation in order to obtain the Gaussian function and has no relation to the AC response of the circuit itself.
Performance and comparison among other approaches.