180 nm NMOS voltage-controlled oscillator for phase-locked loop applications

ABSTRACT


INTRODUCTION
The phase-locked loop (PLL) frequency synthesizers are one of the most important components of an integrated wireless transceiver system. PLLs are frequently used in wireless communication systems, digital signal processors, and microprocessors to synchronize the clock [1]. A Bluetooth transceiver's PLL must be able to supply frequencies from 2,400 to 2,480 MHz with channel spacing of 1 MHz. The performance of PLLs degrading mostly results from voltage-controlled oscillators (VCOs) excessive phase noise [2]. One of the most important components of every PLL is the VCO, which directly supplies the PLL's output signal [3]. VCOs provide the constant periodic signals needed for timing in digital circuits and frequency conversion in radio frequency circuits, which is a crucial and effective function for communication systems. The output frequency of the VCO depends on the control input, which is typically a voltage. An oscillator whose oscillation frequency is regulated by the input voltage is known as a VCO [4]. A VCO is in charge of producing a steady local oscillation (LO) signal. VCOs should typically have minimal phase noise, a wide frequency tuning range, and low power consumption [5]. Ring structures, relaxation circuits, or an LC resonant circuit can all be used to create CMOS VCOs.
Hadi et al. [6] provided an analysis of several delay cells for the ring oscillator, such as differential delay cells, starving current delay cells, and current follower cells. The findings indicated that compared to the other two types of delay cells, starved current delay cells consume less power and have a narrower frequency range. A VCO's performance is typically determined by its low phase noise, low voltage operation, low power consumption, high speed oscillation, small layout area, and wide tuning range. Among all VCOs, the LC-based VCO currently has the lowest level of phase noise. However, it has limits on the frequency  [7]. A monolithic microwave integrated circuit (MMIC) VCO based on the balanced Colpitts with good phase noise and a wide tuning range is proposed in [8]. VCO based on the negative resistance, phase noise, output power consumption, and a large tuning range is presented in [9]. The proposed VCO produces a sinusoidal signal in the frequency range of 480 MHz-1.4 GHz.
Research by Chavan and Aradhya [10] presents a hybrid strategy for creating a VCO that can improve tuning range, oscillation frequency, voltage swing, and power consumption. The common-source active load-based inverter and the current-starved inverter were the two separate delay element types used in this design. A 175 GHz VCO is proposed in [11] based on a differential Colpitts oscillator to produce low-phase noise with a broad tuning range. To avoid unfavorable phase noise degradation, the VCO uses 41.9 mA of the 1.6 V supply voltage, resulting in a total of 67 mW of power. The primary challenge in designing integrated LC oscillators is low phase noise, low power consumption, and low output harmonic level, which is a measure of the VCO energy at harmonics of the oscillation frequency. These harmonics are generated by the non-linear self-limiting of active devices in the VCO circuit [12]. This paper presents on designing and optimization a low power, low phase noise, and low power consumption of 180 nm VCO with improved the total harmonic distortion (THD), which is suitable for PLL and Bluetooth applications. PSpice simulation tool and figure of merit (FoM) have been used for overall optimized design of integrated VCOs.

NMOS VOLTAGE-CONTROLLED OSCILLATOR CIRCUIT TOPOLOGY
A VCO is an electronic oscillator created to generate oscillation frequency using a regulated input voltage. By applying a controlled voltage, the oscillation's frequency may be changed. The number of components needed to create and maintain oscillation should be kept to a minimum when building a low-phase-noise oscillator. An oscillator using an LC tank, also known as an LC-VCO, is an excellent candidate to oscillate at a higher frequency with less phase noise and less power consumption in comparison to a ring oscillator. Figure 1 shows the NMOS cross-coupled VCO with current source and with two PMOS varactors. It is made up of the cross-coupled differential pair formed by M1 and M2. The positive feedback loop from the transistors M1 and M2 are used to generate negative impedance [13], [14].
where gm is the transconductance of the transistor. The start-up condition of the oscillation states for the NMOS transconductance can be expressed as (2): where is the equivalent tank circuit conductance, ( = + ), is the inductor conductance, and is the varactor conductance. The conductance and are given as (3) and (4): The NMOS transistors M1 and M2 must be chosen for the same transconductance gm and considerable smaller than PMOS transistors. The PMOS transistors M3 and M4 represent the contrary connected varactors which controlled by a DC voltage supply. The transconductance is often designed to be roughly two times bigger than the needed amount in order to ensure that the VCO oscillation happens. Transconductance should be given, to determine the power consumption of the VCO which is calculated in (5) and (6): where Vth is the threshold voltage of the transistor and Cox is the oxide capacitance per unit area.

PHASE NOISE OF VOLTAGE-CONTROLLED OSCILLATOR
The key difficulty in building integrated LC oscillators is keeping the power consumption low while reducing phase noise. Typical design strategies have tried to achieve low phase noise by using inductors with the most significant possible quality factor (Q) values. The phase noise of VCO in dBc/Hz at an offset frequency of Δω can be accurately estimated in (7) [15]- [17]: Where 2 is the rms value of impulse sensitivity function and 2 = 0.5 for an ideal sinusoidal signal, is the maximum charge swing, ∆ω is the offset frequency from carrier, and 2 / is the sum of the current noise densities.

FREQUENCY TUNING
A tunable oscillator is essential for most wireless applications, meaning that its output frequency depends on a control input, often a voltage. The on-chip PMOS varactors are used to adjust the VCO's output frequency [18], [19]. The oscillation frequency is given as (8): is the tank inductance and is the tank capacitance, which is the sum of the varactor`s capacitance and parasitic capacitance.

FIGURE OF MERIT
Due to the large range of design parameters, technologies, and design criteria used in oscillators, it is challenging to compare their performance. The majority of oscillator designers often provide a FoM number for their particular design. Typically, FoM is utilized to fairly evaluate the entirety of performances with comparable previously published works [14], [20]. Most researchers are focused on the FoM expression used to achieve low phase noise at high frequencies and minimal power consumption. However, it is not sensitive to harmonic distortion. In this paper the FoM expression to optimize low phase noise at high frequency, low power consumption, and low THD is given as (9) Where { } is the single side band noise at an offset frequency in the 1 2 ⁄ region of the phase noise spectrum, is the oscillator power consumption, and THD of the generated sinusoidal signal. Lower (more negative) FoM represents better VCO performance.

DESIGN AND OPTIMIZATION 180 NM NMOS VOLTAGE-CONTROLLED OSCILLATOR
The significant challenge in constructing integrated LC oscillators is reducing phase noise while keeping overall harmonic distortion and power consumption to a minimum. The drain current, transistor size, inductor, and varactor performance all affect the phase noise and power consumption. The selected variables for optimization of an integrated LC NMOS VCO are the inductor number of turns (n) and transistor channel width . The optimization criterion has the form as (10) [21]: The proposed VCO has been designed and optimized for standard = 180 CMOS technology with varying the transistor channel width and inductor turns number n=2, 3, and 4. The VCO optimization criteria were verified and simulated using MATLAB and PSpice. The circuits have been simulated at a 2 V supply voltage and varied the control voltage from 0.5 to 2.5 V to observe the change in the frequency bandwidth. The optimization result is shown in Table 1. The optimization results depicted by the phase noise dBc/Hz, power consumption Pcon, THD, and FoMdB. From Table 1, the minimum value of FoMdB corresponds to the best optimization solution of the VCO.  Figure 2 shows the effect of transistor channel width in the FoMdB when the inductor number of turns is constant, n=2. The best measure performance when FoMdB= −145.23 at = 150 . The effect of on phase noise when an inductor's number of turns is constant (n=2) is shown in Figure 3. However, Figure 4 represents the effect of FoMdB when is constant and the inductor turns number n has varied. It can be noted that the minimum value of n represents the optimum performance for VCO.

CONCLUSION
In this paper, optimization of the overall phase noise, power consumption, and THD for NMOS VCO in standard 180 nm CMOS technology has been presented. A wide range of frequencies has been obtained using MOS varactor technology when the voltage supply is varied from 0.6 to 2.5 V. The simulation results have measured a minimum FoMdB= −145.23 , phase noise L{∆ } = −130.45 dBc/Hz @ 1 MHz offset frequency from 2.4 GHz carrier, Pcon=21.1 , and THD=3.97%. A tuning range of about 120 MHz was obtained using MOS varactors.