EURASIP Journal on Applied Signal Processing 2005:3, 455–461 c ○ 2005 Hindawi Publishing Corporation An Analog Correlator for Ultra-Wideband Receivers

We present a new analog circuit exhibiting high bandwidth and low distortion, specially designed for signal correlation in an ultra-wideband receiver front end. The ultra-wideband short impulse signals are correlated with a local pulse template by the correlator. A comparator then samples the output for signal detection. A typical Gilbert mixer core is adopted for multiplication of broadband signals up to . As a result of synchronization of the received signal and the local template, the output voltage level after integration and sampling can reach up to , which is sufficient for detection by the comparator. The circuit dissipates about from double voltage supplies of and using SiGe BiCMOS technology. Simulation results are presented to show the feasibility of this circuit design for use in ultra-wideband receivers.


INTRODUCTION
Ultra-wideband (UWB) communication systems have been drawing increasing attention in recent years due to their attractive features of high transmission rates and low cost. UWB systems transmit information through short impulses, in contrast to traditional wireless communication systems, which use sinusoidal carriers.
In impulse radio systems, several modulation techniques may be deployed including pulse position modulation (PPM) and pulse amplitude modulation (PAM) [1], for all of which a correlator is an indispensable component for detection by the receiver [2]. In order to lower the cost and power of wireless mobile devices, it is necessary to integrate UWB systems on a single chip, thereby enabling a wide range of applications in the wireless data communication field. This process represents a big challenge for current VLSI technology, because of the UWB range involved from 3.1 GHz to 10.3 GHz. At present, only a few publications dealing with this topic have therefore been published. An integrated UWB transceiver architecture for low data rates (100 Kbps) at low bandwidth (below 960 MHz) using a digital implementation of the correlator has been described in [3]. Although a correlator can also be implemented in digital format for high data rates of up to 100 Mbps at high bandwidth, direct sampling of 3.1 GHz to 10.3 GHz frequency signals is ultimately required, which is almost impossible for current ADC techniques. The advantage of an analog correlator is that it can process signals in real time and provide a continuous output at low frequency, and thereby can remove the need for special requirements for the ADC in the receiver. Analog correlators are therefore well suited for UWB front-end implementation. Although some authors [4] have presented a multiple correlator implementation, no details have yet been presented.
The correlator is one of the key parts of the receiver frontend, which also includes a low-noise amplifier (LNA) and a comparator [5], as shown in Figure 1. The received signal is correlated with the local template impulse during a certain period, normally the pulse repetition period or the symbol period, and its output is sampled and held to detect whether there is a signal in the observing window.
A new 3-10 GHz analog correlator, composed of a standard Gilbert cell (GC) [6], a load capacitor, and other supporting circuits, is proposed in this paper. The standard GC multiplies the received signal with the template, and then the product is integrated by the load capacitor. In order to evaluate the performance of the correlator, a two-tone model is also described. The paper is organized as follows. In Section 2, the principles behind the correlator design are described. Results of some simulations concerning the correlator performance are then analyzed in Section 3. Finally in Section 4, we present our conclusions.

CORRELATOR DESIGN
A correlator is used to detect the presence of signals with a known waveform in a noisy background. The output is nearly zero if only noise is present [2]; otherwise, the energy of the received signal is integrated with the local template waveform for a certain time interval to obtain a highvoltage output above the a predefined threshold. The crosscorrelation function can be described by the following equation: where LO(t) is the local template signal, RF(t) is the input radio frequency signal of the correlator, and T is the integration period. The correlation process can be divided into two steps. The first step involves multiplication of the received signal and the reference waveform (local template signal) using a standard GC. The second step involves integration of the output current via a capacitor. The basic correlator topology is depicted in Figure 2. The standard GC, as a current-mode element, outputs the differential current. The typical resistive or inductive load of a standard Gilbert mixer is replaced by two current sources and a capacitor across the differential output nodes. Because the common-mode part of the output current is absorbed by the current source load, the differential output current is directly fed into the load capacitor. As a result, the capacitor integrates the current and outputs a step-like voltage. A switch controlled by an external clock is used to determine the integration interval, and to clear the charge in the capacitor at the end of each interval.
The circuit described in this paper is based on SiGe BiCMOS technology. This technology, intended for RF, analog, and mixed signal applications, has high-performance graded-bandgap-base negative-positive-negative (NPN) transistors, integrated with high-density complementary metal-oxide semiconductor (CMOS) logic. The minimum lithographic image length is 0.24 µm; the transient frequency f t of the standard NPN transistor is 47 GHz. Figure 3 gives a schematic of the circuit design, which consists of three parts: a predistortion circuit (PDC), a GC, and a common-mode feedback (CMFB). The values of R 1 and IE are chosen as 10 Ω and 2 mA, respectively, as a tradeoff between linearity and the transconductance of the PDC. The emitter areas of Q 1 and Q 2 are chosen to be as small as possible, in order to increase the differential voltage V p . The GC (Q 5 -Q 10 ) multiplies the predistorted template V p with the received pulses (RF signal), and then outputs the product in differential current mode. The GC is implemented using bipolar transistors for the following two reasons. The first reason is that high-speed multiplication is required, and bipolar transistors have a higher transient frequency than metal-oxide semiconductor (MOS) transistors. The second reason is that a GC in a bipolar form has better linearity than that deployed in MOS transistors, allowing better compatibility with the PDC. R 2 helps to transform the template voltage to current in a more linear manner. M 1 -M 4 , M 1 -M 4 , and Q 11 -Q 14 are current sources, which supply bias currents for the GC and CMFB circuits. Because an active load is used, it is necessary also to add a CMFB circuit to determine the output common-mode voltage and to control this voltage to be equal to a specified value V CM . The CMFB circuit includes  [6]. In practice the base currents of Q 5 -Q 12 cannot be neglected, therefore the current "above" the GC (I B1 in Figure 2) is not exactly equal to the current "below" it (I B2 in Figure 2). Because the correlator and LNA are integrated in the same chip, port impedance matching is not considered here.

SIMULATION RESULTS
The circuit shown in Figure 3 has been simulated using Cadence Spectre with the Gummel-Poon NPN model and the BSIM3v3.2 intrinsic MOSFET model presented by IBM. In the following, some selected simulation results are shown and analyzed.

Correlator characteristics
We have chosen to describe the correlator characteristics in the frequency domain. There are two reasons for this choice.
(1) In current EDA simulation systems, frequencydomain simulation techniques are the most popular, and provide an effective way to describe and control the behavior of a circuit, especially for frequency translation circuits. (2) For testing a RF circuit, tones of specified frequency are more easily available than short pulses in a time domain.
The behavior of a correlator can be described in the frequency domain as where X(ω) and Y (ω) are the Fourier transformations of the input signals, and ⊗ denotes convolution.
A two-tone model has been developed in this work. When the RF and LO ports are both driven by single-tone drivers with frequencies of ω 1 /2π and ω 2 /2π, respectively, the output of an ideal correlator can be described by the following equation: where and where k and c are both constants. The output of an ideal correlator can therefore be thought of as containing two tones, namely, a summaryfrequency tone (ST) ω sum and a differential-frequency tone (DT) ω diff . In the above equation, the ratio of the first term (ST) to the second term (DT) is ω diff /ω sum . Figure 4 shows the simulated differential-voltage spectrum gain of a periodic steady-state analysis, using 5 GHz and 4 GHz for the RF and LO frequencies, respectively. It can be seen in where in this case, the fundamental is the DT, and the amplitudes of LO and RF are 50 mV and 20 mV, respectively.
As a performance measure of the correlator, we borrow the conversion gain usually used for a mixer. The ST gain versus LO frequency, with LO frequency swept from 3 GHz to 10 GHz, is shown in Figure 5. The IF frequency is the difference between the RF and the LO frequencies and is fixed at 1 GHz, which means that the RF frequency is swept from 4 GHz to 11 GHz. Because an integrator is a lowpass filter with a DC pole, the gain decreases with increasing frequency, as expected.  Values of the output capacitances, including C o , the gatedrain capacitance of M 1 -M 2 and the gate capacitance of M 5 -M 6 , will change as the output frequency increases, which will affect the ST behavior. To measure the high-frequency performance of the correlator, the output ST gain is compared with the ideal curve generated from the DT by adding 20 log(ω diff /ω sum ) to the DT gain (in dB). The quality factor of the capacitor decreases at high frequency, that is, becomes less capacitive, thus the simulated ST decreases less than the ideal value. Although the error between the two curves also increases with increasing frequency, as shown in Figure 5, this problem is not serious because ω sum also increases, which results in a reduction of the error at high frequencies. The following expression is used to calculate the normalized ST gain error: where G ST is the simulated ST gain, G ST is the ideal gain, and E(ω sum )is the unnormalized ST gain error in dB. Figure 6 shows the normalized ST gain error versus LO frequency. The normalized gain error does not change much  with increasing frequency, and its value remains below 2% during the bandwidth region-of-interest.
The amplitude of the output DT versus the input RF signal is shown in Figure 7. The simulation shows that the conversion gain will saturate at approximately 150 mV of RF amplitude, which defines the maximum input value for the application of this circuit.
When the spectrum of the UWB signal is sampled with a 1 GHz frequency spacing, that is, the pulse signal is repeated every 1 nanosecond in the time domain, the spectra of the input signals are where ω 0 is the frequency spacing, N and M are the harmonic numbers, and x i and y i are the sampled values. We can write the convolution of these two spectra as where (1) and (4) are STs while (2) and (3) are DTs. In the two-tone frequency-swept simulation, the difference between the LO and RF frequencies is fixed at ω 0 , therefore the correlator output spectrum at ω 0 is the weighted sum of all DT simulation results. The high-frequency distortion of the output at kω 0 , composed of STs, can also be approximately estimated by where ε d,s is the normalized ST gain error described before, for summary and differential frequencies of the two input signals of sω 0 and dω 0 , and where s, d, and k are all positive integers. The two coefficients γ xd,s and γ yd,s are the amplitude ratios of the actual input spectrum (that contributes to the specified ST (i.e., kω 0 ) in the two-tone model) to the corresponding spectrum in the simulation. P is the number of possible combinations of any two tones. Table 1 gives the maximal normalized error for several different tow-tone simulations. The noise performance defines the minimum limit of the input signals that can be processed by the circuit. The simulated single side-band (SSB) noise figure (NF) of the correlator is 16 dB at 1 MHz, for a LO frequency of 4 GHz. The major contributor to the noise is the active load. Device sizing to reduce noise is limited by the effects of loss in bias-voltage headroom and output dynamic range.

Transient simulation
In this section, we focus on the time-domain performance of the correlator. A UWB system is immune to multipath fading because it uses narrow pulses and can resolve reflections. Many resolvable path lengths between a given transmitter and receiver exist, and can be used for communication. In UWB applications, the received signals may also be distorted by the wireless channel, both indoor and outdoor. The multipath problem and the distortion of received signals during transmission in a wireless environment can be solved by the following baseband processor. Consequently, in the front-end, only the magnitude and polarity of input signals need to be considered. In the transient simulation, the impulse-signal shape is determined by [7] where τ m = 177.2 picoseconds and T = 5 nanoseconds. The RF and LO pulses are time-shifted versions of s(t), with a 144 mV p-p value for each. At the differential input port, the negative node is fixed to the bias voltage, and the pulse is added onto the positive net in the simulation. There are two possible kinds of application for the correlator. One requires integration of the output every pulse and detection of a single pulse, and the other requires integration for one symbol, including several pulses. The curves in Figures 8  and 9 show the simulation results of the above two kinds of applications, where the input pulses (RF and LO) are assumed to be exactly synchronized. As seen in Figure 8, after the cross voltage of the capacitor reaches its peak value of about 120 mV, the capacitor is shorted and discharged by the MOS switch and the output voltage then decreases to near zero. Figure 9 shows the result of ten pulses integrated together to form a ladder-like output; the peak voltage is about 300 mV. The negative feedback composed of the active load and C o will lead to a discharge of this capacitor, as illustrated by the output voltage dropping after integration of each pulse. This phenomenon becomes more obvious with increasing voltage across the load, as shown in Figure 9. For example, if a current flows from V o + to V o −, causing V o + to increase, the drain-source voltage of M 1 in Figure 3 will decrease and so will the drain current of M 1 , which will then lower the capacitor charging current, or alternatively generate a negative discharging current on the capacitor after the integration. A cascode positive-channel metal-oxide semiconductor (PMOS) active load is used to increase its output resistance and to reduce the negative discharging current, though as a tradeoff, this results in an increase of the power supply voltage. Figure 10 shows the output peak voltage versus the time that the centers of RF pulses are ahead of the LO pulses. It can be seen that the maximum of the peak voltage occurs at 20 picoseconds (i.e., when the LO pulses are 20 picoseconds earlier than RF pulses), which means that the latency of the predistortion module is about 20 picoseconds. This latency should be considered during signal acquisition and synchronization. The integration voltage on the capacitor load is sampled and the difference between the RF and LO pulses is evaluated based on the sampled value by the comparator.   Simulations of different pulse magnitude and polarity are shown in Figure 11 (all voltages in the figure are peak-topeak values; single-pulse correlation case). As the input voltage increases, the output grows linearly until one of the two input signals begins to saturate. The response has a larger dynamic range for positive pulses than the negative pulses on the RF port because the collector current of Q 9 or Q 10 will decrease when a negative pulse exists on the base of these transistors; decreasing the gain of the GC.

CONCLUSION
This paper has presented the design of a 3-10 GHz correlator for use in a UWB front-end. A standard GC is implemented with active current-source load, which can force the output differential current to flow through a capacitor, leading to current integration on the capacitor. A novel technique for performance measurement of the correlator has been developed. The results of several simulations demonstrate that the new circuit design is practicable for impulse radio systems.