Single Magnetic Element-Based High Step-Up Converter for Energy Storage and Photovoltaic System with Reduced Device Count

The multiport DC-DC power converter is a prominent area of research in power electronics due to its highly dense design, reduced device count, and high energy efficiency. In this paper, a nonisolated single magnetic element-based high step-up three-port converter for an energy storage system is presented. The proposed converter has two input ports and one output port. The coupled inductor with switched capacitor is used to achieve high voltage gain. The key features of the proposed converter are high conversion gain, low voltage stress, zero voltage switching (ZVS), and zero current switching (ZCS). The detailed theoretical analysis and operation of the converter are elaborated. The energy efficiency of the proposed converter is calculated and compared with the other counterparts. Ansys Maxwell is used for the coupled inductor finite element modeling. To verify the applicability and functionality of proposed converter, a 
 
 100
  W
 
 converter with two inputs (
 
 48
  V
 
 and 
 
 96
  V
 
 ) and one output 
 
 360
  V
 
 at 
 
 100
  kHz
 
 is tested in the laboratory.


Introduction
e photovoltaic (PV) power generation, owing to its high availability and cleanliness, is rapidly increasing with a total global capacity of 627 GW at the end of year 2019 [1]. e PV generation system can be operated in islanded and gridconnected mode. e islanded PV system is an optimal choice for the remote area electricity generation and distribution. However, the unpredictability of the solar energy and the electric load demand pose a challenge for the broad level exploitation of solar energy. erefore, the PV framework needs a battery to remunerate these challenges. On the contrary, to produce 220 V AC, the inverter requires input voltage of 380-400 V on its DC link. As the voltage generated by the PV system is less than 50 V, a step-up converter is required to keep DC link voltage constant. To address the aforementioned challenges, the power electronic converters provide best solution and efficient interface to PV source [2]. Conventionally, a separate unidirectional converter for PV is used along with a battery connected to either side of converter using bidirectional DC-DC converter. is configuration of separate converters for each source increases the system volume and cost at lower system efficiency. erefore, various multiport converter topologies are reported in literature [3]. A multiport converter is a converter with central controls, inputs/outputs, and bidirectional ports [4]. Using multiport converter instead of standard single converters builds the system proficiency, improves components execution, and diminishes the volume and cost [2][3][4].
A special type of multiport converter is the three-port converter (TPC) including a unidirectional port for power source, a bidirectional port for battery system, and the output port. Recent advances and topologies used for the integration of renewable sources are discussed in [5]. ere are some challenges that need to be addressed in TPC such as minimum device count, high voltage gain, optimal control for power sharing, and smooth transition between operating modes. As an optimal design of the TPC, it is always desired that the converter should have minimum device count and high conversion gain. In traditional step-up converters, duty cycle is increased to achieve large step-up ratio. Increasing duty cycle beyond certain limit results in increased switching loss. e coupled inductors, transformers, multipliers, and switched capacitors are some of the various techniques used to achieve high voltage gain [5,6].
ree-port converter topologies are classified as fully isolated [7][8][9][10][11], partly isolated where one of the ports is isolated [12][13][14][15][16][17][18], and nonisolated [19][20][21][22][23][24][25][26][27][28][29][30][31][32][33]. e isolated structures are suitable for the high power and low frequency applications, but efficiency of these structures is usually low. e partly isolated structures are good with prominent features of high power density and efficiency. e nonisolated three-port converter topologies are preferred because of reduced size, cost, and high power density [5]. e nonisolated topologies are more suitable for standalone PV and low voltage distribution and storage system [3][4][5]. Recent advancements in nonisolated structures are presented in [19][20][21][22][23][24][25][26][27][28][29][30][31][32][33]. In [19], a series-parallel connection based on the H-bridge nonisolated converter has been proposed. A 10 kW converter having input of 300 V and output of 600 V at a frequency of 20 kHz is discussed. e converter topology can be modified by increasing its gain and reducing the device count. A nonisolated TPC converter using two inductors and switched capacitors and diodes has been proposed in [20]. e converter has comparatively high conversion gain and low voltage stress on the main operating switch. However, the converter has too many components and inductive elements leading to reduced system efficiency. A three-port high gain converter for the HEV's applications has been addressed in [22]. To accomplish high gain, a coupled inductor along with series of the capacitors has been used. However, the topology can further be optimized by reducing the number of device count. In [23], a high gain converter using a Cockcroft-Walton multiplier method has been proposed. e converter has bigger size due to many passive components. In [24], a coupled inductor-based high step-up TPC with high conversion gain for PV integration has been proposed. However, the use of two coupled inductors results in increased size and cost. A soft switching high gain TPC with the merits of soft switching and demerits of high component count and two coupled inductors is discussed in [25]. A very simple topology of TPC based on the coupled inductor for PV system is given in [26]. e topology used only coupled inductor, and its gain depends on the turn ratio of the coupled inductor. In [27][28][29], the authors presented modeling and control of a three-port converter for various applications.
To attain high conversion gain, one coupled inductor is used in nonisolated converter topology [30,31]. A coupled inductor-based high gain converter is better than isolation transformer due to simpler winding structures and lower conduction losses [6]. In [30], a three-port high gain converter using a coupled inductor is introduced. e converter has the merit of high conversion gain, reduced voltage stress on the main operating switch, and soft switching. However, the converter has a coupled inductor and single inductor which increases its size. A coupled inductor with series capacitor-based high gain TPC with comparatively reduced device count and only one magnetic element has been proposed in [31]. is topology can be further improved by minimizing the device count and better design of the magnetic element. Most of the topologies reported in the literature are switched at less than 100 kHz. e switching frequency of theses converter topologies can be increased and control schemes can be improved.
In this paper, a three-port bidirectional converter using one coupled inductor and switched capacitor is proposed. e switching frequency is increased up to 100 kHz in order to shrink the size, increase power compactness, and improve the dynamic response of the converter. e proposed converter has high conversion gain and soft switching capability for the main operating switches. e analysis of the converter is performed in continuous conduction mode (CCM). e operating principle and corresponding theoretical analyses of the proposed converter in different modes are discussed in detail. e presented work is based on [32,33], with the following vital modifications and extensions: (1) Novel converter topology with reduced device count (2) Reduction in size and cost by increasing switching frequency up to 100 kHz (3) Finite element modeling of coupled inductor in order to improve the design (4) Operation of converter in different modes (5) Loss and efficiency analyses (6) Development of lab prototype and presentation of measured results e introduction and comprehensive summary of various converter topologies are presented in Section 1, followed by the operation and analysis of the proposed converter in Section 2. e detailed proposed design and the control scheme are elaborated in Section 3 and 4, 2 Complexity respectively.
e experimental results, loss and efficiency analyses, and comparison are given in Section 5. Lastly, the overall work is concluded in Section 6.

Operation and Analysis of the
Proposed Topology e proposed converter, comprised of one unidirectional port for PV and two bidirectional ports, is presented in Figure 1.
e proposed converter comprises four active switches S 1 , S 2 , S 3 , and S 4 and four diodes D pv , D b , D c2 , and D c . e proposed converter has three capacitors: clamp capacitor C 1 , switch capacitor C 2 , and output capacitor C m . e proposed converter structure has only one coupled inductor. e coupled inductor along with switch capacitor C 2 is used to achieve high voltage conversion gain at output port. In order to diminish the voltage stress on the fundamental switch S 1 , the active clamp circuit is used. e primary winding of the coupled inductor is common between the inputs, i.e., battery and PV system. e proposed converter has the bidirectional power flow ability along with intersource power-sharing. e switch S 1 is the main operating switch and remains active most of the time. e switches S 2 and S 3 are used for boost and buck operations, respectively. e switch S 4 is used to control power between the PV and battery system. e converter operation is discussed for single-input single-output (SISO), double-input single-output (DISO), and singleinput double-output (SIDO) modes. Large value capacitors are used to maintain constant voltage. e detailed operation of the converter in different operating modes is explained in the following sections.

Converter Operation in SISO Mode.
In SISO mode, there are two modes of operation; buck and boost. In boost operation, the battery/PV provides power to the load, whereas in buck operation, the battery is charged from the DC link capacitor.

Boost Operation.
In this mode, the power is transferred to the load either by the battery or from the PV. For a single switching cycle, the converter has five operating states. e theoretical switching waveform and current flow paths in CCM are presented in Figure 2(a). e detailed operation of the converter in five states is illustrated. (Figure 3(a)): this is a very short interval; the switch S 1 is turned on at t 0 , S 2 is on, and the switches S 3 and S 4 are off. e current i lk increases linearly and it is equal to the magnetizing inductance current i lm at time t 1 . e net current passing through the primary side is (i lm − i lk ). e secondary side current i LS is equal to (n × i lm − i lk ) which decreases linearly and is equal to zero at time t 1 . e diodes D 3 , D b , and D pv are reverse biased. State-II [t 1 ∼ t 2 ] (Figure 3(b)): in this interval, both the switches S 1 and S 2 are on. e current i lm is increasing linearly. e current i LS is also increasing linearly but in opposite direction. As the current direction and voltage polarity are reversed on both sides of the coupled inductor, the capacitor C 1 is charging the switched capacitor C 2 through the diode D c2 . e current i dc2 increases until it equals i LS at time t 2 . State-III [t 2 ∼ t 3 ] (Figure 3(c)): at time t 2 , the switch S 1 is turned off. e leakage inductance energy is transferred to the capacitor C 1 . e voltage over the switch S 1 is clamped to V ds1 . e currents i dc and i dc2 through the diodes D c and D c2 decrease. As this is a very short interval, the current direction and voltage polarities over the coupled inductor remain unchanged. State-IV [t 3 ∼ t 4 ] (Figure 3(d)): for this interval, the switch S 2 is on and the switch S 1 is off. e current direction and the voltage polarities change over the coupled inductor. e diode D c is forward biased and current i dc decreases. At time t 4 , the current i dc become zero, and the diode D c is reverse biased. State-V [t 4 ∼ t 5 ] (Figure 3(e)): the switch S 1 is off, whereas switch S 2 is still on. At time t 4 , the diode D c is turned off. e current direction is the same in both primary and secondary windings of the coupled inductor. e magnetizing current i lm is decreasing. e energy from the battery, magnetizing inductor L m , and the leakage inductor L lk along with the capacitor C 2 is delivered to the load.

Buck Operation.
In SISO mode, the input is main DC link capacitor and the output is battery. e large value DC link capacitor is used. In this mode, the main operating switch is S 3 . e theoretical waveforms for this mode are presented in Figure 2(b). For one complete cycle, the operation the converter is explained for the following time intervals.
State-I [t 0 ∼ t 1 ]: this is a very short interval; the switch S 3 is turned on. e magnetizing current i lm and leakage current i lk are decreasing and the switch S 3 is turned on at almost zero current flowing through it. State-II [t 1 ∼ t 2 ] (Figure 4(a)): in this interval, the switch S 3 is on.
e coupled inductor magnetizing current i lm is increasing in opposite direction. e current i lm is charging the inductor L m . e interval ends at time t 2 . State-III [t 2 ∼ t 3 ] (Figure 4(b)): at the end of time t 2 , the switch S 3 is turned off. Initially, current i dc increases abruptly and then becomes zero at time t 3 . is interval ends at t 3 . State-IV [t 3 ∼ t 4 ] (Figure 4(c)): at time t 3 , the diode D c2 conducts and switch S 3 is off. e current i dc2 increases and becomes zero at time t 2 . State-V [t 4 ∼ t 5 ] (Figure 4(d)): in this interval, the switch S 3 is still off. e magnetizing current i lm charges the battery through the body diode D 1 . is interval ends at time t 5 .

Converter Operation in DISO Mode.
During this mode, the PV power is not enough to fulfill the load requirement.   PV is delivering power to the load, and voltage V pv is boosted to V 0 . is state is similar to state-V of the SISO mode except the switch S 2 is off and diode D pv is turned on.

Converter Operation in SIDO Mode.
In this mode, the PV generation is greater than the load requirement and excess energy is used to charge the battery. e theoretical switching characteristics are presented in Figure 2

Steady-State Analysis and Design Considerations
Averaging of the converter in each mode is performed by applying voltage-second balance on magnetizing current i lm equations, whereas the ampere-second method is used on all capacitors' voltage equations. e steady-state analysis results for each mode are elaborated in SISO, DISO, and SIDO modes.
e voltages across the capacitors C 1 and C 2 are computed according to equations (2) and (3), respectively.
e steady-state voltage across the capacitor C m is computed by using the following equation: e output voltage V 0 across the load is computed by using the following equation: e converter gain increases significantly by increasing the duty cycle and the turn ratio "n" of the coupled inductor. Change in the output voltage V 0 with the change in duty cycle d 1 in SISO mode is presented in Figure 7(a). e comparison of output voltage and the input voltage at various values of the turn ratio "n" is presented in Figure 7(b). is shows that the output voltage increases linearly with the input voltage. e proposed converter has the gain of 8.
From the analysis, it is observed that for both the inputs (PV and battery), the voltage across the load will remain the same. e switch S 1 is used to control the output voltage for both the inputs PV and battery.

Buck Operation.
In this mode, the battery is charged from the main DC link capacitor. e main operating switch is S3. For the steady-state operation in this mode, the voltage-second balance on the magnetizing current i lm is applied. e steady-state voltage, when the battery is charged from the DC link capacitor, is given in the following equation: where V cm � V 0 .

DISO Mode.
For this mode, the voltage-second balance on the magnetizing inductance is applied. e voltage across the magnetizing inductance is computed by using the following equation: e voltage V C1 across the capacitor C 1 is computed by the following equation: e voltage V C2 across the capacitor C 2 is determined by the following equation: where ]. e output voltage V 0 across the capacitor C m is computed by using the following equation: where V pvnew � 2(V pv + n × V bat + (2n + 2)).

SIDO Mode.
For the calculation of conversion ratio, we are applying voltage-second balance. In this mode, the only input is PV. To calculate the conversion ratio, voltage-second balance is applied on the magnetizing inductance L m . e voltage across L m is calculated by using the following equation: e voltage across the capacitors C 1 , C 2 , and C m is calculated by using equations (12)- (14), respectively.
e output voltage over the capacitor C m is calculated by using the following equation: 3.4. Design Consideration. e design specifications of the proposed converter are given in Table 1. e main components used in the converter design are coupled inductor, power MOSFETs, capacitors, and diodes. e appropriate selection of coupled inductor, capacitors, and power semiconductor devices is very crucial for the desired operation of the converter.

Coupled Inductor Design.
e required parameters of the coupled inductor used in the converter topology are given in Table 1.
e equivalent inductance is Complexity L eq � L p + L s + 2M, where M is the mutual inductance. e number of turns for the required inductance value of the L p is calculated by using equation (15). e required peak inductor current is 6.165 A, and the duty cycle d 1 � 0.6. For 100 W, the core ETD-39 and wire AWG-14 are selected. e peak I Lpk primary inductor current is calculated using equation (16). e peak to peak primary inductor current is 2I LP . e peak current I Dpk through diode D 3 is calculated by using equation (17). e relationship between I Lpk and I out is expressed in equation (18). e required values of the coupled inductor are L p � 5 uH and L s � 20 uH for DCM operation. For the CCM operation, inductor values are L p � 25 uH and L s � 100 uH.
where N67 material is used which has the following properties: U eff � 1590, A e � 97.1 mm 2 , L e � 78.8 mm, and B max � maximum flux density.
e primary inductance value and its losses are calculated by using equations (20) and (21), respectively. e magnetizing inductance can be calculated by using equation (22).  8 Complexity e secondary inductor value is calculated by using the relationship L s � n 2 · L p , where n � (N 1 /N 2 ) � ������ � (L 1 /L 2 ). Here, N 1 is the number of turns on the primary side and N 2 is the number of turns on the secondary side. e coupling coefficient between the primary and secondary inductors is calculated by using equation (23), where as the power loss in secondary inductor is calculated by equation (24).
e leakage inductance value on the primary side can be calculated by equation (25), where f r is the resonance frequency and the C out s1 is the output capacitance of the switch S 1 .
e finite element model of the coupled inductor is developed in Ansys Maxwell 3D by using PExprt tool. e coupled inductor's Ansys analysis report for both the DCM and CCM operations is given in Tables 2 and 3, respectively. In Table 2, the coupled inductor performance results are shown for the DCM mode. e results show the primary and secondary inductance (L p and L s ) values of 5 uH and 20 uH, respectively, with turn ratio n � 2. e current density is found to be 13.39(A/mm 2 ) for L p and 3.58(A/mm) 2 for L s with the losses of 2.4 W and 438.5 mW for L p and L s , respectively. e value of R dc is found to be 7.85Ω and 20.14Ω for L p and L s , respectively. e total losses for DCM mode are 4.455 W, and window filling is 36.74% and 73.1% for L p and L s , respectively. Similarly, the coupled inductor performance results for CCM mode are shown in Table 3. e values of the current density, coupled inductor, losses in primary and secondary windings are shown.
e DC resistance value of the used wire is R dc � 3.353 mΩ. Moreover, the losses in the core and winding are expressed as 971.142 mW and 200.684 mW, respectively. Furthermore, the window occupancy for both primary and secondary winding is obtained as 31.09% and 55.72%, respectively. e finite element model (FEM) of coupled inductor for magnetic flux density is presented in Figure 8(a), whereas the FEM for the magnetic flux lines is presented in Figure 8(b).

Capacitor Selection.
ree capacitors used in this topology are the clamping capacitor C 1 , the switched capacitor C 2 , and DC link capacitor C m . Equation (26) gives the relationship between the clamp capacitor C 1 and the input voltage V bat .
e blocking voltage over the switch S 1 is expressed in the following equation: e minimum value of the capacitors C 1 and C 2 is calculated by using equations (28) and (29), where as the value of the output capacitor C m is determined by equation (30). e voltage across the capacitor C 2 is determined by equation (31).

Selection of Switches and Diodes.
e switches S 1 , S 2 , and S 4 have low voltage blocking capability while switch S 3 has high voltage blocking capability. e maximum voltage stress across the main switch S 1 and the diode D c is calculated by the following equation: where V in is the input voltage at PV or battery port. e switch S 3 and the diode D c2 bear maximum voltage stress, and it can be expressed as follows: e voltage stress across the switch S 2 and the diode D pv is expressed as follows: whereas the voltage stress across the switch S 4 and the diode D 6 is given as follows: e maximum current stress across the switches and diodes of the proposed converter occurs if only one source is serving the load. e current stress on the switches S 1 and S 2 and the diodes D pv and D c is equal to I Lpk as expressed in equation (18). e current stress on the switch S 3 is equal to I Dpk and is express in equation (20). e peak current through the diode D c2 is I dp � (I Dpk /n), where I Dpk is expressed in equation (17).
A fast recovery diode is selected for D c , and an ultrafast recovery diode is chosen for D c2 , whereas the ordinary rectifier diodes with required current and voltage blocking capability are selected for D pv and D b . e ratings of components used in simulation or prototype are given in Table 1.

Control Scheme and Operational Mode Selection
Generally, output of the converter is regulated to satisfy the load requirement and also for the constant input to the inverter. e objective of the control scheme is to regulate the main DC link capacitor C m voltage V 0 in SISO (boost operation) and DISO modes. In SIDO mode, the voltage V 0 over the main DC link capacitor C m is regulated at constant value. e charging and discharging battery is also regulated in this mode. In SISO (buck operation), the objective is to direct the battery voltage V bat and control the charging current i b . e charging and discharging battery is also regulated in this mode. e mode selection and pulse width modulation (PWM) block is presented in Figure 9(a). e flow diagram explains the power flow and conditions for the transition in different modes. In this figure, V GS1 , V GS2 , V GS3 , and V GS4 are the gate driving/control signals for switches S 1 , S 2 , S 3 , and S 4 , respectively. e control signal V GS1 is the main control signal applied to switch S 1 in all modes. ere are separate control loops for the input and output voltage ports. e comp-1 regulator keeps the PV system power at the maximum value while comp-2 regulates the output voltage at V ref . e activity mode is resolved by present working conditions, for example, load power, battery condition of charge, and accessible PV power. e control algorithm which determines the opera- 10 Complexity tional mode is presented in Figure 9(b). Initially, values of all terminal variables, i.e., V pv , V bat , V 0 , and R 0 , are acquired. If the battery is fully charged and PV power is not available, then the converter will operate in SISO (boost) mode. e converter operates in SISO (buck) mode when the PV power is not available and there is light load. If both the PV power and load are available, the converter will operate in DISO Mode. As the converter is    Complexity developed for the standalone PV system, the equation P pv + P bat � P load is always true, and hence the intermittence in PV power is always compensated by the battery system. Moreover, the converter is operated in SIDO mode; otherwise, the battery charge protection is active. e switch S 4 is used to control the battery power. e transition between modes is very smooth. For example, in SIDO mode, if P pv > P 0 with constant load, V GS4 is used to control the battery power until P pv � P 0 . e converter operates in SISO mode (buck) and battery is charged from the main DC link capacitor C m , and the control signal is V GS3 . is ensures smooth and soft transition between the ports.

Results and Discussion
In order to examine the exhibition of proposed topology and hypothetical investigation, a 100 W converter is tested in the laboratory. e proposed converter has high gain in SISO, DISO, and SIDO modes. e complete analytical and experimental results for SISO, DISO, and SIDO modes are presented. Main parts of the converter are common to all the ports. e parameters of different parts utilized in this model are given in Table 1. ere are only minor changes in the values of parameters; however, shapes of the current and voltage waveforms remain the same. Design and selection of the components is performed by considering the possible maximum rating values. As the converter has only one coupled inductor, n can be expanded by keeping the duty cycle constant in order to increase the gain of the converter.

Experimental Results.
A hardware prototype is developed and tested to prove the operational concepts of the proposed converter. e photographs of laboratory workstation and converter topology are presented in Figures 10(a) and 10(b), respectively. A four-layer PCB is developed by using Altium Designer, with one power plan and one segmented ground plan. In the design of PCB, the number of controlled interfaces is reduced. is reduces the common mode voltage between the interface ports so that there is less coupling from the cables into or out of the system. In order to minimize the return current path impedance, the return current path is kept closer to the signal path. "Moats" in PCB ground plan are avoided. All power and ground rails are carefully checked to ensure they do not offer common impedance routes within or outside the unit. e parameters and particulars of different segments utilized in equipment model are expressed in Table 1. For the generation of control signals, TI Launchpad-F28379D is used. e instruments used for measurements are GDS-810C, a measuring module (USM-3IV), an oscilloscope, and a multimeter. e measured waveforms of the converter for SISO boost operating modes are presented in Figure 11. e magnetizing current i lm and gate driving signal (V GS1 ) are presented in Figure 11(a). e duty cycle d 1 for the switch S 1 is 0.6. e peak to peak voltage V GS1 is 12 V. e gate driving signal (V GS1 ) vs coupled inductor leakage current i lk is presented in Figure 11(b), whereas the gate driving signal (V GS1 ) and coupled inductor secondary current i LS is presented in Figure 11(c).
Because of the leakage inductance of coupled inductor, the switch S 1 is operated under ZCS. e leakage inductance is calculated according to equation (26). e measured series resonance inductance which is combination of leakage inductance and stray inductance is 0.98 uH. e equivalent capacitance obtained from the output capacitance of primary and synchronous switches is 100 pF. e switch S 1 is also operated under almost ZVS condition without using the external inductors and capacitors. ere are some ripples in the measurement of the current due to the low sensitivity of the measuring module. e measured gate signal of switch S 1 and currents I Dc are presented in Figure 11(d), whereas the V GS1 vs I Dc2 curves are plotted in Figure 11(e) which are in close similarity with the theoretical results plotted in Figure 2(a). e gate signal of switch S 1 and corresponding drain source voltage are plotted in Figure 12. It is obvious from the results that drain source voltage of S 1 becomes zero before application of gate signal. In this case, almost ZVS is achieved by the series resonance tank L lk -C outs1 tank circuit. e tank circuit consists of the primary side leakage inductance of the coupled inductor and the output capacitance C outs1 of the switch S 1 . During the off time of the signal V GS1 , the L lk -C outs1 circuit resonates. As the output capacitance of the switch S 1 has been discharged by the series resonant circuit, this results in power savings and improvement in the energy efficiency of the converter. e measured results for the SISO mode (buck operation) are presented in Figure 13. e duty cycle d 3 is equal to 0.3. e gate signal V GS3 and magnetizing current i lm are presented in Figure 13(a).
ere are some ripples in the current due to the measuring setup and coupled inductor leakage inductance. e gate signal V GS3 of switch S 3 and corresponding drain source voltages V DS3 are presented in Figure 13(b). It is obvious from the figure that switch S 3 is operated under almost ZVS. In Figure 13, switching gate signal V GS3 and inductor's secondary current i LS are presented. During the turn on of the switch S 3 , both currents i lm and i LS are same.
e measured results of converter in DISO mode are presented in Figure 14. e duty cycle of switch S 1 is 0.6, and the duty cycle of switch S 2 is 0.5. e gate signals V GS1 and V GS2 and the current i b are presented in Figure 14(a). Battery supplies power to the load as long as the switch S 2 is on. As the battery voltage drops below the threshold voltage, the switch S 2 is turned off and power is supplied to the load by the source V pv . Due to this, all of the results are same as those of the SISO (boost operation) mode. In Figure 14(b), the gate signals V GS1 and V GS2 and magnetizing current i lm are presented. e secondary current i LS and gate signals V GS1 and V GS1 are presented in Figure 14(c). It is observed that the only voltage rating and polarity of C 1 and C 2 affect the performance of the converter. e measured results of converter in SIDO mode are plotted in Figure 15. e duty cycle of switch S 1 is 0.6, and the duty cycle of the switch S 4 is 0.68. e control signals V GS1 and V GS4 and the magnetizing current i lm are presented 12 Complexity in Figure 15(a). e switch S 4 is used to control the battery current i ch . e excess energy generated by PV is used to charge the battery. e control signals V GS1 and V GS4 and drain source voltage V DS4 are presented in Figure 15(b). e gate signals V GS1 and V GS4 and secondary current i LS are expressed in Figure 15(c). e diode D c is used to transfer the voltage stress of the switch S 1 . e gate signals V GS4 and V GS1 and the current i dc are presented in Figure 15(d). e current i ch control signals V GS1 and V GS4 are presented in Figure 15(e). e control signals V GS1 and V GS4 and current i dc2 are presented in Figure. 15(f )

Loss and Efficiency
Analysis. e loss and efficiency of the proposed converter are analyzed in each operating mode.
e SISO boost mode of operation is the main operating mode. For this mode, the efficiency of the converter as a function of output power is depicted in Figure 16(a). e converter has maximum efficiency of 96% at the power of 240 W with V bat � 96 V in SISO mode. For input V pv � 48 V, the converter has maximum efficiency of 95.5%. e converter efficiency is calculated by using equation (36). Table 4 shows the measured values of the input (rms) current, output current, resistive load, and efficiency values. e

Complexity 13
Turn on ZVS Turn off ZVS V GS1 V DS1 Figure 12: V DS1 and V GS1 during ZVS.  14 Complexity converter efficiency increases with the output power up to 240 W. Beyond this point, the energy efficiency remains constant. Under these conditions, the losses in the converter are estimated and illustrated in the pie diagram in Figure 16(b). At the output power of 100 W, the efficiency of the converter is 93% with input voltage V pv and 94.5% with the input voltage V bat . e maximum contribution in the loss is due to the main operating switch S 1 , i.e., FQA34N20 with R DS(ON) � 75 mΩ . e switch loss can be calculated by using equation (37). e coupled inductor has the second highest losses with the exact value of 1.172 W . e series capacitor contributes about 15% and input diode has the share of 10% in the total losses. Rest of the components have relatively low loss contribution.
For the DISO mode of operation, the main power loss is the same as that of the SISO mode, but there is additional power loss due to the diode D pv and the switch S 2 . e losses due to diode D pv and switch S 2 are calculated by using equation (38) and equation (39), respectively.
where I 2 db is the discharging current of the battery. e power loss in the SIDO mode is investigated by considering the loss of the diodes D pv and D b and the switch S 4 . e conduction losses for the diodes D pv and D b are computed by using equation (38) and equation (40), respectively. e switch S 4 conduction loss can be computed by using equation (41).

Comparison Study.
e proposed converter is compared with several similar converters suitable for standalone PV system in Table 5. e comparison of proposed converter with [24,30,31] is performed. e proposed converter has higher switching frequency and uses less number of components to construct more useful features such as bidirectional power flow ports. e proposed converter has only one conversion stage with common coupled inductor for both inputs. It has only one magnetic element, i.e., coupled inductor, four MOS-FETs, two capacitors, and two diodes, whereas the converter in [24] has two coupled inductors, two inductors, and five switches. Similarly, the converter in [30] has one coupled inductor and one inductor along with three MOSFETs, six diodes, and three capacitors. e size of the converter is relatively small. e converter proposed in [31] has one coupled inductor, three MOSFETs and capacitors each, and six diodes. e converter has no extra inductor. e conversion gain in SISO mode is presented in Figure 16(c). e gain of the proposed converter is almost equal to the converter explained in [31], but with minimum number of device count and size. In terms of device count, operational modes, and efficiency, the proposed converter outperforms its competitors. e operational comparison of the converters in terms of the efficiency in different operating modes is presented in Figure 16(d). In comparison with other counterparts by considering the input voltage 48V, the proposed converter has the maximum efficiency of 96% which is the same as that of [24,31], but the proposed converter is operated at 100 kHz while others are operated at 20 kHz.
A topological comparison of the proposed converter along with its other recent counterparts is presented in Table 6. e advantages and disadvantages of the various Ref [24] with V in = 48V Ref [30] with V in = 48V Ref [31] with V in = 48V Proposed converter with V pv = 48V Ref [24] with V in = 48V Ref [30] with V in = 48V Ref [31] with V in = 48V (d)  16 Complexity recent structures are given. In [8], the converter provides good galvanic isolation, ZVS operation, and high conversion gain. e converter has large size, and this makes the converter costly with lower efficiency. e converter is good for the AC/DC integrated DC microgrid applications. In [10], the proposed converter has single conversion stage for each port which makes the control scheme simpler. It also has the ZVS and ZCS operation for all the switches. (n × (d + 1)/(1 − d)) ((2 + n × d)/(1 − d 1 )) ((2n + 1) + (n+) × d/(1 − d 1 )) ((2 + n + d 1 (1 + n))/(1 − d)) However, the large size and low efficiency limit the converter applications. In [12], the converter has the merits of high conversion gain and flexible operation between different modes. However, the converter has large size leading to the low efficiency. Merits and demerits of some other converters [13][14][15]18] are summarized in Table 6. e coupled inductor-based topologies are discussed in [24,30,31]. Brief overview of these topologies is given in Table 6, whereas detailed comparative analysis is given in Table 5. ese topologies are preferred for the renewable energy integration with DC microgrid. e proposed converter has the merits of high gain, simple structure, low voltage stress on the main switches, and high efficiency. e only challenging part is the need of decoupling control as most of the components are common in the structure which can be overcome with suitable control scheme.

Conclusions
A three-port bidirectional power converter using a coupled inductor and a switched capacitor is proposed. Size of the converter is reduced by increasing the switching frequency. Higher voltage gain is achieved by using active clamp and switch capacitor technique. Operation of the converter is illustrated in three distinct modes, i.e., SISO, DISO, and SIDO. e converter has high gain in all operational modes. e use of the clamp circuit results in the reduction of voltage stress on the switches. All the main operating switches are operated under ZVS and ZCS. e converter efficiency is calculated and loss analysis is performed using analytic, simulated, and experimental models. e proposed converter has 96 % efficiency in SISO mode. A prototype of a 100 W converter is developed by using 48 V and 96 V inputs and 380 V output voltage. e measured results of the converter are in close comparison with simulation results.

Data Availability
e data used to support the findings of this study are available from the corresponding author upon request.

Conflicts of Interest
e authors declare that they have no conflicts of interest.