Abstract
In this article, we expand on the wide body of experimental and theoretical knowledge of charge trapping phenomena in eGaN devices that cause dynamic on-resistance shifting (dRDS(on)). In previous publications, we advanced a first-principles model to explain this effect, based on the physics of hot carrier scattering. The model led to a set of equations to predict dRDS(on) under different operating conditions of drain voltage, junction temperature, switching frequency and current. In addition, the model has led to iterative improvements in device design, culminating in the near elimination of dynamic on-resistance effects in eGaN devices when operated within datasheet limits.
Several groups have studied RDS(on) shifts in GaN FETs that result from single switching waveforms such as in the double-pulse test. EPC's approach has been to quantify RDS(on) over relatively long time intervals, ranging from billions to trillions of switching transitions. This long-term data is more relevant to practical applications. Furthermore, the resistance rise versus time can be fit to a physics-based model equation. Using these fits, dRDS(on) can be projected out to years of continuous operation, providing an invaluable tool for users to assess lifetime against their mission profile.
An example of this kind of long-term data and model fits is provided in Figure 1. The data was taken on the EPC2045 (5th generation 100V eGaN FET). The graph on the left shows the evolution of resistance versus time at different switching voltages (all at a junction temperature of 75 °C). Note that for operation below (and including) the datasheet maximum, dRDS(on) is negligible, even when projected out to 10 years of continuous operation. When operated above datasheet VDSmax, RDS(on) growth is observed, and the evolution is in good agreement with the model. The graph on the right shows data at 150V and two different temperatures. The trapping phenomenon is seen to have a negative temperature activation, whereby on-resistance increases faster at lower temperature. This counter-intuitive result is consistent with the physics of hot carrier scattering, because an electron can travel further between scattering events at lower temperature and therefore gain greater kinetic energy in a given electric field. These highly energetic electrons scatter into unintended regions in the device, where they trap and degrade on-resistance.
In this work, we expand on previous results with the following new data and analyses:
Long-term dynamic RDS(on) data and model fits for 5th generation 100V and 200V eGaN FETs at various temperatures and voltages extending well beyond datasheet limits.
High speed measurements of RDS(on) less than 100 ns after a switching transition, seeking out possible trap states that recover on short timescales but may nonetheless increase switching losses. To within our measurement resolution, we find that eGaN FETs switch to a low resistance state instantly, with no evidence for such "fast" dynamic RDS(on)
A comparison of hard-switching versus soft-switching. In contrast to some other GaN technologies, we find that eGaN is essentially immune to dRDS(on) under soft-switching conditions, consistent with the underlying physics of hot carrier scattering.
A comparison of inductive versus resistive hard-switching. Despite the different loci in current-voltage space traversed during these two types of switches, we find the impact on dRDS(on) to be minor. This result affirms that the simpler resistive hard-switching circuit is an equally valid method to characterize dRDS(on) in eGaN.
Effect of switching speed, with transitions ranging from 1-50 ns.
Effect of third quadrant operation. Some GaN technologies suffer from adverse trapping effects when operated in reverse conduction, as can occur during dead time or synchronous operation in a dc-dc converter. We see no evidence for these effects in eGaN.
Figure 1