Design of High-Performance Rram through Interfacial Engineering Toward Neuromorphic Application by Low-Temperature Plasma Selenization Process

The probabilistic formation of conducting filament (CF) in two-terminal Resistive switches affects the device functionality. The spontaneity of formation of CF is the key factor in determining the device reliability and can be controlled by functional layer dynamics near the interface. This functional layer can act as a series resistance as well as a barrier layer against the random migration of metallic ion and oxygen vacancies. Here, we propose the interfacial engineering by inserting WO₃/WSe₂ layer between the electrolyte and the active electrode. The proposed WO₃/WSe₂ layer provides fine control over diffusion of oxygen vacancy across AL₂O₃/WO₃ interface, thus provide reliable and high performance for RRAM devices. In addition, inductively coupled plasma (ICP) process is used to change the WO₃/WSe₂ ratio to obtain the high-performance Resistive switch. The use of ICP process facilitates the synthesis of transition metal dichalcogenide (TMDs) through plasma selenization process at a temperature as low as 300⁰C. Therefore, the temperature required for TMDs synthesis is drastically reduced in comparison to conventional CVD process. The plasma synthesized WO₃/ WSe₂ is coupled with AL₂O₃ to form a hybrid structure for Resistive switching device. Compared with Pt/AL₂O₃/W device, the optimized Pt/Al₂O₃/WO₃/WSe₂/W hybrid structure show improvement in on/off ratio (10⁴-10⁵), multilevel characteristics (uniform LRS/HRS distribution) and retention (10 years). The results indicate that plasma engineered interface engineering can be a promising approach for improved and high-performance RRAMs.