Time Resolved Annealing of Interface Traps in Polysilicon Gate Metal‐Oxide‐Silicon Capacitors

The annealing of interface traps in polysilicon gate metal‐oxide‐silicon (MOS) structures has been studied using rapid thermal annealing. Capacitors with different gate geometries were annealed in forming gas and in nitrogen at 400°, 450°, and 500°C for times ranging from 15s to 1h. Three distinct annealing mechanisms were observed: lateral diffusion of hydrogen from the ambient under the polysilicon gate, vertical diffusion of hydrogen from the ambient through the polysilicon gate, and annealing by residual hydrogen in the polysilicon and the oxide. An equilibrium model describing the annealing of interface states by lateral diffusion of molecular hydrogen is developed and is used to determine the diffusion coefficient of hydrogen in . The derived value of agrees well with the value measured by Schols and Maes.