ABSTRACT
This paper presents our work in developing an application specific multiprocessor system for SAT, utilizing the most recent results such as the development of highly efficient sequential SAT algorithms, the emergence of commercial configurable processor cores and the rapid progress in IC manufacturing techniques. Based on an analysis of the basic SAT search algorithm, we propose a new parallel SAT algorithm that utilizes fine grain parallelism. This is then used to design a multiprocessor architecture in which each processing node consists of a processor and a communication assist node that deals with message processing. Each processor is an application specific processor built from a commercial configurable processor core. All the system configurations are determined based on the characteristics of SAT algorithms, and are supported by simulation results. While this hardware accelerator system does not change the inherent intractability of the SAT problems, it achieves a 30-60x speedup over and above the fastest known SAT solver - Chaff. We believe that this system can be used to expand the practical applicability of SAT in all its application areas.
- 1.P. Stephan, R. Brayton, and A. Sangiovanni-Vincentelli. Combinational Test Generation Using Satisfiability. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pages 1167-1176, September 1996. Google ScholarDigital Library
- 2.W. Kunz and D. Sotoffel. Reasoning in Boolean Networks. Kluwer Academic Publishers, 1997. Google ScholarDigital Library
- 3.S. Devadas. Optimal Layout via Boolean Satisfiability. In Proceedings of IEEE International Conference on Computer-Aided Design, 1989.Google ScholarCross Ref
- 4.M. Davis and H. Putnam. A computing Procedure for Quantification Theory. In Journal of the ACM, pages 201-215, 1960. Google ScholarDigital Library
- 5.J. Silva and K. Sakallah. GRASP-A New Search Algorithm for Satisfiability. In IEEE ACM International Conference on CAD-96, page 220-227, November 1996. Google ScholarDigital Library
- 6.H. Zhang. SATO: An efficient propositional prover. In Proceedings of the International Conference on Automated Deduction, pages 272-275, July 1997. Google ScholarDigital Library
- 7.C min Li. Equivalency Reasoning to solve a class of hard SAT problems. Available from http://www.cs.washington.edu/homes/kautz/challenge/cli.ps.Google Scholar
- 8.M. Moskewicz, C. Madigan, Y. Zhao, L. Zhang and S. Malik. Engineering a (Super?) Efficient SAT solver. In Proceedings of Design Automation Conference, 2001. Google ScholarDigital Library
- 9.M. Abramovici and D. Saab. Satisfiability on Reconfigurable Hardware. In Seventh International Workshop on Field Programmable Logic and Applications, September 1997. Google ScholarDigital Library
- 10.P. Zhong, M. Martonosi, S. Malik and P. Ashar, Solving Bool ean Satisfiabiligy with Dynamic Hardware Configuration. In Proceedings International Workshop on Field Programmable Logic and Applications, FPL'98, August 1998. Google ScholarDigital Library
- 11.Xtensa configurable processor. http://www.tensilica.comGoogle Scholar
- 12.Benjamin W. Wah, Guo-Jie Li and Chee Fen Yu. Multiprocessing of combinational search problems. In IEEE computer. Pages 93-108, June 1985.Google Scholar
- 13.C. Powley, C. Ferguson and R. Korf. Parallel heuristic search: Two approaches. In Vipin Kumar, P.S. Gopalakrishnan, and L.N.Kanal, editors, Parallel Algorithms for Machine Intelligence and Vision. Springer-Verlag, New York, NY 1990. Google ScholarDigital Library
- 14.Y. Zhao, S. Malik, M. Moskewicz and C.Madigan. Matching Architecture to Application via Configurable Processors: A Case Study with Boolean Satisfiability. In Proceedings of International Conference on Computer Design, 2001. Google ScholarDigital Library
- 15.Velev, M., FVP-UNSAT.1.0, FVP-UNSAT.2.0, VLIW-SAT. 1.0, SSS-SAT.1.0, Superscalar Suite 1.0/1.0a, Available from: http://www.ece.cmu.edu/~mvelev.Google Scholar
Index Terms
- Accelerating boolean satisfiability through application specific processing
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