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Adaptable AES implementation with power-gating support

Published:16 May 2016Publication History

ABSTRACT

In this paper, we propose a reconfigurable design of the Advanced Encryption Standard capable of adapting at runtime to the requirements of the target application. Reconfiguration is achieved by activating only a specific subset of all the instantiated processing elements. Further, we explore the effectiveness of power gating and clock gating methodologies to minimize the energy consumption of the processing elements not involved in computation.

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  • Published in

    cover image ACM Conferences
    CF '16: Proceedings of the ACM International Conference on Computing Frontiers
    May 2016
    487 pages
    ISBN:9781450341288
    DOI:10.1145/2903150
    • General Chairs:
    • Gianluca Palermo,
    • John Feo,
    • Program Chairs:
    • Antonino Tumeo,
    • Hubertus Franke

    Copyright © 2016 Owner/Author

    Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 16 May 2016

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    Acceptance Rates

    CF '16 Paper Acceptance Rate30of94submissions,32%Overall Acceptance Rate240of680submissions,35%

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