Quantitative Evaluation of Dopant Loss in 5–10 keV As Ion Implantation for Low-Resistive, Ultrashallow Source/Drain Formation

The effectiveness of low-energy 5–10 keV As ion implantation for sub-0.1 µm metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been investigated. When implantation energy is lowered to 5 keV at a dose of 1×10¹⁴ cm^-2, the sheet resistance of the diffused layer increases steeply. The origin of the sheet resistance increase in 5–10 keV As ion implantation has been quantitatively studied paying attention to dopant loss. We found that 43% of implanted As remains in a 5 nm screen oxide when implantation energy is lowered to 5 keV. Moreover 50–70% of As in Si is lost by dopant pileup at the SiO₂/Si interface during 850°C annealing. The pileup problem becomes more severe with junction depth reduction. By optimizing the implantation energy and the ion dose, both low sheet resistance and ultrashallow junction depth have been simultaneously achieved.