Vertical System Integration by Using Inter-Chip Vias and Solid-Liquid Interdiffusion Bonding

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Published 11 June 2004 Copyright (c) 2004 The Japan Society of Applied Physics
, , Citation Armin Klumpp et al 2004 Jpn. J. Appl. Phys. 43 L829 DOI 10.1143/JJAP.43.L829

1347-4065/43/7A/L829

Abstract

A new approach for 3D system integration, called Inter Chip Via-Solid Liquid Interdiffusion (ICV-SLID) is introduced. This is a new chip-to-wafer stacking technology which combines the advantages of the Inter Chip Via (ICV) process and the solid-liquid-interdiffusion technique (SLID) of copper and tin. The fully modular ICV-SLID concept allows the formation of multiple device stacks. A test chip was designed and the total process sequence of the ICV-SLID technology for the realization of a three-layer chip-to-wafer stack was demonstrated. The proposed wafer-level 3D integration concept has the potential for low cost fabrication of multi-layer high-performance 3D-SoCs and is well suited as a replacement for embedded technologies based on monolithic integration.

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10.1143/JJAP.43.L829