Abstract
We fabricated a NOR-type memory cell composed of a ferroelectric-gate thin-film transistor (FeTFT) and an insulated gate thin-film transistor (TFT), which were a memory element and a select switch, respectively. The FeTFT consisted of a heteroepitaxially stacked oxide structure of ZnO (n-type semiconductor)/Pb(Zr,Ti)O3 (PZT; ferroelectric)/SrRuO3 (bottom-gate electrode) on a SrTiO3 substrate. An insulated gate stack of Au/Ti (top-gate electrode)/SiNx (insulator) was formed on the ZnO film. The drain electrode of the FeTFT was common to the source electrode of the TFT. The current–voltage (Ids–Vgs) characteristics of the FeTFT exhibited a high ON/OFF ratio of 105 by applying sweeping bottom-gate voltages (Vgs) from -10 to 10 V. After the removal of gate bias, the ON and OFF states were preserved by the remnant polarization of the ferroelectric film. Moreover, the current–voltage characteristics of the TFT exhibited an ON/OFF ratio of 105. The field effect mobility of the TFT was estimated to be 25 cm2 V-1 s-1, which corresponded to an electron mobility of 26 cm2 V-1 s-1 measured for the ZnO film by a van der Pauw method. However, the field effect mobility of the FeTFT, typically 0.1 cm2 V-1 s-1, was quite different from those values. The difference in field effect mobility was attributed to whether current flowed along the ZnO/PZT or SiNx/ZnO interface. We also confirmed the write and read operations of the memory cell using pulse sequences.