Abstract
MOS structures based on p-and n-type silicon and subjected to the effect of voltages of both polarities with a magnitude as large as 70 V are studied. In all cases, an increase in the effective positive charge at the Si/SiO2 boundary was observed. In the case of structures with p-Si, a steplike increase in the high-frequency capacitance in the inversion region at some value of the threshold voltage was observed. The increase in the capacitance and the threshold voltage were governed by the value of the effective charge and the area of the gate of the structure. The observed effect is accounted for by lateral diffusion of free electrons accumulated in the semiconductor in the vicinity of the gate contact. After completion of the effect of the voltage on the structures, the capacitance-voltage characteristics were recovered to the state close to the initial state in the relaxation time characteristic of reverse drift of ions and emission of charge carriers by tunneling from “slow” traps in the vicinity of the Si/SiO2 interface.
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Original Russian Text © E.A. Bobrova, N.M. Omeljanovskaya, 2008, published in Fizika i Tekhnika Poluprovodnikov, 2008, Vol. 42, No. 11, pp. 1380–1383.
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Bobrova, E.A., Omeljanovskaya, N.M. Features of the capacitance-voltage characteristics in a MOS structure due to the oxide charge. Semiconductors 42, 1351–1354 (2008). https://doi.org/10.1134/S1063782608110213
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DOI: https://doi.org/10.1134/S1063782608110213