All-Port MIMO Admittance Passivity for Robust Stability of DC–DC Interlinking Converters

This article explores the passivity properties of a dc–dc converter's unterminated all-port MIMO admittance matrix, for analyzing and preventing the converter's destabilizing impact in grid-connecting (interlinking) scenarios with an arbitrary, even meshed, termination (grid impedance). In addition to the passivity properties of the converter's unterminated input and output self admittances, the coupling passivity property is examined, which accounts for the possible destabilizing impact of port-coupling. The dependence of these properties on the control loop parameters is exemplified using a current-controlled buck converter. Examples of two techniques for enhancing a converter's all-port MIMO admittance passivity, by active damping impedance emulation and multisampled pulse width modulation, are examined and shown to be effective. The proposed methodology is validated both in frequency and time domain, using control hardware-in-the-loop simulations, as well as experimentally, using a laboratory prototype.

Abstract-This article explores the passivity properties of a dcdc converter's unterminated all-port MIMO admittance matrix, for analyzing and preventing the converter's destabilizing impact in grid-connecting (interlinking) scenarios with an arbitrary, even meshed, termination (grid impedance).In addition to the passivity properties of the converter's unterminated input and output self admittances, the coupling passivity property is examined, which accounts for the possible destabilizing impact of port-coupling.The dependence of these properties on the control loop parameters is exemplified using a current-controlled buck converter.Examples of two techniques for enhancing a converter's all-port MIMO admittance passivity, by active damping impedance emulation and multisampled pulse width modulation, are examined and shown to be effective.The proposed methodology is validated both in frequency and time domain, using control hardware-in-the-loop simulations, as well as experimentally, using a laboratory prototype.
Though the unterminated modeling and measurement principles were established long-time ago [19], [20], [21], [22], [23], [24], they have only recently started being applied to all-port (unterminated) impedance-based stability analysis [18], [25], [26] and the corresponding admittance passivity-oriented design [27], [28].Along this line, with an aim to overcome the above discussed limitations of the standardly used admittance passivity criterion, the all-port MIMO admittance passivity criterion for dc-dc converters was proposed in [27].The criterion arises from the all-port MIMO impedance-based method [18], which assesses stability by applying the generalized Nyquist criterion to the product of the grid's unterminated MIMO impedance matrix and the converter's unterminated MIMO admittance matrix.Stemming from this and assuming a passive grid's unterminated MIMO impedance matrix, the all-port MIMO admittance passivity criterion imposes passivity of the converter's unterminated MIMO admittance matrix as a sufficient condition for system stability.This admittance matrix characterizes the converter's small-signal dynamics under ideal termination and can be used as a building block for analyzing interconnection dynamics [19], [20], [21], [22], [23], [24].Thus, the all-port MIMO admittance passivity criterion allows to analyze the impact of the grid-connecting converter in a general case of an arbitrary (even meshed) termination.
The MIMO admittance passivity condition from [27] involves evaluating the positive semidefiniteness of the matrix obtained as one half of the sum of the converter's unterminated all-port Fig. 1.(a) Two-subsystem representation for the impedance-based stability analysis of the two-port grid-connecting (interlinking) converter, (b) small-signal representation of the system from (a) and (c) the simplified equivalent representation of (b), featuring the all-port MIMO matrix notation.In (b) and (c), the converter's control system's reference perturbation r is justifiably assumed to be zero (see footnote 1).MIMO admittance matrix and its complex conjugate transpose [29].For this, the nonnegativity of the resulting matrix's principal minors [30], [31], termed MIMO admittance passivity properties, was evaluated in [27].These properties were then used to predict the port-coupling induced instability of a currentcontrolled buck converter.However, this instability was not demonstrated experimentally and the methods for its prevention were not addressed in [27].Furthermore, impact of different control loop parameters on the MIMO passivity properties was not examined.
With the methodology from [27] as a foundation, this article aims to fill in these gaps and present a generally applicable passivity-oriented controller design framework, exemplified through a simple digital current-controlled buck converter.The dependence of its all-port MIMO admittance passivity properties on several current control loop's parameters is examined at frequencies where contribution of outer loops can be neglected.Based on this, multisampled pulse width modulation (MS-PWM) [32], [33], [34], which has so far been known for enhancing only the converter's output (switched-node side) admittance passivity at high frequencies [13], [14], is shown to be advantageous for enhancing also the converter's all-port MIMO admittance passivity.Consequently, its capability to prevent the high-frequency port-coupling induced instability is experimentally demonstrated in this article.As an example of the control strategy that can successfully enhance the all-port MIMO admittance passivity at lower frequencies, input-voltage feedforward-based damping impedance emulation from [12] is explored, which has so far been known for enhancing only the converter's input (dc-link side) admittance passivity [12].In addition, it is revealed in this article that, by combining MS-PWM and the input-voltage feedforward, the MIMO admittance passivity can be simultaneously enhanced at low-and highfrequencies.As an addendum, an alternative, input-feedforward passivity index-based approach for characterizing the MIMO admittance passivity is illustrated.It relies on the minimum eigenvalue-based positive semidefiniteness condition [30].
The rest of this article is organized as follows.Section II introduces the all-port MIMO admittance passivity criterion and the MIMO admittance passivity properties.Their impact on the stability in grid-connecting scenarios, as well as their dependence on the control loop's parameters is illustrated in Section III.In Section IV, the passivity enhancement methods are proposed and verified using control hardware-in-the-loop (C-HIL) simulations.Experimental validation, both in frequencyand time-domain, is addressed in Section V. Finally, Section VI concludes this article.

A. MIMO Impedance-Based Method
To determine small-signal stability properties of a gridconnecting (interlinking) converter, such as one from Fig. 1(a), the all-port MIMO impedance based-method can be used, which is thoroughly analyzed in [18].Its fundamental principles, that are relevant for the methodology presented in this article, are outlined below.The detailed derivations can be found in [18].As an example, a two-port dc-dc converter from Fig. 1(a) is considered hereafter, but the methodology is directly applicable to multiport dc-dc converters.Due to an added layer of complexity in small-signal modeling of systems with a time-varying operating point, ac-dc converters will be addressed in a separate work.
The MIMO impedance-based method relies on the equivalent small-signal s-domain representation shown in Fig. 1(b) [18].It involves representing the converter via the unterminated MIMO admittance matrix Y(s) where s is the complex variable of the Laplace transform, and where î1,2 (s), v1,2 (s) are Laplace transforms of small-signal perturbations of i 1,2 , v 1,2 from Fig. 1(a).The expressions for Y 11 (s), Y 12 (s), Y 21 (s), and Y 22 (s) can be derived based on the small-signal model of the converter and its control system [35], which is addressed in Section III-B.
The grid is represented by the Thevenin voltage sources vg1 (s) and vg2 (s) and the unterminated MIMO impedance matrix Z g (s) where Z g11 , Z g12 , Z g21 , and Z g22 are defined analogously to Y 11 , Y 12 , Y 21 , and Y 22 in (2).In case the system is not meshed, i.e., the ports of the converter under study are solely interconnected by the converter itself [18], the grid's impedance matrix becomes diagonal (Z g12 = Z g21 = 0).According to Fig. 1(b), the following holds1 : where T , and T is the transpose operator.Subsequently, the circuit from Fig. 1(b) can be represented in a compact form shown in Fig. 1(c).Then, assuming that the grid is standalone stable (v g (s) is stable), stability of the grid-connecting converter can be determined by applying the generalized Nyquist stability criterion to the minor-loop gain L(s) = Y(s)Z g (s) [18].

B. MIMO Admittance Passivity Criterion
For determining a sufficient condition for the stability of the system from Fig. 1, the all-port MIMO admittance passivity criterion can be used, which is derived by applying the frequencydomain passivity theory principles [29] to (4).Namely, provided that the grid's unterminated all-port MIMO impedance matrix Z g (s) is passive, a sufficient condition for the stability of the interconnected system is passivity of the converter's unterminated all-port MIMO admittance matrix Y(s).The transfer function matrix such as Y(s) is called passive if Y(s) is stable and where H is the Hermitian (conjugate transpose) operator [29].Note that, due to the desired power conversion and regulation capabilities, as well as the system delays, a converter can never dissipate energy at all frequencies [7], [8].Thus, in practice, the passivity condition ( 5) is usually relaxed to a frequency range Ω that is critical for stability [7], [8], [9], [10], [11], [12].Though this may be ambiguous from the strict passivity theory principle point of view, it has proven sufficient in practical power electronics applications [7], [8], [9], [10], [11], [12].Although there is still no unique regulation that defines the range Ω, some examples of the limits imposed by system integrators or standards can be found in [36], [37].Also, the range Ω can be determined as a set of frequencies where grid's antiresonances (or high grid impedance magnitudes), are known to be present, or where control loops are known to introduce stability problems.
For the presentation conciseness, this notation is omitted in the subsequent conditions (such as ( 6)-( 8), (24)) that are derived from (5).Inequality (5) can be evaluated via any of the approaches that are standardly used in linear algebra to determine positivesemidefiniteness of a matrix P [30].Hereafter, the approach that evaluates nonnegativity of all its principal minors is used [31].An alternative approach that evaluates nonnegativity of its minimum eigenvalue, which corresponds to the input feedforward passivity index of Y(s), is addressed in the Appendix.
According to the principal minors-based approach, for 2 × 2 Y(s) given by ( 1), ( 5) is equivalent to P 2 (jω) ≥ 0 (7) where Note that if the edge case P = 0 is excluded, it is sufficient to evaluate only the leading principal minors of P [31].
As for the physical meaning of the, so called, MIMO admittance passivity properties, P 1 , P 2 , and P 12 , according to (9) and (10), P 1 and P 2 represent the effective conductance of the converter's input and output self admittances Y 11 and Y 22 , respectively.On the other hand, the coupling passivity property P 12 is a mathematical term that, contrary to P 1 and P 2 , reflects passivity considering also the coupling between the converter's ports, as, according to (11), it depends not only on Y 11 and Y 22 , but also on Y 12 and Y 21 .Thus, to take into account the risk for the port-coupling induced instability, evaluation of P 12 (jω) is vital in the frequency ranges where the coupling between the converter's ports is pronounced.Such frequency ranges can be inferred as those where |Y 12 (jω)Y 21 (jω)| is relatively high.This is because when both Y 12 and Y 21 exhibit high magnitudes, impact of termination can become relevant (see e.g., (9) and (10) from [27]).

III. MIMO ADMITTANCE PASSIVITY PROPERTIES
This section exemplifies the use of the above introduced MIMO admittance passivity properties for analyzing stability and developing robust-stability oriented control methods for an interlinking converter in several grid-connecting scenarios.

A. Control System Under Study
To illustrate core principles without introducing unnecessary complexity, hereafter, a single-stage digital output currentcontrolled pulsewidth-modulated two-level buck converter is considered.Nevertheless, the methodology from this article can be applied to other two-level and multilevel topologies, as well as other single-and multi-stage control system architectures.The block diagram of the considered control system is shown in Fig. 2 and described below.
The inductor current is sampled at the rate f s = 1 T s = N s f pwm , where N s is the multisampling factor and f pwm = 1 T pwm is the frequency of the triangular PWM carrier w.The (feedback) sampling instants are synchronized with w so that one of them always coincides with w = 0, while the others are equidistantly spaced across T pwm .Without any nonidealities, this allows for the average current to be sampled when N s = 1 or N s = 2.To enhance noise immunity and/or modulator linearity [32], [34], [38], the sampled current may be processed by a digital filter G fil (z).Afterwards, in the case of multirate control strategies [32], [38], an example of which is discussed in Section V, a rate change from f s to f c = 1 T c = N c f pwm may be imposed, where N c and f c are the control update factor and frequency, respectively.In the case of single-rate control strategies, considered in Sections III and IV as well as in one of the examples in Section V, N c = N s and the entire digital domain is executed at a single rate, determined by the feedback sampling frequency f s .In either case, the control update instants are synchronized with w so that one of them always coincides with w = 0 while the others are equidistantly spaced across T pwm .
The (filtered and/or decimated) feedback signal i f is subtracted from the current reference i 2r and the resulting error signal is processed by the current controller.As an example [39], the proportional integral (PI) controller is used, whose z-domain transfer function is where z is the complex variable of Z transform, k p = 2πf cr L c and k i = 2π0.1fcr k p are the proportional and integral gain, respectively, f cr is the crossover frequency of the current control loop, and L c is the inductance of the buck converter's output filter.The gain k p is set to achieve the desired f cr , while k i is set so that the impact of the integral action is limited well-below f cr .If, with the goal of enhancing the converter's admittance passivity, it is of interest to emulate the damping impedance at the dc-link (input) port, which is addressed in Section IV-B, a positive "feedforward" action ("FF") of the converter's input voltage 2 may be added to the output of the main, feedback, current controller [12].The "feedforward" action is obtained by processing the difference between the sampled converter's input voltage v s and the dc value V 1 of the input voltage v 1 through G ff (z), whose specific structure is addressed in Section IV-B.
The overall control action m s , which is scaled to the range [0,1] and may be delayed due to a finite control algorithm computation time [39], is forwarded to the digital pulsewidth modulator.Within it, the impulse train m s [k] is held constant over one T c to obtain the continuous-time modulating signal m(t).Intersections between m and w define the switching signal x(t), which is the square waveform whose steady-state duty cycle D determines the converter's conversion ratio.Note that, for N c > 2, a proper logic is implemented to prevent multipleswitching and pulse-skipping, that, unless properly handled, can arise when intersections between m and w are vertical (as opposed to horizontal) [32].
As for the modulator, two different PWM types are considered, distinguished based on the value of N c .For N c = 2 the standardly used double-sampled PWM (DS-PWM) is obtained, where the control update is performed at peaks and valleys of the triangular carrier w [39].For N c > 2, the MS-PWM is obtained, where the control update is performed multiple times per modulation period [32], [33], [34].Motivation for using MS-PWM arises from its inherent capability to reduce digital delays [32], [33], which can be seen from the modulator's pulse-to-continuous s-domain representation where m(s) and d(s) are, respectively, Laplace transforms of the small-signal components of the continuous-time modulating signal m(t) and duty cycle d(t) of x(t), used in averaged modeling [33], [39].According to (13), the higher the control-update factor N c , the lower the modulation delay.Consequently, by reducing modulation delay [33], [39], MS-PWM can enhance control loop's dynamic performance, as well as high-frequency admittance passivity, which is addressed in Sections IV-A, IV-C, and V. 2 This can be considered as a feedforward action only in case the converter, without any input filter, is supplied from the grid with zero impedance [Z g11 = Z g12 = 0 in Fig. 1(b)], as only in this case v1 from Fig. 1 can be considered as an external disturbance.Otherwise, such an action should strictly be classified as a feedback.Still, it is in the literature most often referred to as feedforward [12].Thus, to avoid misinterpretation, the term feedforward will be kept in this article, but denoted by "" to emphasize ambiguity.
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B. Small-Signal S-Domain Representation
The small-signal s-domain representation of the system from Fig. 2 is shown in Fig. 3.According to it, (2) yields ) where

C. C-HIL Frequency Response Measurements
As a prerequisite for the subsequent passivity-based stability analysis, this section presents C-HIL frequency domain validation of the small-signal model discussed in Section III-B.For this, the simplest variant of the control system from Fig. 2, which involves a single-rate control with DS-PWM (N s = N c = 2) with neither the feedback filters (G fil = 1) nor the "feedforward" action (G ff = 0) is considered.The parameters of the buck converter under study and its control loop are given in Table I.The corresponding MIMO admittance passivity properties are shown in Fig. 4, within the frequency range from 10 Hz up to f pwm = 10 kHz.Note that, in case of control system architectures that feature outer, slower, loops (such as droop control), the passivity properties preserve qualitative resemblance to those discussed hereafter only if the contribution of the outer loops is negligible in the considered frequency range, which is typical at high frequencies [8].Research along the line of wide-band MIMO admittance passivity in presence of outer loops is left for future work.4. Unterminated all-port MIMO admittance passivity properties ( 9), ( 10), (11) of the buck converter with parameters from Table I and single-rate control system from Fig. 2, with DS-PWM (N c = N s = 2), with neither feedback filters (G fil = 1) nor "feedforward" action (G ff = 0).The results obtained from C-HIL simulations (dots) and analytical model (full lines) are shown.
The waveforms shown in Fig. 4 with full lines are obtained from the analytical model.For this, the parameters from Table I and s = jω are substituted in ( 14)-( 17) and P 1 (jω), P 2 (jω), P 12 (jω) are calculated based on ( 9), (10), and (11).The waveforms shown in Fig. 4 with dot markers are obtained from the frequency response measurements of the C-HIL implementation of the system from Fig. 2. For this, the converter is emulated via Typhoon HIL 402, with the circuit solver time step of 0.5 μs.The inductor current is acquired from the HIL's analog output.The ADC, the current control, and the DPWM are realized within B-Board PRO control platform from Imperix.To obtain Y 11 (jω), Y 12 (jω), Y 21 (jω), Y 22 (jω), and subsequently P 1 (jω), P 2 (jω), P 12 (jω), the series perturbation injection circuits were emulated in HIL, and the frequency responses of interest were obtained using HIL's dedicated SCADA widget.As seen in Fig. 4, the results obtained in this way from C-HIL simulations and those obtained from the analytical model are in agreement.

D. Grid-Connecting Scenarios Under Study
With the goal of illustrating the use of the MIMO admittancepassivity properties P 1 , P 2 , P 12 for predicting the risk for the instability of the considered converter in various grid-connecting scenarios, that is addressed in Section III-E, this section briefly explains the three considered scenarios, which are shown in Fig. 5.A nonmeshed grid is assumed (Z g12 = Z g21 = 0), whose impedances Z g11 and/or Z g22 form parallel antiresonance circuits.
In Fig. 5(a) and 5(b), the antiresonance is present at a single port only and the grid is assumed to be ideally stiff at the other port.Such scenarios, which are standardly considered [7], [8], [13], [14], represent the applications where the impact of the port-coupling on the stability is negligible.One such application is the high-frequency passivity analysis of grid-connected voltage source converters, where, with a high-enough dc-link capacitor, the impact of the dc-link dynamics on the ac-side dynamics can be neglected [13], [14], [15], [40].In such cases, the stability of the grid-connecting converter can be simply predicted by evaluating passivity of the converter's unterminated admittance where the grid's antiresonance is present.This involves evaluating (6) (or ( 7)) around f g1res (or f g2res ).
Still, there are applications in which, to accurately predict the risk for the instability, the coupling between the ports must be accounted for [4] and [16].Then, as derived from the MIMO admittance passivity condition (5) in Section II-B, it is not sufficient to evaluate only ( 6) or (7), but also (8) has to be evaluated to correctly account for the possibility of port-coupling induced instability.A scenario used in this article to represent such applications is shown in Fig. 5(c).There, the grid's impedance at both ports features the antiresonance.

E. Passivity-Based Instability Risk Prediction
Next, by evaluating whether, in the frequency range critical for stability, P 1 , P 2 , P 12 from Fig. 4 satisfy ( 6), (7), and (8), it was of interest to predict the risk for the instability of the considered converter in grid-connecting scenarios shown in Fig. 5. Along this line, it should be emphasized, that, since (5) (which is equivalent to ( 6), (7), and ( 8)) is only a sufficient, but not necessary condition for stability [29], the instability will not necessarily arise in case ( 6), (7), or (8) are not satisfied.For example, stable operation will be achieved if the net sum of what is in this article referred to as the converter's damping and the grid's damping is positive at the critical frequency [29], [41], [42].Thereby, in the unterminated all-port MIMO sense, the converter's damping at the frequency ω can be defined as the minimum eigenvalue of P(jω) [29], [42].As such, according to the Appendix, it represents the joint effect of P 1 , P 2 , P 12 , and corresponds to the input feedforward passivity index of Y(s) at the frequency ω.Analogously, the grid's damping at the frequency ω can be defined as the minimum eigenvalue of P g (jω) = 0.5(Z g (jω) + Z g H (jω)), which corresponds to the output feedback passivity index of Z g (s) at the frequency ω [29], [42].
The strict mathematical formulation and a quantitative application of the above informally stated all-port MIMO positive-net damping criterion is left for future studies.To preserve intuitiveness and simplicity, the subsequent analysis will indicate the instability risk by commenting on the extent of the converter's (negative) damping, which is determined by P 1 , P 2 , and P 12 , and the grid's (positive) damping around the critical, i.e., the grid's antiresonant frequencies.To maintain the mathematical rigor, stability assessment is, for all of the hereafter discussed scenarios and test cases, performed also using the MIMO impedance based method from Section II-A, similar as in [18].The results, which are all aligned with the corresponding time domain stability tests, are not shown due to space limitation.
The instability risk predictions in the grid connecting scenarios from Fig. 5 are discussed below for the two test cases, different in terms of the values of the grid's antiresonant frequencies (f g1res and f g2res ).They are as follows.
2) Test case 2: f g1res ≈ f g2res = 2500 Hz.As seen from Fig. 4, where the grid's antiresonant frequencies are plotted as gray dash-dotted vertical lines, in the test case 1, (6) is not satisfied around f g1res .Thus, provided that the grid's damping around f g1res is low enough, instability is expected to arise in the scenario from Fig. 5(a).The same holds for the scenario from Fig. 5(b), since (7) does not hold around f g2res .Consequently, given that the converter is prone to being destabilized when the grid features the antiresonance at a single port only [the scenarios from Fig. 5(a) and 5(b)], it is also prone to being destabilized when the grid features the antiresonances at both ports [the scenario from Fig. 5(c)].To verify these stability predictions, time domain stability tests of the circuits from Fig. 5 are performed using the above explained C-HIL implementation of the system from Fig. 2. By opening the switches sw 1,2 , the grid's damping around antiresonant frequencies is reduced, and the transient is triggered.For the grid's antiresonances' parameters corresponding to the test case 1, the converter's input and output current and voltage waveforms in response to such a transient are shown in Fig. 6(a), (b), and (c) for the scenarios from Fig. 5(a), (b), and (c), respectively.As seen, the previously made passivity-based stability predictions are in agreement with the time domain stability tests.Furthermore, the frequencies of the resulting oscillations correspond to the grid's antiresonant frequencies.
As for the test case 2, the following passivity-based stability predictions can be made based on the results from Fig. 4. Namely, since both ( 6) and ( 7) are satisfied around f g1res ≈ f g2res , regardless of how low the grid's damping around f g1res ≈ f g2res is, the system should remain stable in the scenarios from Fig. 5(a) and (b).However, despite ( 6) and ( 7) being satisfied, given that ( 8) is not satisfied around f g1res ≈ f g2res , the instability is expected to arise in the scenario from Fig. 5(c), once the grid's damping around f g1res ≈ f g2res is reduced below a certain value.To verify this, C-HIL time domain stability tests are performed, similarly as above.For the grid's antiresonances' parameters corresponding to the test case 2, the converter's waveforms in response to the transients triggered by opening the switches sw 1,2 are shown in Fig. 7(a), (b), and (c) for the scenarios from Fig. 5(a), (b), and (c), respectively.As expected, the system remains stable in the scenarios when the grid features the antiresonance at a single port only.On the contrary, in the scenario when the grid features the antiresonances at both ports, the port-coupling induced instability arises.The risk for it was successfully predicted by the proposed, unterminated all-port MIMO admittance passivity-based method.Note that, though such a risk could have also been predicted by evaluating the passivity of the terminated admittance at the port of interest, this, as explained in [27], requires having the information about the termination at the other port(s), which may not be available and can also significantly vary during grid operation.

F. Impact of Control Loop's Parameters
To prevent the instabilities that may arise in the gridconnecting scenarios, such as those analyzed above, the MIMO admittance passivity properties should be enhanced in the frequency ranges critical for stability.Along this line, it is of interest to understand first what the MIMO admittance passivity properties depend on.In principle, these properties depend on all the parameters that figure out in Y 11 -Y 21 from ( 14)- (17).For the control system without the "feedforward" action, some of the parameters relevant for these dependencies are the current reference I 2r , the duty cycle D, the control loop's crossover frequency f cr and the total delay τ D present in the control loop, which can be due to modulation, computation, sensing and driving circuits, filters, etc. [39].In this section, the dependence of the converter's all-port MIMO admittance passivity properties P 1 , P 2 , and P 12 on the last two of these parameters (f cr and τ D ) is investigated.For this, a simplified s-domain representation of the system from Fig. 2 without the "feedforward" action is used.It involves representing all the elements that introduce the First, the crossover frequency is swept from 0.05f pwm to 0.2f pwm , while the delay is kept constant at τ D =3 2 T pwm 2 .This value of τ D is adopted as it corresponds to the standardly used single-rate control (without digital feedback filters) that involves DS-PWM and one-step computational delay.The other relevant parameters are the same as in Table I.The results for P 1 , P 2 , P 12 are shown in Fig. 8(a), (b), and (c), respectively.As can be seen, the width of the first, low-frequency, active region of P 1 is lower for lower values of f cr , which is a well-known property of the converter's negative input resistance behavior [6].The negative dip of the second, high-frequency, active region of P 1 is also lower for lower values of f cr .The same holds for the negative dip of the high-frequency active region of P 2 , which is in agreement with the results from [13].As for the impact of f cr on P 12 , reduction of f cr reduces the width of the active region.The high-frequency negative dip is also reduced.Still, the low-frequency negative dip starts to arise for very low values of f cr .Overall, according to the above outlined remarks, reduction of f cr , i.e., control loop's bandwidth, can be considered beneficial for enhancing converter's all-port MIMO admittance passivity.However, by reducing f cr , the control loop's primary function, i.e., regulation capability, is degraded, which can be acceptable only in some applications and only up to a certain extent.Thus, alternative methods for enhancing all-port MIMO admittance passivity should be investigated, which is addressed in Section IV.
To illustrate dependence of the converter's passivity properties on the delay, τ D is swept from 3 0 to T pwm , while the crossover frequency is kept constant at f cr = 0.14f pwm , which yields a 48 • phase margin for DS-PWM with one step computation delay.The other relevant parameters are the same as in Table I.The results for P 1 , P 2 , P 12 are shown in Fig. 9(a), (b), and (c), respectively.As seen, τ D has negligible impact at lower frequencies, while it significantly impacts the high frequency passivity.By reducing τ D , the width of the first active region of P 1 is increased.Nevertheless, the second active region of P 1 can be completely eliminated by reducing τ D .The same holds for the high-frequency active region of P 2 , which is a well-known property of the converter's output admittance [13], [14].Reduction of τ D has positive impact on the coupling passivity property P 12 as well, since its negative dip is reduced.Given all of the above mentioned, it can be concluded that the delay reduction enhances high-frequency all-port MIMO admittance-passivity. Furthermore, the delay reduction is also beneficial from the control loop's dynamic performance point-of-view, since, for the same crossover frequency, the lower delay yields the higher phase margin [32], [33].This delay reduction is effectively obtained using MS-PWM, as addressed in the following section.

A. Multisampled Pulse Width Modulation (MS-PWM)
The positive impact of MS-PWM on the high-frequency passivity of the converter's output admittance Y 22 , which is described by P 2 , is well-documented in the literature [13], [14].Nevertheless, its positive impact on the converter's unterminated all-port MIMO admittance passivity has not been reported before.To illustrate this, the system from Fig. 2 that involves a single-rate control with MS-PWM (N c = N s = 4) with neither the feedback filters nor the "feedforward" action is considered.The parameters from Table I are used.The passivity properties P 1 , P 2 , and P 12 of such a system are plotted in Fig. 10.As before, the frequency responses obtained from the analytical model (full lines) and C-HIL simulations (dot markers) are shown, and, as seen, an excellent match between them is achieved.In addition, the analytically obtained passivity properties corresponding to the previously analyzed system with DS-PWM (shown with full lines in Fig. 4) are also shown in Fig. 10 (with dashed lines).As seen, by reducing digital delays, at high frequencies MS-PWM significantly reduces negativity of not only P 2 , but also P 1 and P 12 .As such, MS-PWM can be considered beneficial for enhancing the converter's unterminated all-port MIMO admittance passivity at high frequencies.
To further elaborate on this, the stability in the grid-connecting scenarios from Fig. 5 is discussed next, considering the same test-cases and the grid's antiresonances' parameters as in Section III-E.Since, contrary to DS-PWM, with MS-PWM ( 7) is satisfied around f g2res , for the test case 1, the stability should be guaranteed in the scenario from Fig. 5(b).Furthermore, since, compared to DS-PWM, the coupling passivity property P 12 is considerably enhanced with MS-PWM (its negative dip is lower) around f g1res ≈ f g2res , for the test case 2, the system is less prone to getting destabilized in the scenario from Fig. 5(c).Then, provided that the grid's positive damping is higher than the converter's remaining negative damping around f g1res ≈ f g2res , the port-coupling instability can be prevented.As for the rest of the scenarios and test cases from Section III-E, stability with MS-PWM should remain the same as with DS-PWM.To validate this, the time domain stability tests are performed using C-HIL, where the transient is triggered by reducing the grid's damping, as in Section III-E.The plots of the converter waveforms in response to such transients are not included due to space limitations, but the overview of the results is provided in Table II.As seen, MS-PWM successfully prevents the high frequency instabilities that arise with DS-PWM, which is in agreement with the above discussed passivity-based stability predictions, derived from the proposed method.Not only is the instability caused by solely the interactions at the second port [test case 1, scenario from Fig. 5(b)] prevented by MS-PWM, but so is the port-coupling induced instability [test case 2, scenario from Fig. 5(c)].
Therefore, due to its capability to enhance the converter's unterminated all-port MIMO admittance passivity at high frequencies, MS-PWM can be considered very effective for preventing the converter's high-frequency destabilizing interactions with the grid.Note that similar properties are expected with other low phase-delay modulators, such as double-sampled asymmetric dual-edge modulator [43].Nevertheless, since the converter's active behavior at lower frequencies is not caused by the delays, digital delay reduction methods, on their own, do not have the capability to enhance the low-frequency passivity.For this, alternative methods are needed, one example of which is addressed below.

B. "Feedforward"-Based Damping Impedance Emulation
The positive "feedforward"-based damping impedance emulation has been proposed in [12] as an effective method for enhancing the converter's input admittance in a bandlimited low-frequency range.The idea behind using the "feedforward" action, marked in gray color in Figs. 2 and 3, for emulating the damping impedance at the converter's input can be explained as follows.According to (14), Y 11 (s) can be written as where is the converter's unterminated input admittance without the "feedforward" action, while is the unterminated admittance's part added by the "feedforward" action.Accordingly, the contribution of the input-voltage "feedforward" action can be seen as an additional parallel damping impedance Z vi at the converter's input port.
In the presence of nonzero grid's impedance at the converter's input port (such as Z g11 ), the "feedforward" action may have the negative impact on the performance of the main feedback control loop [12].To minimize this, it is of interest to choose Z vi (s) so that its impact is limited only within the narrow frequency range that is critical for stability [12].As elaborated in [12], this can be achieved if the virtual damping impedance Z vi (s) exhibits the structure of the series RLC circuit where R vi , L vi , and C vi can be chosen to achieve the desired damping in the desired frequency range.This involves setting the appropriate values of the resonant frequency, quality factor, and characteristic impedance [35] that the resonance formed by R vi , L vi , and C vi shall satisfy.The "feedforward" action, through which the desired damping impedance Z vi (s) can be emulated, can be calculated from ( 20) Along this line, a few aspects should be noted.First, to ensure the desired damping performance despite possible variation of D, L c , R c , and other parameters, adaptive control may have to be employed.Second, all the delay-like elements (such as modulation, computation, or feedback filtering) are neglected in (22), to make the practical realization of G ff (s) feasible.With such a virtual damping design approach, which is used in this article as an example, depending on the desired frequency range for the virtual damping impedance emulation (the resonant frequency of Z vi from ( 21)), the emulated virtual damping impedance's frequency response will differ from the desired one (described by ( 21)), to an extent determined by the amount of the delays present within the control loop.Thus, unless combined with some delay reduction methods, the resonant frequency of Z vi from ( 21) should be kept below frequencies where delays significantly change phase of the system.Next, unless combined with some online resonance detection algorithm and adaptive control [44], the "feedforward" method will be effective only Fig. 11.Unterminated all-port MIMO admittance passivity properties ( 9), (10), and ( 11) of the buck converter with parameters from Table I and single-rate control from Fig. 2, without feedback filters (G fil = 1), with DS-PWM (N c = N s = 2) and the "feedforward" action (from ( 22)).The results obtained from C-HIL simulations (dots) and analytical model (full lines) are shown.Dashed lines correspond to the analytical results from Fig. 4.
if the frequency range where the damping is needed does not change significantly.Finally, for the implementation within a digital control system, G ff (s) should be discretized to obtain G ff (z), for which the pole-zero matching discretization method is used in this article.
Though reported as effective for enhancing passivity of the converter's input admittance [12], the capabilities of the above described control method to enhance the converter's unterminated all-port MIMO admittance passivity have not been explored in the literature so far.Along this line it should be mentioned first that, since the "feedforward" action affects not only Y 11 , but also Y 21 , it impacts both P 1 and P 12 .Still, according to ( 14) and ( 17), this impact is "of opposite sign."Accordingly, though the lower R vi always enhances P 1 , this does not necessarily hold for P 12 .Thus, care has to be taken when designing the feedforward action to ensure enhancement of both P 1 and P 12 .Research along this line is left for future.
As an example that illustrates the impact of the "feedforward" action on the all-port MIMO admittance passivity, the system from Fig. 2 that involves a single-rate control with DS-PWM (N c = N s = 2) without feedback filters and with the "feedforward" action is considered.Same as before, the parameters of the converter and the main feedback current control loop from Table I are used.The "feedforward" action is designed so that the virtual damping impedance (21) ensures passivity of Y 11 around f g1res , which corresponds to the standard input admittance passivity-oriented design [12].
The passivity properties P 1 , P 2 , and P 12 of such a system are plotted in Fig. 11.As before, the frequency responses obtained from the analytical model and C-HIL simulations are shown.In addition, the analytically obtained passivity properties corresponding to the system with DS-PWM and without the "feedforward" action (analyzed in Section III-C) are also shown in Fig. 11, for comparison.As seen, the addition of the "feedforward" action enhances passivity around f g1res of not only P 1 , but also P 12 .
To further elaborate on the impact of the "feedforward" action on the converter's admittance passivity, the stability in the grid-connecting scenarios from Fig. 5 is discussed next, considering the same test-cases and the grid's antiresonances' parameters as in Section III-E.Contrary to DS-PWM without the "feedforward" action, for DS-PWM with the "feedforward" action, ( 6) is satisfied around f g1res .Thus, for the test case 1, stability should be guaranteed in the scenario from Fig. 5(a).However, by adding the "feedforward" action P 2 and P 12 remain unaltered around f g2res and f g1res ≈ f g2res , respectively.Therefore, same as the system with DS-PWM and without the "feedforward" (Section III-C), the system with DS-PWM and the "feedforward" action is expected to be destabilized in the scenarios from Fig. 5(b) and (c), for test case 1, and in the scenario from Fig. 5(c), for test case 2.
To validate this, the time domain stability tests are performed using C-HIL, where the transient is triggered by reducing the grid's damping, as in Section III-E.The plots of the converter waveforms in response to such transients are not included due to space limitations, but the overview of the results is provided in Table II.As predicted, the addition of the input voltage "feedforward" action successfully prevents the instability from Fig. 6(a), which is caused by the low-frequency active region of Y 11 .Nevertheless, as discussed above, the high-frequency destabilization issues from Fig. 6(b) and (c), as well as Fig. 7(c) are not solved by adding the input-voltage "feedforward" action (see Table II).This is because the "feedforward"-based damping impedance emulation is in the considered example intentionally designed as a low-frequency bandpass action (in this case around f g1res ), to limit its negative impact on the main control loop and achieve the desired damping action in presence of nonnegligible digital delays.Furthermore, this method does not alter Y 22 at all, as seen from (15).Therefore, with the goal of enhancing the converter's unterminated all-port MIMO admittance passivity simultaneously at low-and high-frequencies, it may be of interest to combine the input voltage "feedforward"-based damping impedance emulation with other methods, like MS-PWM, which is addressed below.

C. Combination of MS-PWM and the "feedforward"
In this subsection, the system from Fig. 2 that involves a single-rate control with MS-PWM (N c = N s = 4) without feedback filters and with the "feedforward" action is considered.Same as before, the parameters of the converter and the main feedback current control loop from Table I are used, while the parameters of the "feedforward" action are the same as in Section IV-B.The passivity properties P 1 , P 2 , and P 12 of such a system, obtained from the analytical model and C-HIL simulations, are plotted in Fig. 12, again benchmarked against the case of DS-PWM without the feedforward action.As seen, the "feedforward" action and the MS-PWM act independently, enhancing thereby the converter's unterminated all-port MIMO admittance passivity in the two distinct frequency ranges.The Fig. 12. Unterminated all-port MIMO admittance passivity properties ( 9), (10), and ( 11) of the buck converter with parameters from Table I and single-rate control from Fig. 2, without feedback filters (G fil = 1), and with both MS-PWM (N c = N s = 4) and the "feedforward" action (from ( 22)).The results obtained from C-HIL simulations (dots) and analytical model (full lines) are shown.Dashed lines correspond to the analytical results from Fig. 4.
former contributes to P 1 and P 12 becoming positive at low frequencies, specifically around f g1res for the considered design of the "feedforward" action.The latter contributes to improving P 1 , P 2 , and P 12 at high-frequencies (which includes f g2res and f g1res ≈ f g2res ).Thus, all the instabilities (from Figs. 6 and 7) that the system with DS-PWM and without the "feedforward" action was causing in the grid-connecting scenarios from Fig. 5 are expected to be successfully overcome by using MS-PWM and the "feedforward" action.To demonstrate this, time-domain stability tests using C-HIL are performed.The transient is triggered by reducing the grid's damping, same as before.
The converter's input and output current and voltage waveforms in response to such transients are shown in Figs. 13 and 14 for the test case 1 and 2, respectively.Compared to the results from Figs. 6 and 7, obtained for DS-PWM without the "feedforward" action, by using MS-PWM with the "feedforward" action, not only are the instabilities caused by, respectively, low-and high-frequency nonpassive regions of Y 11 and Y 22 successfully prevented, but so is the port-coupling induced instability.As seen from Table II, where an overview of all the previously discussed time-domain stability test results is provided, only by using both MS-PWM and the "feedforward" action is the stability ensured in all considered grid-connecting scenarios and test-cases.It is worth mentioning that, as opposed to the above discussed independent action of the MS-PWM and the "feedforward" in the two distinct frequency ranges, these methods can also be combined in a way to act jointly in the same frequency range (e.g., near or slightly above f cr ).Research along this line is left for future studies.Finally, depending on the properties of the grid under study, i.e., the frequency ranges where it exhibits (anti)resonances, use of only one of the above discussed methods may be sufficient.One such application example is considered for the experimental validation in Section V.

A. System Under Test
In this section, experimental validation of the previously analyzed phenomena is presented.For this, the test-setup from Fig. 15 is used, which features a digital current-controlled buck converter with the parameters from Table III.The converter is realized using the half bridge modules PEB8024 from Imperix 4 The phase margin values are lower than typically targeted due to the control loop's total delay τ D and crossover frequency f cr both being high.High τ D is due to the feedback filters, which are added to suppress the detrimental impact of the switching noise [38].High f cr was necessary to trigger the port-coupling induced instability due to very large parasitic resistances of the LC elements used to form the grid's antiresonances (see Section V-C).
Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.Fig. 16.Unterminated all-port MIMO admittance passivity properties ( 9), (10), and ( 11) of the buck converter with parameters from Table III and multirate control system from Fig. 2 (G ff = 0) that involves MR-DS-PWM with N c = 2, N s = 10, and the feedback filtering from [38].Results obtained experimentally (crosses), using the setup from Fig. 15, and analytically (full lines) using the model from Section III-B, are shown.and an external inductor.The dc voltages at the converter's input and output ports are provided by the dc power supply Chroma 62050P-100-100 and the electronic load EA-EL 9750-120 B. The inductor current is sensed by the current sensor LEM CKSR 50-P and the digital control is realized on B-Box rapid prototyping control platform from Imperix.Two different control system architectures are tested, both corresponding to Fig. 2 without the "feedforward" action and with the digital feedback filtering from [38].The latter, which was necessary in order to prevent the deteriorating impact of the switching noise, involves the cascade of a repetitive ripple removal and median filter [38].The first tested architecture involves a multirate control with DS-PWM (N s = 10 and N c = 2), hereafter referred to as MR-DS-PWM [32], [38].As explained in Section II-A and illustrated in Fig. 2, in such an architecture, the feedback signal is first oversampled at the rate f s = 10f pwm , then filtered, and finally decimated to f c = 2f pwm [32], [38].The second control system architecture involves a single-rate control with MS-PWM (N s = N c = 10), hereafter referred to as MS-PWM.Same as for C-HIL validations, the PI controller was used for both experimentally tested control system architectures.

B. Frequency Response Measurements
First, it was of interest to characterize the system in the frequency domain, by obtaining P 1 (jω), P 2 (jω), and P 12 (jω) from the experimentally measured frequency responses Y 11 (jω), Y 12 (jω), Y 21 (jω), and Y 22 (jω).For this, the measurement procedure from [27] is used.It involves injecting a sinusoidal perturbation current, independently at the converter's input and output, and collecting the corresponding current and voltage waveforms of interest using Tektronix MS056 oscilloscope.The acquired data is imported in MATLAB where Fig. 17.Unterminated all-port MIMO admittance passivity properties ( 9), (10), and ( 11) of the buck converter with parameters from Table III and singlerate control system from Fig. 2 (G ff = 0) that involves MS-PWM with N c = N s = 10, and the feedback filtering from [38].Results obtained experimentally (crosses), using the setup from Fig. 15, and analytically (full lines) using the model from Section III-B, are shown.the Fast Fourier transform is performed to obtain Y 11 (jω), Y 12 (jω), Y 21 (jω), and Y 22 (jω).Finally, P 1 (jω), P 2 (jω), and P 12 (jω) are calculated using ( 9), (10), and (11).The resulting MIMO admittance passivity properties for MR-DS-PWM and MS-PWM (both obtained with I 2r = 20 A) are shown in Figs.16 and 17, respectively, with the same y axis scale to emphasize the passivity improvement brought by MS-PWM.In addition to the results obtained from the experimental frequency response measurements (shown with cross markers), the results obtained from the analytical model, discussed in Section III-B, are also plotted (with full lines).As seen, both for MR-DS-PWM and

C. Time-Domain Stability Tests
Next, based on the converter's all-port MIMO admittance passivity properties P 1 , P 2 , P 12 from Figs. 16 and 17, it was of interest to examine the instability risk and experimentally test stability of the considered converter in the grid-connecting scenarios from Fig. 18, similarly as in Sections III-E and IV.For this, a nonmeshed grid is considered.Its dc bus voltages are formed by the same source and load as in Section V-A.The grid's impedances are formed by passive LC elements, such that they form parallel antiresonant circuits (see Fig. 18).The parameters of LC elements are the same as in [18], which yield the antiresonant frequencies at port 1 and at port 2 equal to, respectively, f g1res = 1200 Hz and f g2res = 640 Hz.
In Fig. 18(a) and (b), the antiresonance is present at a single port only.As explained in Sections III-D and III-E, in such scenarios, stability can be simply predicted by evaluating P 1 around f g1res (for Fig. 18(a)) or P 2 around f g2res [for Fig. 18(b)].Since for P 1 and P 2 from Fig. 16, ( 6) and ( 7) hold, respectively, around f g1res and f g2res , the system with MR-DS-PWM, which is first analyzed, should remain stable in the scenarios from Fig. 18(a) and (b).Differently from the scenarios in Fig. 18(a) and (b), in the scenario from Fig. 18(c), the antiresonances are present at both ports.Thus, to accurately predict the risk for the instability, in this scenario, the coupling passivity property P 12 must be evaluated as well.Given that P 12 from Fig. 16 is negative around f g1res and f g2res , a risk for the port-coupling induced instability exists.Specifically, since the negative dip of P 12 is pronounced around 1 kHz, in the scenario from Fig. 18(c) the system is prone to being destabilized at this frequency.
To verify these stability predictions, experimental time domain stability tests are performed in the following way.The converter is at first operated with I 2r = 5 A, which significantly reduces the negative dip of P 12 , so that the grid's damping is sufficient to ensure stable operation also in the scenario from Fig. 18(c) 5 .The ramp change of the current reference is then imposed from I 2r = 5 A to I 2r = 20 A (the latter corresponding to the passivity properties from Fig. 16).The converter's input and output current and voltage waveforms in response to such a ramp reference change are shown in Fig. 19   seen, the previously made passivity-based stability predictions are in agreement with the time domain stability tests.The portcoupling induced instability is clearly visible in Fig. 19(c).Furthermore, as seen from the corresponding zoomed in waveforms in Fig. 19(d), the frequency of the resulting oscillations is close to 1 kHz, which, as predicted, corresponds to the frequency where the coupling passivity property exhibits the negative dip.This is an important result which, for the first time, experimentally demonstrates that in order to guarantee stability in a passive grid, the converter's control system design should, at least in the frequency range that is critical for stability, strive for the all-port MIMO passivity (or, at least, its enhancement).
As discussed in Section IV, due to its inherent digital delay reduction property, MS-PWM can be very effective for enhancing the converter's all-port MIMO admittance passivity at high frequencies, and, consequently, for preventing the high-frequency port-coupling induced instability, such as one from Fig. 19(c) and 19(d).As seen from Fig. 17, the passivity properties obtained with MS-PWM are significantly improved at high frequencies compared to the ones (from Fig. 16) obtained with MR-DS-PWM.Specifically, the negative dip of the coupling passivity property P 12 is considerably reduced with MS-PWM.Thus, in the scenario from Fig. 18(c), the system with MS-PWM is less prone to being destabilized than the system with MR-DS-PWM.Then, provided that the grid's positive damping is higher than the converter's remaining negative damping, the port-coupling instability can be prevented.As for the scenarios from Fig. 18(a) and (b) stability shall be retained also with MS-PWM, since, as in the case with MR-DS-PWM, P 1 and P 2 from Fig. 17, satisfy (6) and ( 7) around, respectively, f g1res and f g2res .
To verify this, time domain stability tests are performed for MS-PWM, in the same way as above for MR-DS-PWM.Stable response to the ramp reference change from I 2r = 5 A to I 2r = 20 A is achieved in all three scenarios from Fig. 18.Due to space limitations the results are shown in Fig. 20 only for the scenario from Fig. 18(c).As seen from Fig. 20, the instability from Fig. 19(c) and (d), that was observed with MR-DS-PWM, is successfully prevented by MS-PWM.This is an important results, which, for the first time, experimentally demonstrates the effectiveness of MS-PWM in preventing the port-coupling induced instability at high frequencies, thereby further enhancing the grid-connecting converter's stability.Note that this property of MS-PWM, achieved by its capability to improve the converter's all-port MIMO admittance passivity, is different from the one analyzed in [13] and [14], where the capability of MS-PWM to enhance only the converter's unterminated output admittance passivity was demonstrated.

VI. CONCLUSION
To analyze and prevent a dc-dc interlinking converter's destabilizing impact in grid-connecting scenarios with an arbitrary, even meshed, termination (grid impedance), this article presents the unterminated all-port MIMO admittance passivityoriented controller design framework, exemplified through a buck converter with a digital current-control system.Impact of the control loop's crossover frequency and overall delay on its MIMO admittance passivity properties is illustrated, and a higher value of each parameter is indicated to worsen these properties.Along this line, examples of two techniques for enhancing a converter's all-port MIMO admittance passivity, by active damping impedance emulation and multisampled pulse width modulation, are investigated and shown to be effective.Both frequency and time domain validations of the presented methodology are performed, using C-HIL simulations, as well as experimentally, using a laboratory prototype.Future studies will focus on extending the presented methodology to ac-dc interlinking converters.In addition, future research could explore how to combine the methodology from this article with the methods for reducing the conservatism that may arise from the passivity-oriented controller design [45].

APPENDIX
Alternatively to evaluating the principal minors of P(jω), which is considered throughout the article, the eigenvalues of P(jω) can be evaluated to examine passivity of Y(s) [10], [30].Namely, condition (5) is equivalent to all the eigenvalues of P(jω) (which are by definition real) being nonnegative [30].This is further equivalent to the smallest of the eigenvalues being nonnegative.Accordingly, for Y(s) given by (1), the condition It is interesting to note that λ min is in fact the input feedforward passivity index of Y(s) at the frequency ω [29], [42].
To illustrate the use of λ min for characterizing the converter's all-port MIMO admittance passivity, a few examples, previously addressed via the principal minors-based approach, are addressed below via the minimum eigenvalue-based approach.First, λ min of the current controlled buck converter analyzed in  4 T pwm (which corresponds to the results from Fig. 8) and (b) of τ D for f cr = 0.14f pwm (which corresponds to the results from Fig. 9).The results are obtained from the simplified s-domain analytical model, which involves representing all the delay elements as a lumped delay τ D in the direct path.
Section III-C (featuring DS-PWM without the "feedforward" action) and Section IV-C (featuring MS-PWM with the "feedforward" action) are plotted in Fig. 21.Same as before, the results obtained from the analytical model are plotted with full lines and those obtained from C-HIL simulations are shown with dot markers.The results for λ min shown in Fig. 21 in purple and green color correspond to those for P 1 , P 2 , and P 12 shown in Figs. 4 and 12, respectively.As can be seen, the reasoning about the converter's MIMO admittance passivity that was made by evaluating P 1 , P 2 , and P 12 is in agreement the trends of λ min .
Next, similar as in Section III-F, dependence of λ min on f cr and τ d is shown in Fig. 22(a) and (b), which corresponds to the results from Figs. 8 and 9, respectively.As seen, the reasoning about the impact of f cr and τ d on the all-port MIMO passivity that was made in Section III-F from the plots of P 1 , P 2 , and P 12 is in agreement with the trends of λ min .Still, compared to P 1 , P 2 , and P 12 , λ min seems to be less sensitive to variations of τ d .Moreover, contrary to P 1 , P 2 , and P 12 , λ min provides limited physical insight on the converter's active behavior, e.g., whether it is related to the input port, the output port, or the coupling between them, etc.Nevertheless, the minimum eigenvalue-based approach may also be advantageous to use, as it characterizes the all-port MIMO admittance passivity by a single parameter only (also when the dimension of Y(s) is higher than 2, e.g., for multiport or ac-dc converters).A more detailed discussion about the strengths and weaknesses of the minimum eigenvaluebased, i.e., the input feedforward passivity index-based, and the principal minors-based approach for describing the converter's all-port MIMO admittance passivity is out of the scope of this article and is, therefore, left for future work.Finally, in order to provide more physical insight into the design process, the use of relative passivity index [46] should be explored in future studies.

Fig. 2 .
Fig. 2. Block diagram the considered digital output current-controlled pulsewidth-modulated two-level buck converter, used as an example of the grid-connecting converter from Fig. 1(a).
is the loop-gain of the reference tracking system.Further, G c (s), G fil (s), G ff (s) are the s-domain representations of the current controller G c (z), feedback filter G fil (z), and the "feedforward" action G ff (z).Finally, G l (s) = 1 sL c +R Lc , where R L c is the output filter inductor's parasitic resistance, I 2r = −I 2 is the output dc current reference, V 1 and I 2 are the steady-state values of v 1 and i 2 , respectively.The delay due to finite computation time[39] can be included within G c (s) and G ff (s).

Fig. 5 .
Fig. 5. Grid-connecting scenarios considered for analytical passivity-based instability risk predictions and C-HIL time domain stability tests.The grid features antiresonance at (a) port 1, (b) port 2, (c) both ports.By opening the switches sw 1,2 , the grid's damping around antiresonant frequencies is reduced.

Fig. 6 .
Fig. 6.Input and output current and voltage waveforms obtained from C-HIL simulations of the converter with the passivity properties from Fig. 4 (DS-PWM without the "feedforward"), operated in the grid-connecting scenarios from Fig. 5 with the grid's antiresonances' parameters corresponding to the test case 1.The transient is triggered by opening sw 12 from Fig. 5 at t = 0 s.The results in (a), (b), and (c) correspond to the scenarios from Fig. 5(a), (b), and (c).For a better visualization, instead of i 1 , i 1f is plotted, which is obtained by filtering out the switching ripple from i 1 .

Fig. 7 .
Fig. 7. Input and output current and voltage waveforms obtained from C-HIL simulations of the converter with the passivity properties from Fig. 4 (DS-PWM without the "feedforward"), operated in the grid-connecting scenarios from Fig. 5 with the grid's antiresonances' parameters corresponding to the test case 2. The transient is triggered by opening sw 12 from Fig. 5 at t = 0 s.The results in (a), (b), and (c) correspond to the scenarios from Fig. 5(a), (b), and (c).For a better visualization, instead of i 1 , i 1f is plotted, which is obtained by filtering out the switching ripple from i 1 .

Fig. 8 .
Fig. 8. Passivity properties (a) P 1 , (b) P 2 , and (c) P 12 of the current-controlled buck converter from Fig. 2 (G ff = 0) as a function of the control loop's crossover frequency (for a fixed τ D = 3 4 T pwm ).The results are obtained from the simplified s-domain analytical model, which involves representing all the delay elements as a lumped delay τ D in the direct path.

Fig. 9 .
Fig. 9. Passivity properties (a) P 1 , (b) P 2 , and (c) P 12 of the current-controlled buck converter from Fig. 2 (G ff = 0) as a function of the control loop's delay (for a fixed f cr = 0.14f pwm ).The results are obtained from the simplified s-domain analytical model, which involves representing all the delay elements as a lumped delay τ D in the direct path.

Fig. 10 .
Fig. 10.Unterminated all-port MIMO admittance passivity properties (9), (10), and (11) of the buck converter with parameters from Table I and single-rate control from Fig. 2 with MS-PWM (N c = N s = 4), with neither feedback filters (G fil = 1) nor "feedforward" action (G ff = 0).The results obtained from C-HIL simulation (dots) and analytical model (full lines) are shown.Dashed lines correspond to the analytical results from Fig. 4.

Fig. 13 .
Fig. 13.Input and output current and voltage waveforms obtained from C-HIL simulations of the converter with the passivity properties from Fig. 12 (MS-PWM with the "feedforward"), operated in the grid-connecting scenarios from Fig. 5 with the grid's antiresonances' parameters corresponding to the test case 1.The transient is triggered by opening sw 12 from Fig. 5 at t = 0 s.The results in (a), (b), and (c) correspond to the scenarios from Fig. 5(a), (b), and (c).For a better visualization, instead of i 1 , i 1f is plotted, which is obtained by filtering out the switching ripple from i 1 .

Fig. 14 .Fig. 15 .
Fig. 14.Input and output current and voltage waveforms obtained from C-HIL simulations of the converter with the passivity properties from Fig. 12 (MS-PWM with the "feedforward"), operated in the grid-connecting scenarios from Fig. 5 with the grid's antiresonances' parameters corresponding to the test case 2. The transient is triggered by opening sw 12 from Fig. 5 at t = 0 s.The results in (a), (b), and (c) correspond to the scenarios from Fig. 5(a), (b), and (c).For a better visualization, instead of i 1 , i 1f is plotted, which is obtained by filtering out the switching ripple from i 1 .

Fig. 19 .
Fig. 19.Experimental stability test results in the grid-connecting scenarios from Fig. 18, for the converter with MR-DS-PWM and parameters from Table III.The waveforms are measured in response to the current reference ramp change from I 2r = 5 A to I 2r = 20 A. For I 2r = 20 A the converter is operated in the regime described by the passivity properties from Fig. 16.The results in (a), (b), and (c) correspond to the scenarios from Fig. 18(a), (b), and (c).In (b), for a better visualization, i , 1f is shown, which corresponds to i , 1 with the switching ripple removed by the oscilloscope math function.(d) Zoomed-in waveforms of the results from (c).The frequency at which the port-coupling induced instability seen in (c) and (d) arises corresponds to the frequency at which P 12 from Fig. 16 exhibits the negative dip.

Fig. 20 .
Fig. 20.Experimental stability test results in the grid-connecting scenario from Fig. 18(c) for the converter with MS-PWM and parameters from Table III.The waveforms are measured in response to the current reference ramp change from I 2r = 5 A to I 2r = 20 A. For I 2r = 20 A, the converter is operated in the regime described by the passivity properties from Fig.17.
Fig. 20.Experimental stability test results in the grid-connecting scenario from Fig. 18(c) for the converter with MS-PWM and parameters from Table III.The waveforms are measured in response to the current reference ramp change from I 2r = 5 A to I 2r = 20 A. For I 2r = 20 A, the converter is operated in the regime described by the passivity properties from Fig.17.

Fig. 21 .
Fig. 21.Passivity property (24) of the buck converter with parameters from Table I and single-rate control system from Fig. 2 without feedback filters (G fil = 1).The results shown in purple and green color correspond to those from Figs. 4 and 12, which are obtained for DS-PWM (N c = N s = 2) without the "feedforward" action and MS-PWM (N c = N s = 4) with the "feedforward" action, respectively.The results obtained from C-HIL simulations (dots) and analytical model (full lines) are shown.

Fig. 22 .
Fig. 22. Passivity property (24) of the current-controlled buck converter from Fig. 2 (G ff = 0) as a function of (a) f cr for D = 34 T pwm (which corresponds to the results from Fig.8) and (b) of τ D for f cr = 0.14f pwm (which corresponds to the results from Fig.9).The results are obtained from the simplified s-domain analytical model, which involves representing all the delay elements as a lumped delay τ D in the direct path.

TABLE I PARAMETERS
OF THE BUCK CONVERTER USED FOR C-HIL VALIDATIONS Fig.

TABLE II OVERVIEW
OF THE CONTROL-HARDWARE-IN-THE-LOOP TIME DOMAIN STABILITY TEST RESULTS

TABLE III PARAMETERS
OF THE BUCK CONVERTER USED IN EXPERIMENTS