A Novel Split Space-Vector-Based Model Predictive Control With DC Power Balancing Strategy for Cascaded H-Bridge Inverter-Fed PMSM Drives

In this work, a novel split-space-vector-based finite control set model predictive control (MPC) for an interior permanent magnet synchronous motor drive fed by a three-phase five-level cascaded H-bridge multilevel inverter is proposed. The key novelty of this work is related to the ability of the proposed algorithm to guarantee the inverter submodules (SMs) dc power balancing by introducing some switching constraints aimed to emulate the phase-shifted pulsewidth modulation switching pattern, which naturally guarantees the SMs dc power balancing. Then, the main contribution of this work is guaranteeing the SMs dc power balancing without resorting to an explicit modulation stage or to a devoted term into the cost function. Indeed, the former reduces the system dynamic, the latter imposes measuring the dc voltages and tuning the cost function weighting factors. Moreover, the adopted switching constraints and an offline optimization process allow for guaranteeing the minimum computational burden. The proposed control algorithm's effectiveness is proven by experimental tests both in steady-state and dynamic working conditions and by comparison with a very-low computational burden voltage-vector-based finite control set MPC.

capability, and reduced EMIs [1], [2].It is largely adopted in several medium-voltage high-power applications such as photovoltaic generation and static grid compensation [3], [4], [5].Moreover, the need for isolated dc sources and its high reliability related to its state redundancy makes the CHB a candidate in the field of automotive powertrains [6], [7], [8].
Nevertheless, the complex topology and the high number of redundant states make the CHB control challenging.Generally, the main control goals related to CHB-based drives deal with the current reference tracking, converter switching loss minimization, common mode voltage (CMV) minimization, and CHB submodules (SMs) power balancing [6], [9], [10], [11], [12], [13].Among such control goals, the issue related to CHB SMs power balancing is not accurately considered and addressed in the literature for power drive applications.Concerning the SMs power balancing, this represents a critical control goal, since it affects both the converter, in terms of efficiency and reliability, and the dc sources.In detail, by assuming that each SM is characterized by the same dc link voltage, the fact that each SM drives a different amount of power to the load implies that SMs are interested in different currents and are switching differently.Thus, each SM is interested in different conduction and switching losses.It follows that more stressed SMs will age prematurely and will be more likely to fail, reducing the converter lifetime.Moreover, depending on the applications, driving a different amount of power by each dc link could be undesirable, such as when a battery energy storage system (BESS) is adopted [14], [15].
Indeed, managing the CHB gate control signals (GCSs) to fulfill SMs power balancing is a trivial task, due to the high degree of redundancy (DoR) that the CHB offers, both in terms of voltage vectors (VVs) and GCS combinations.Researchers faced this problem through devoted multi-carrier pulsewidth modulation (MC-PWM) strategies.In detail, according to [16], MC-PWM can be traditionally classified into level-shifted (LS), and phase shifted (PS): LS-PWM methods are based on amplitude shifts between carriers and each carrier is associated with a specific voltage level.Thus, an SM starts switching only when the corresponding level is reached, producing an uneven power distribution and switching conditions between SMs.On the contrary, PS-PWM is based on carriers' phase shift, which allows for each carrier to be related to a particular and independent SM.The phase shift among carriers implies that all SMs in a phase follow the same switching pattern with a certain time delay.For this reason, all the SMs operate under the same switching conditions and, as a consequence, present an even power distribution.Moreover, adopting a proper carriers phase shift allows for shifting the voltage harmonics over the spectrum 2N-times the carriers frequency, where N is the number of cascaded SMs per phase.It follows that PS-PWM represents the natural choice for the implementation of a CHB control strategy where a modulator must be adopted.
Model predictive control (MPC) represents an interesting opportunity for CHB-based drive purposes, due to its ability to fulfill several conflicting control goals [17], [18].To find the optimal control action, the future system state is predicted over a defined prediction horizon by adopting the system state-space model.Such a predicted state is compared to the desired future state inside a cost function, where the control goals are synthesized.The set of input variables that minimize the cost function represents the optimal control action to be applied to the controlled system.MPC can be mainly classified into finitecontrol-set (FCS) and continuous control set (CCS).FCS-MPC allows for taking into account the power convert nonlinearities, i.e., the converter nonlinear model is integrated into the system model, and the future system state is predicted a number of times that depends on the available VVs.It follows that the control algorithm is formulated as an Integer Quadratic Optimal Control Problem (IQOCP).CCS-MPC allows for finding the so-called unconstrained optimal solution, which is synthesized through a modulator.Both FCS-and CCS-MPC have been adopted into the literature for CHB control purposes.Aguilera et al. propose in [19] an FCS-MPC for CHB in photovoltaic applications under interphase unbalanced power generation conditions: the goal is fulfilled by enforcing the CHB to work with a suitable CMV component.It must be underlined that no attention is paid to SMs power unbalance, thus, the same authors propose a PS-PWMbased CCS-MPC for the same application in [20]: interphase power unbalance is faced as in [19], while the SMs power unbalance is faced by introducing a PS-PWM modulator; in detail, custom duty cycles per each SMs are defined and introduced into the cost function.In both cases, MPC is formulated in the abc frame, to directly take into account the CMV.In [21], a hierarchical FCS-MPC scheme is proposed where the multiobjective FCS-MPC, which is usually formulated by a unique multiterm cost function, is split into several cascaded FCS-MPCs with one-term cost functions, one of which deals with the SMs power balancing.It must be underlined that hierarchical MPC does not guarantee a computational burden reduction if compared to the traditional FCS-MPC.In [22], a modified MPC for a CHB-based BESS is proposed: in detail, the cost function consists of only one term, and a state selector algorithm is introduced to mitigate the unequal power drawn from battery cells.The proposed strategy is validated through hardware in the loop simulations, moreover, the SMs power inequality is mitigated but not eliminated.In [23], a successive search-based FCS-MPC algorithm is proposed for a CHB-based BESS.The algorithm allows for reducing the control computational burden by adjusting the search direction to find the optimal VV.Although this algorithm is proposed for a BESS application, no attention is paid to the dc-side quantities.In [24], a model predictive sliding control for grid-connected CHB is proposed: control goals (i.e., current and dc-link voltages reference tracking) are synthesized into a single cost function to replace the N-PI-based dc-link voltage control.The same authors propose in [25] a low computational burden MPC strategy without a weighting factor for a single-phase CHBMI; the control is based on a hierarchy approach and the cost function is composed of only one term, thus, no tuning is required.
By looking at the scientific literature, it can be noted that, when MPC is employed, not always appropriate attention is paid to the SMs power balancing goal.Moreover, the most common approaches to face this problem deal with the adoption of a PS-PWM-based CCS-MPC, which guarantees the SMs power balancing thanks to the modulator stage, or, when the FCS-MPC is adopted, by introducing into the cost function one or more quadratic custom terms, which try to equalize the SMs power.However, the PS-PWM-based CCS-MPC solution determines poor dynamic performance, if compared to the FCS-MPC, due to the control delay introduced by the PWM modulator stage; the custom cost function terms of FCS-MPC implies measuring dc voltages and/or dc currents and tuning the cost function weighting factor, which is a tedious trial-and-error activity and can affect the system performance, according to [25].Again, it is necessary to remark that this issue is not faced for power drive system applications controlled with MPC in the literature.
Thus, this work proposes a split space vector-based (S 2 VB) FCS-MPC (named S 2 VB-MPC) for a three-phase five-level (3P-5L)-CHBMI-fed interior permanent magnet synchronous motor (IPMSM) drive.The key novelty of this work deals with the fact that the proposed control allows for guaranteeing CHB SMs power balancing in every working condition without any modulation stage or dedicated terms into the cost function.Such a goal is reached by considering the 3P-5L-CHBMI as two cascaded-connected 3P-3L-CHBs, or, in other words, as two SMs triplets, where a triplet consists of three SMs, one per each phase.Such an assumption allows for splitting the 3P-5L-CHB output VV into two VVs, each of which regards a specific SMs triplet.The SMs power balancing is guaranteed by the PS-PWM strategy emulation, i.e., one of the two triplets replicates the switching pattern of the other triplet with a sample time delay.In detail, the triplet that imposes the switching pattern is named master triplet (MT), and the triplet that replicates the switching pattern with such a time delay is called slave triplet (ST).It must be underlined that the proposed algorithm is designed for a 3P-5L CHBMI, however, it can be applied to every CHBMI, independently by the number of voltage levels.Indeed, the number of triplets to define is a function of the number of cascaded SMs per phase N, such that one MT and N-1 STs must be defined.Each ST replicates the MT switching pattern with a delay time, which is an integer multiple of the sampling period.As a comparison target for this work, the multiobjective VV-based (V 2 B) FCS-MPC (named V 2 B-MPC) for 3P-5L-CHBMI-fed IPMSM drive proposed in [26] is adopted.Such control allows for minimizing the MPC computational cost, i.e., the number of required predictions to solve the IQOCP, by introducing some switching constraints such that the number of required predictions is reduced from 4096 (i.e., the whole set of available GCSs combinations for a 3P-5L-CHBMI) to 7. Indeed, the practical MPC implementation for a multilevel inverter is a challenging task, since it grows exponentially with the number of voltage levels.This makes MPC computational cost and its implementability a hot topic in the scientific literature.Thus, by applying the constraints and offline optimization process proposed in [26] to the S 2 VB-MPC, it is possible to obtain an algorithm that allows for guaranteeing the dc module power balancing with the minimum computational burden, then overcoming the limits of [26].Indeed, its reduced computational burden and its experimentally proven superiority over other MPC strategies in terms of steady-state and dynamic working conditions make the V 2 B-MPC the perfect comparison target for the proposed S 2 VB-MPC strategy.
To validate the effectiveness of the proposed strategy, a test bench composed of an IPMSM drive fed by a 3P-5L CHBMI has been set up.The proposed S 2 VB-MPC and V 2 B-MPC performance are compared both in steady-state and dynamic working conditions.As comparison tools, current and voltage total harmonic distortion (THD), apparent switching frequency, rms value of CMVs, and dc power are adopted.In detail, particular attention is paid to the dc side behavior, to show the improvement related to the proposed control algorithm.
The rest of this article is organized as follows.Section II describes the FCS-MPC mathematical formulation; Section III presents the proposed algorithm; Section IV describes the test bench; Section V presents and analyzes the experimental results.Finally, Section VI concludes this article.

II. MPC FORMULATION
The electric drive control scheme is reported in Fig. 1.The speed control loop is synthesized as a PI controller, which generates the quadrature current reference i * q ; in this application, the direct current reference i * d is set to 0. For the FCS-MPC formulation, the IPMSM and CHBMI mathematical models are considered.With respect to the IPMSM, the electrical mathematical model formulated in the d-q-reference frame is adopted.In detail, the d-q phase voltage equations are reported in (1) and ( 2) where v d and v q are the stator phase voltages, i d and i q are the stator currents, L d and L q are the direct and quadrature inductances, R is the stator winding resistance, ω m is the mechanical rotor speed, λ PM is the permanent magnet flux linkage, p is the number of machine pole pairs, and T s is the sampling period.By expressing the IPMSM electrical model in the state-space form and by discretizing with Forward-Euler approximation, it follows: with where v dq = [v d v q ] T is the stator VV and i dq = [i d i q ] T is the stator current vector.
The 3P-5L CHBMI control model is defined according to Fig. 2, where its circuit diagram is reported.
The inverter phase-voltage v jN is defined as a function of the dc link voltage V DC and the SM GCSs S j,xy as follows: where j ࢠ {A, B, C} identifies the converter phase, x ࢠ {1, 2} identifies the considered SM per phase, and y ࢠ {1, 4} identifies the SM leg.The input VV v dq in the d-q reference frame is obtained by applying the Clarke and Park transforms to the phase A prediction horizon N p = 1 is chosen and the cost function J is formulated as where ] T is the future state current vector.As discussed in the introduction section, to avoid weighting factor tuning, a one-term cost function is Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.adopted, and the unique synthesized control goal deals with the current reference tracking.

III. SPLIT SPACE VECTOR STRATEGY FORMULATION
In this section, the S 2 VB strategy is formulated.The proposed strategy comes out by emulating the PS-PWM strategy, which is the common MC-PWM strategy adopted for CHB control purposes since it guarantees SMs power balancing.Thus, first, the PS-PWM modulation is discussed and, subsequently, the mathematical formulation for VV splitting is presented.Finally, some switching constraints are introduced to emulate the PS-PWM strategy and guarantee a very low computational cost.

A. PS-PWM Strategy Analysis
The starting point for the proposed strategy formulation is represented by the PS-PWM modulation strategy, whose modulation scheme is reported in Fig. 3(a).
According to [27], the PS-PWM modulation scheme is composed of 2N carriers, where N is the number of cascaded SMs per phase, characterized by the same peak-to-peak amplitude and the same average value, equal to 0. The ith carrier is characterized by a phase ϕ i which depends on N, according to For a 3P-5L CHBMI, the number of required carriers is 4, and the mutual displacement is equal to π/2, according to Fig. 3(a).
The digital implementation of the PS-PWM strategy plays a vital role in determining the multilevel inverter performance, both in steady state and dynamic working conditions.For this application, the traditional multisampling method described in [28] is considered.In detail, the traditional multisampling method consists of dividing the carriers period T PWM into 2N intervals such that the state variables are sampled when each carrier reaches its maximum value.Thus, the sampling period T s is related to the carries period T PWM by the relation For a 3P-5L-CHBMI, the sampling time T s is 4 times lower than the carriers period T PWM , as can be seen in Fig. 3(a).
Taking into account that the carriers period T PWM is much lower than the modulating signals period, it can be assumed that the modulating signal variations over the T PWM are negligible in steady-state working conditions.Indeed, this hypothesis is also justified by considering that the modulating signal is constant over the entire carriers period T PWM when the standard singlesampling approach is adopted [28].Comparing carriers and modulating signals, the GCSs reported in Fig. 3(b) are generated.The previous assumption allows for stating that the GCSs related to two cascaded SMs are identical and π/2 displaced.It follows that two cascaded SMs controlled with a PS-PWM strategy follow the same switching pattern with a certain time delay, which coincides with the sampling period T s .This behavior guarantees both the SMs switch the same number of times and, as a consequence, to drive the same amount of power to the load.

B. Split Space Vector Strategy Derivation
Once the PS-PWM key element, i.e., the SMs switching pattern, has been identified, in order to impose this behavior to the CHBMI, the VV splitting mathematical formulation must be carried out.Splitting the CHB output VV allows for imposing some switching constraints such that the PS-PWM behavior is replicated.First, the 3P-5L CHBMI available VVs in the α-β reference frame are considered.In detail, the VV with Since, the inverter phase voltage v jN ࢠ{-2V DC , -V DC , 0, V DC , 2V DC }, the total number of VVs in the α-β reference frame is obtained as the combination of the three phases inverter voltages, according to the following equation: where n l is the number of phase voltage levels and m is the number of phases.In detail, (11) is equal to 125 for a 3P-5L CHBMI.In Fig. 4(a), the available VVs of a 3P-5L-CHBMI in the α-β reference frame are represented.As can be seen, the total number of nonredundant VVs is equal to 61, thus, most of the 125 VVs are superimposed.By identifying four concentric hexagons and by moving from the outer to the inner one, the DoR assigned to the VVs that lie on each hexagon goes from 0 (i.e., no redundant VVs) to 3. The zero VV has a DoR equal to 4. Concerning the CHBMI model discussed in Section II, it is possible to rewrite (5) explicating the dependency of v jN by the cascaded SMs voltages v j,HB1 and v j,HB2 , as follows: where v j,HB2 = V DC (S j,21 − S j, 23 ).
By replacing (12) with ( 9) it is possible to express the vector v ABC as a function of the SMs voltages as follows: By distributing the product in (15), it follows: with v αβ0,HB1 = [v α,HB1 v β,HB1 v 0,HB1 ] T , and v αβ0,HB2 = [v α,HB2 v β,HB2 v 0,HB2 ] T .According to (16), the space VV v αβ can be expressed as the sum of v αβ0,HB1 and v αβ0,HB2 , which represent the space VVs related to the upper and lower SMs triplets, as shown in Fig. 4(b).
Upper and lower SMs triplets can be seen as two independent 3P-3L-CHBs, each of which can produce a phase voltage v j,HBx ࢠ{-V DC , 0, V DC }, and, by applying (11) with n l = 3, a number of VVs in the α-β reference frame equal to 27, of which only 19 are nonredundant.This mathematical formulation allows an easy application of switching constraints to emulate the PS-PWM strategy.

C. Switching Constraint for PS-PWM Emulation
In order to guarantee that both SMs triplets follow the same switching pattern with a certain time delay, according to the analysis carried out in Section II-A, some constraints must be introduced.For this purpose, according to Fig. 4(b), the upper and lower triplets are chosen as MT and ST, respectively.Once this declaration is made, the following constraint is introduced: at the kth sampling instant, the ST must replicate the MT output VV at the k−1th sampling instant, according to the following equation: Thus, at the kth sampling instant, the solution to the IQOCP deals with finding the optimal MT switching pattern by taking into account the ST output VV, which is imposed by the adopted constraint.It can be noticed that the time delay introduced with the constraint reported in (17) is equal to T s and coincides with the time delay determined by the PS-PWM, according to Fig. 3(a).In other words, such a time delay related to an FCS-MPC, which runs with a sampling period T s is the same carried out by a PS-PWM-based control with a carriers period equal to 4T s .It must be underlined that, when FCS-MPC is adopted, GCSs are updated all at the same time, thus it is not possible to strictly replicate the PS-PWM switching pattern.However, to guarantee SMs power balancing, the critical behavior to emulate regards the fact that both SMs per phase follow the same switching pattern (whatever it is) with a certain time delay, which must be equal to the sampling time.
The adoption of constraint (17) implies that the number of predictions to be carried out depends on the number of available VVs of the MT triplet, i.e., 27 VVs, whose 19 are nonredundant.However, the CHBMI is characterized by redundancy in terms both of VVs and GCSs combinations.Thus, the same VV can be synthesized by several GCS combinations and the number of GCS combinations N GCSs can be evaluated as the number of states per GCS, which is equal to 2 since S j,xy ࢠ {0, 1}, to the power of the product between the number of GCSs per phase, which can always be expressed as n l -1, and the number of phases m.It follows: Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.which is equal to 64 when n l = 3 and m = 3.In summary, constraint ( 17) not only guarantees the PS-PWM pattern emulation but also allows for considering 27 VVs (whose 19 are nonredundant), instead of 125 (whose 61 are nonredundant) and then reduces the number of required predictions from 4096 (obtained by applying (18) with n l = 5 and m = 3) to 64.

D. Computational Burden Minimization
According to the previous discussion, the proposed S 2 VB-MPC allows for reducing the number of required predictions from 4096 to 64.Although the proposed algorithm guarantees a drastic reduction in the number of predictions to be performed, 64 predictions are still difficult to implement on common controllers and they can affect the maximum sampling frequency.Therefore, a further optimization process is applied to the proposed algorithm, i.e., the switching constraints and the offline optimization process proposed in [26] are adopted.
The constraint proposed in [26] states that the solution to the IQOCP at the kth sampling instant must be found by adopting only the adjacent six VVs to the currently applied one, i.e., the optimal VV at the k−1th instant, and the previous optimal VV itself, for future state predictions.As a way of example, with regard to Fig. 4(a), assuming that the optimal VV at the instant k-1 was v 16 , the solution to the IQOCP must be found by investigating vectors v 9 v 10 , v 17 , v 24 , v 23 , v 15 , and v 16 .Then, the constraint proposed in [26] must be properly adapted to the S 2 VB-MPC: in detail, it can be noticed that, since the ST VV at the sampling instant k is imposed, the constraint must be applied only to the MT VVs and it is applied to the ST indirectly.Then, according to the previous discussion, if the previous optimal MT VV is v 32 , the solution to the IQOCP must be found by investigating vectors v 24 , v 33 , v 41 , v 40 , v 31 , v 23 , and v 32 , according to Fig. 4(b).Such a constraint allows for reducing the number of VVs to investigate to find the solution to the IQOPC to 7, net of the redundancies.
The optimization process deals with redundancies elimination.Indeed, the MT VVs present some redundancies both in terms of phase voltage combinations (PVCs) and GCSs combinations available to synthesize such VV.The redundancies are eliminated by assigning to each VV unique PVC and GCS combinations.The PVC is chosen, among the available choices for a single VV, to minimize the CMV related to such VV; the GCS combination is chosen to minimize the GCS state transitions when the system evolves from a VV to another.It can be noted that VVs related to the 3P-3L CHB represent a subset of the 3P-5L-CHB VVs, i.e., the inner VVs; thus, it is sufficient to adopt the PVCs and GCSs combination subsets proposed in [26], related to the 3P-3L CHB, which are summarized in Fig. 5. Once a unique PVC and GCS combination is assigned to each VV, the number of required predictions goes from 64 to 7. Thus, the IQOCP is formulated as follows: where υ(k) identifies the available set of PVCs in the ABC frame at the kth sampling instant, which depends on the VV that is currently applied to the system.

E. Control Algorithm Implementation
The proposed algorithm is summarized in Fig. 6.The selected sets of PVCs and GCSs related to the MT VVs are stored into two look-up tables (LUTs), called LUT 1 and LUT 2 , respectively.Each VV is identified by a number v x , according to Fig. 4(b); such a number represents the address to navigate the LUTs.At the sampling instant k, the set of available PVCs for the future state predictions υ(k), which consists of the 7 MT VVs and 1 ST VV, is identified thanks to the optimal VV address at the previous sampling instant v x,opt (k-1).Now, the seven state predictions are carried out sequentially through a for loop and the optimal MT VV, and the relative address v x,opt (k), are found.Addresses v x,opt (k) and v x,opt (k-1) are used to navigate the LUT 2 and find the set of optimal GCSs combination S opt (k), which is applied to the system.It must be underlined that adopting LUTs allows us to easily define the set of available PVCs and relative GCSs at the sampling instant k, without affecting the algorithm computational cost.
The algorithm is implemented on the system on module (SoM) sbRIO 9651 controller by National Instrument.It is based on Xilinx Zynq 7000 system on a chip and consists of a Xilinx Zynq FPGA and a ARM Cortex A9 DSP modules.Both modules can be programmed independently in the LabVIEW environment with Graphical (G) language by choosing the proper target, named FPGA Target and Real-Time Target, respectively.SoM sbRIO 9651 is equipped on a power electronics and drives board, for control fast prototyping purposes.Their technical data are reported in [27].
The proposed algorithm is entirely implemented on the FPGA target with single-precision floating point data.The real-time target is adopted in this application only for the implementation of the graphical user interface.The algorithm software implementation has been carried out according to [ [26], Sec.III-C], where details related to the algorithm implementation, i.e., the adoption of a delay compensation strategy and the prediction equation split to minimize the number of computations inside the for loop, is discussed accurately.Other details related to speed measurements, PI-based speed control, and the numerical approach for the control implementation are reported in [29] and [30].
It must be underlined that by adopting the constraints and by carrying out the offline optimization process discussed in Section III-C, the S 2 VB-MPC computational burden is comparable to the computational burden of standard FCS-MPC for a traditional three-phase two-level VSI-fed electric drive, which requires at most eight future state predictions to find the solution to the IQOCP.Thus, the proposed control strategy lends itself to be implemented on common DSPs.
In this work, the V 2 B-MPC is chosen as a comparison target to show the improvement related to the proposed control algorithm.In Table I, the control parameters adopted for both the S 2 VB-MPC and the V 2 B-MPC are reported: the adopted sampling frequency f s in both cases is equal to 40 kHz, which corresponds to a sampling period T s of 25 μs; the execution time T exc has been experimentally measured and it is equal to 23 μs for both the algorithms.Thus, 40 kHz represents almost the maximum available sampling frequency for these algorithms with the adopted hardware.Indeed, it must be noted that the sampling frequency f s does not coincide with the switching frequency f sw when the FCS-MPC is adopted and, according to [31], the theoretical maximum switching frequency f sw is equal to f s /2.However, the effective switching frequency is much lower than its theoretical limit and depends on several aspects such as the specific MPC algorithm adopted, the system working conditions, and it can be actively limited by introducing a devoted term into the cost function.Thus, according to [31], it is good practice to adopt the highest possible sampling frequency, depending on the controller's computational power, to maximize the control granularity.
Moreover, according to the discussion related to the time delay introduced by the constraints adopted in Section II-C, a sampling frequency equal to 40 kHz introduces a time delay between MT and ST switching patterns, which is equivalent to the delay introduced by PS-PWM modulation stage with carriers frequency equal to 10 kHz.
In Table II, the control computational resources employed for the V 2 B-MPC and the S 2 VB-MPC are reported.It can be noted that even the computational resources are the same since the main difference between the two algorithms is related to the adopted constraints, which are introduced into the control algorithm through LUTs.

IV. TEST BENCH
A picture of the test bench is reported in Fig. 7.The electrical drive consists of a DigiPower 3P-5L CHBMI composed of six MOSFET-based H-Bridges powered by six 55 V dc power supply RSO-2400 and six poles, three-phase IPMSM (Magnetic S.r.l., type BLQ-40).The main technical data of the inverter, motor, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.and dc sources are reported in [29] and [30].A MAGTROL HD-715-8NA hysteresis brake is adopted to apply the load torque to the IPMSM.The hysteresis brake is controlled by a MAGTROL DSP6001 high-speed programmable dynamometer, which allows direct reading of torque, speed, and mechanical power.
The ac-side quantities are measured through a Teledyne LeCroy MDA 8028HD oscilloscope, equipped with three high voltage differential probes Teledyne Lecroy HVD3106A 1 kV, 120 MHz, and three high sensitivity current probes Teledyne Lecroy CP030A AC/DC, 30 A rms, 50 MHz.DC-side measurements are carried out by two current probes Yokogawa 701933 and Yokogawa WT 330 and WT 130 power meters, whose main technical data are reported in [27].

V. EXPERIMENTAL RESULTS
In this section, experimental results are presented to validate the effectiveness of the proposed control algorithm.In detail, a comparison between the proposed S 2 VB-MPC and the V 2 B-MPC proposed in [26] is carried out, both in steady-state and dynamic working conditions.For steady-state performance analysis, the current and voltage THD%, the apparent switching frequency, the CMV rms value, and SMs dc power are adopted as performance tools.Electric drive performance is investigated in several working conditions, defined according to the standard IEC-61800-9-2 [32].
The standard provides eight different working points (WP) for motor and complete drive module (CDM) characterization in the speed-torque plane.In this work, the WPs suggested for CDM characterization have been considered.The WPs are defined for 90%, 50%, and 0% (i.e., electrical frequency lower than 12 Hz) of the rated speed (4000 r/min) and for 100%, 50%, and 25% of the rated torque (1.8 N•m).Moreover, to obtain a more accurate mapping, two extra speed values, equal to 75% and 25% of the rated speed, and one extra torque value, equal to 75% of the rated torque are adopted, for a total of 20 WPs.Such WPs are summarized in Table III.For each identified WP, phase voltages and phase currents are measured with a Teledyne LeCroy MDA 8028HD oscilloscope, with an observation window of 1 s and a sampling frequency of 1 MS/s.
With respect to the dynamic behavior analysis, a cycle composed of a 0-3000 r/min acceleration, including no-load and Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

TABLE III ELECTRIC DRIVE WPS
rated-load operations, has been carried out.During dynamic analysis, the maximum allowed transitory currents were set to i q = 10 A and i d = 0 A, respectively.IPMSM phase voltages, phase currents, load torque applied by the brake and speed signals are acquired with MDA 8028HD oscilloscope by setting an observation window of 5 s and a sampling frequency of 500 kS/s.

A. Steady-State Working Condition
In Figs. 8 and 9, a comparison between V 2 B-MPC and S 2 VB-MPC controlled electric drive when the speed is equal to 3000 r/min and the load torque is varied over the defined working range is reported.In detail, Fig. 8 shows oscilloscope screens of ac phase voltages and currents, both in the time and frequency domain, and dc SMs currents of phase A, when the system is in WP 2.More detailed views in terms of ac and dc currents of WP2, together with WPs 7, 12, and 17 are reported in Fig. 9.In the first analysis, the dc sources behavior is analyzed with regard to the dc SMs currents of phase A (i A,HB1 and i A,HB2 ).Indeed, the dc currents behavior represents the most relevant difference between the two discussed control algorithms.The V 2 B-MPC strategy determines an inhomogeneous dc currents absorption among the cascaded SMs over the entire working range.Indeed, dc current trends are not superimposed and present a different average value; moreover, when the load torque is lower or equal to 0.9 N•m, dc current related to the upper SM is different than zero only for a fraction of the current period.On the contrary, looking at dc currents generated by S 2 VB-MPC, it can be noted that trends are superimposed, both SMs conduces for the whole period and dc currents are characterized by the same average value.Such considerations are carried out by looking at the dc currents of phase A, however, they are also valid for phases B and C. Such a dc currents behavior is equivalent to that determined by the PS-PWM modulation stage, as can be seen in Fig. 10.In detail, Fig. 10 shows the phase voltages, phase currents, and dc SMs currents related to phase A when the system is in WP 2. Such a test is carried out with a carriers frequency of 2.5 kHz, which determines an apparent switching frequency f sw of 10 kHz.Such discussion can be extended by taking into account the dc power.By considering that P j,HBx represents the dc power absorbed by one SM, the dc power absorbed by one triplet P DC,x can be computed according to the following equation: DC power absorbed by the two SMs triplets P DC,1 and P DC,2 , when V 2 B-MPC and S 2 VB-MPC are adopted, are reported in Fig. 11(a) and (b), respectively.It can be noted that V 2 B-MPC determines a different power absorption between the two triplets over the whole working range.Moreover, in WPs 4, 5, 9, 10, 14, 15, 19, and 20, which are characterized by low-speed working conditions, i.e., low back electromotive force, the whole power is led by only one triplet, which means that the other triplet is not switching at all.Such behavior is eliminated when S 2 VB-MPC is adopted.Indeed, both triplets lead the same amount of power to the load, since they are following the same switching pattern.To emphasize this aspect, the difference between the power led by the two triplets, expressed in percent with respect to the total power driven to the load, ΔP% DC is defined as In Fig. 11(c) and (d), a comparison between ΔP% DC generated by V 2 B-MPC and S 2 VB-MPC is reported.When V 2 B-MPC is adopted, the more the system moves toward low-speed lowtorque operating conditions and the more ΔP% DC increases, reaching the value of about 100% in low-speed operating conditions.The minimum ΔP% DC value is reached when the system works in WP1, and it is equal to 8%.When S 2 VB-MPC is adopted, ΔP% DC is lower than 2% almost over the entire working range, except in WPs 10,15,19,and 20, where it reaches the value of 3.7%, 5.7%, 2.8%, and 5.8%, respectively.Looking at the electric drive behavior on the ac side, both strategies guarantee very good and comparable steady-state performance.The current spectra reported in Fig. 9 highlight no significant differences in terms of harmonic content.In detail, in both cases, current spectra exhibit subharmonics whose amplitude goes from 6% to 2% moving from WP2 to WP 17.Other harmonics amplitude is negligible, since it is almost always lower than 1%.In Fig. 12, a comparison between phase voltages generated by V 2 B-MPC and S 2 VB-MPC strategies, both in the time and frequency domain, when the speed is varied over the defined working range and the load torque is fixed to the rated torque, is reported.In detail, it can be noted that both strategies exhibit comparable voltage spectra in every WP and the 3rd harmonic represents the predominant harmonic over the entire range.Indeed, in both strategies, it reaches a maximum value of 42% in very low-speed working conditions.However, it must be underlined that in this analysis, voltages are measured with respect to the inverter star center N, to easily evaluate the apparent switching frequency, as will be discussed below.This choice justifies the presence of 3rd voltage harmonics.
However, if line-line voltages and phase voltages measured with respect to the motor windings star center are considered, the 3rd harmonic and its multiples are canceled.Even in this case, other harmonics exhibit a negligible amplitude, since they are always lower than 10% and, most of the time, lower than 5% over the considered working range.
To investigate the dc voltage utilization, the maximum modulation index is introduced: it is defined as the ratio between the maximum achievable phase voltage and the total dc link voltage, according to [33].To compare the maximum modulation index related to V 2 B-MPC and S 2 VB-MPC strategies, the phase voltages in WP1 are considered.In detail, both strategies guarantee an RMS voltage of 90 V, i.e., a peak voltage of 127.3 V. Since the total dc link voltage is equal to 110 V (i.e., the sum of each cascaded SMs dc link voltage), the maximum amplitude modulation index is equal to 1.16.Therefore, both strategies guarantee optimal dc voltage utilization, i.e., the same guaranteed by a space vector modulation strategy.Moreover, it can be stated that the VV split approach does not affect the dc voltage utilization.
A detailed comparison performance analysis of ac quantities has been carried out with the comparison tools reported in Fig. 13.Current and voltage THD are evaluated according to the following equation: where S rms and S 1 represent the rms value and the fundamental harmonic expressed in the rms value of the generic electric quantity, respectively.Looking at current THD related to the compared strategies, reported in Fig. 13(a) and (e), it can be noted that both strategies determine very similar THD values in every WP.In detail, the current THD in both cases decreases when moving from high-speed to low-speed and from low-load torque to high-load torque working conditions, with a minimum value of 3.3% in WP5 and a maximum value of 20.1% in WP16.In Fig. 13(b) and (f), voltage THD maps related to V 2 B-MPC and S 2 VB-MPC are reported, respectively.In both cases, voltage THD is strictly correlated to the motor speed, such that the voltage THD decreases when the speed increases.However, voltage THD related to V 2 B-MPC decreases a bit faster than S 2 VB-MPC voltage THD, reaching a minimum value of 27%, against 31% of S 2 VB-MPC voltage THD.The apparent switching frequency maps related to the compared strategies are reported in Fig. 13(c) Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.and (g).Apparent switching frequency estimation has been carried out by counting the phase voltage level transitions N t over the observation window T w and dividing by double the observation window, according to the following equation: Maps show that both strategies exhibit a switching frequency increment when the speed increases.However, S 2 VB-MPC is characterized by higher switching frequency over the entire range, with a minimum value of 3500 Hz to a maximum value of 6000 Hz, against a minimum value of 2000 Hz and a maximum of 4500 Hz, related to the V 2 B-MPC.Such a behavior can be justified by looking at the switching constraints related to S 2 VB-MPC, which impose that the ST pursues the behavior of the MT and, in turn, the MT looks for the optimal solution to apply by taking into account the future behavior of the ST that is already defined.Thus, therefore, it is very likely that both triplets change state at each sampling instant.
A comparison is carried out also in terms of CMVs.In Fig. 13(d) and 13(h), maps of CMV rms values, generated by V 2 B-MPC and S 2 VB-MPC are reported.Both maps show a strong dependency as a function of the motor speed and the most significant difference between them can be recorded in WPs where n = 2000 r/min.In detail, in such WPs S 2 VB-MPC determines an rms value of CMV between 17 and 19 V, against 13-15 V of V 2 B-MPC.The differences in terms of CMVs detected with the two control strategies for the other WPs are reduced and, thus, the performance can be considered comparable.

B. Similarities With MC-PWM Strategies
Taking into account the discussion related to the experimental results presented so far, it is possible to establish some similarities between the discussed MPC strategies and some MC-PWM strategies in terms of harmonic behavior and SMs power balancing.
According to [16], LS-PWM determines a spectrum with harmonics centered at the carriers frequency and its multiples.Among the LS-PWM strategies, the phase disposition (PD)-PWM guarantees the lowest voltage and current harmonic distortion.However, LS-PWM strategies do not guarantee SM power balancing.At the same time, PS-PWM guarantees SMs power balancing but with slightly higher voltage and current harmonic distortion, if compared to PD-PWM.Moreover, its ability to shift the harmonics over the spectrum 2N-times the carriers frequency makes harmonics easier to filter but this feature increases the apparent switching frequency.
Some similar considerations can be carried out by looking at the V 2 B-MPC and S 2 VB-MPC, respectively.In detail, the V 2 B-MPC is characterized by low voltage and current harmonic distortion and low switching frequency, however, the SMs power balancing is not guaranteed.S 2 VB-MPC is characterized by similar voltage and current harmonic distortion, if compared to the V 2 B-MPC, with a higher switching frequency and guaranteed SMs power balancing capability.This last feature makes the S 2 VB-MPC the suitable control solution for CHBMI-based drive applications.
Finally, it is necessary to highlight that in medium-high power traction applications, FCS-MPC represents a more suitable solution compared to the conventional MC-PWM strategies, due to its capability of drastically reducing the current harmonic content at low-switching frequency operating conditions.The main drawback related to CHB drives, especially when powered by battery dc sources, controlled with FCS-MPC is related to SMs power balancing issue.Thus, the proposed S 2 VB-MPC addresses and solves the SMs power balancing issue without resorting to an explicit modulation stage or to a devoted term into the cost function, which requires devoted voltage and current sensors for active dc power balancing control.

C. Dynamic Working Conditions
To investigate the impact of V 2 B-MPC and S 2 VB-MPC on the electric drive dynamic performance, a cycle composed of a Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.0-3000 r/min acceleration, application, and removal of rated load torque is carried out.IPMSM phase currents, speed, and load torque trends during the whole dynamic cycle are reported in Fig. 14 It can be noted by looking at Fig. 14(c) and (d) that in both cases the speed transient ends after about 500 ms with about 200 r/min overshoot.The system exhibits also a good rejection of external disturbances, as can be seen in Fig. 14(e) and (f), and Fig. 14(g) and (h), where the load torque application and removal are shown, respectively.In detail, in both cases, the speed transient due to the external disturbance ends in about 0.3 s.As a result, the adoption of V 2 B-MPC or S 2 VB-MPC has a negligible impact on system dynamic performance: both algorithms guarantee good dynamic performance, with a reduced speed and torque ripple.Thus no remarkable differences in the dynamic response have to be underlined.

VI. CONCLUSION
In this work, a novel S 2 VB-MPC for an IPMSM drive fed by a 3P-5L CHBMI is proposed.The proposed control strategy aims to guarantee the CHB SMs power balancing in every working condition.The key novelty of this work is related to fulfilling the SMs dc power balancing by adopting some control constraints, which aim to emulate the PS-PWM modulation strategy switching pattern.Indeed, the PS-PWM strategy represents the common choice for CHB control purposes since it naturally guarantees the dc power balancing feature.Therefore the main contribution of this work deals with fulfilling the dc SMs power balancing goal without resorting to a devoted modulation stage or devoted terms into the cost function.Indeed, the modulation stage introduces some control delays, affecting the system dynamic performance, while a multiterm cost function requires measuring the dc link voltages or currents and the annoying weighting factor tuning process.
By looking at one phase of the CHBMI, it can be observed that the PS-PWM strategy produces GCSs related to the cascaded SMs which are the same but time-shifted.To emulate such behavior, the 3P-5L CHBMI is treated as two cascaded 3P-3L-CHBs, each one producing its own VV.One of the two SMs triplets is chosen as an MT; the other SMs triplet, called ST, must replicate the MT behavior with a time delay equal to the sampling time.Such a constraint allows for reaching the SMs power balancing goal.
To guarantee the minimum computational burden, the switching constraint and the offline optimization process proposed in [26] are applied to the S 2 VB-MPC: the switching constraint allows for selecting the solution to the IQOCP by testing only the adjacent VVs to the currently applied one; the offline optimization process allows for discarding PVC and GCS redundancies.Once a unique match between VV, PVCs, and GCSs is found, the number of future state predictions is reduced from 4096 to 7.
The proposed S 2 VB-MPC is validated through experimental tests.In detail, the proposed strategy is experimentally compared with the V 2 B MPC strategy, proposed in [26].For this purpose, a test bench composed of an IPMSM drive fed by a 3P-5L CHBMI is set up.Electric drive performance is investigated both in steady state and dynamic working conditions.Experimental results show that on the ac side, both strategies guarantee very similar electric drive performance both in steady-state and dynamic working conditions.The most relevant differences are related to dc power behavior: indeed, S 2 VB-MPC guarantees SMs power balancing in every working condition, while V 2 B MPC is never able to guarantee SMs power balancing.Such behavior is particularly evident at low-speed working conditions: in detail, when V 2 B MPC strategy is adopted, one of the two triplets is not switching at all and the whole amount of power is driven to the load only by one triplet.
Experimental results allow for stating that the proposed strategy guarantees the SMs power balancing without degrading the ac performance, both in steady state and dynamic working conditions, and without affecting the control computational burden.

Fig. 5 .
Fig. 5. (a) Optimal PVCs for every VV in p.u.(b) CMV values per each VV in p.u. (c) GCSs which minimize the switching transitions, reported on the α-β plane.

Fig. 8 .
Fig. 8. Oscilloscope screens showing a comparison between (a) V 2 B-MPC and (b) S 2 VB-MPC in terms of phase voltages and currents, both in time and frequency domain, and dc SMs currents of phase A, in WP2 (speed n r = 3000 r/min, load torque T = 1.8 N•m).

Fig. 10 .
Fig. 10.Phase voltages, phase currents, and DC SMs currents related to phase A obtained with a PI-based FOC with PS-PWM modulator.n r = 3000 r/min, T L = 1.8 N•m, f sw = 10 kHz.

Fig. 11 .
Fig. 11.Comparison between power led by the two triplets.(a) P DC,1 and P DC,2 , when V 2 B-MPC is adopted.(b) P DC,1 and P DC,2 , when S 2 VB-MPC is adopted.(c) ΔP% DC when V 2 B-MPC is adopted.(d) ΔP% DC when S 2 VB-MPC is adopted.

Fig. 14 .
Fig. 14.Comparison between electric drive dynamic behavior under a 0-3000 r/min acceleration and load torque variation.(a) V 2 B-MPC.(b) S 2 VB-MPC.(c) and (d) Zoom on acceleration.(e) and (f) Zoom on load torque application.(g) and (h) Zoom on load torque exclusion.
(a) and (b), when V 2 B-MPC and S 2 VB-MPC are adopted respectively.Couples of figures Fig.14(c) and (d), Fig.14(e) and (f), and Fig.14(g) and (h) allow for carrying out a detailed comparison between currents and speed trends.