A PLL-Less Voltage Sensorless Direct Deadbeat Control for a SiC Grid-Tied Inverter With LVRT Capability Under Wide-Range Grid Impedance

SiC grid-tied inverters can reduce interface filter size and weight to reduce cost and achieve fast dynamics, but pose control challenges, such as stability as well as large current overshoots during low-voltage ride-through (LVRT) transients. In this article, a direct deadbeat prediction control is developed for SiC grid-tied inverters with L filter. By predicting grid voltage without voltage sensor and removing phase-lock loop (PLL), the proposed control can improve the stability of SiC grid-tied inverters. An online adaptive parameter identification algorithm is further developed to allow the inverter to maintain stability under wide-range grid impedance to enhance the control robustness. A unity-cycle delay compensation strategy is presented to eliminate the delay time effect. The stability of the proposed voltage sensorless PLL-less direct deadbeat control method is proved based on the Lyapunov stability theory. In addition, the proposed control allows the seamless implementation of LVRT with inrush current significantly mitigated. The proposed control method has been implemented and verified on a 5-kW SiC inverter with 50-kHz switching frequency. The experimental results of steady state and transients under different grid impedances as well as LVRT are presented to verify its validity.

Total interface inductance of L f and L g .
Ratio of grid inductance to filter inductance. R s Parasitic resistance. v g_abc Predicted grid voltage matrix in abc-frame. v g_αβ Predicted grid voltage matrix in αβ-frame. P * Active power reference. Measured inverter line-to-line voltages.

I. INTRODUCTION
T HE SiC grid-tied inverters have been utilized in wide applications recently due to their higher switching speed, higher efficiency, higher power density, and lower system cost compared with their Si counterparts [1], [2], [3], [4], [5]. Since SiC devices can switch at higher frequencies, the LCL filter size can be reduced and even replaced by a small L filter to suppress the switching harmonics, which leads to control benefits, such as no LCL resonance issue, and allows high control bandwidth [1]. Even though it is generally accepted that SiC devices offer significant advantages over Si devices, there are still many technical challenges to transform the device-level advantages into system-level advantages, especially for dealing with the high switching frequency, fast dynamic, and stability issues [4], [5]. This  Conventional grid-tied control approaches requiring voltage sensors, PLL, and/or FLL have been applied to SiC inverters to achieve good current and power control [6], [7], [8]. Nevertheless, for the traditional PLL-based/FLL-based control methods, there are stability problems since the voltage sensors are measuring the PCC voltage rather than the real grid voltage under the condition with large grid impedance [9], [10], [11]. Besides, the dynamic performance of the SiC grid-tied inverter will be degraded by the limited bandwidth of the PLL/FLL-based control methods. In addition, considering the coupling effect between the PLL loop and the inverter control loop, the parameter design process is relatively complicated and time-consuming [12]. Besides, the voltage sensors can introduce additional delays due to their inherent response time and limited bandwidth [13], [14], which is not desired for fast dynamic features of SiC grid-tied inverters.
Recently PLL-less self-synchronizing control methods are proposed and studied in [15], [16], [17], [18], [19], and [20] to improve the dynamic performance and enhance the stability of grid-tied inverters. However, some of the control methods still need voltage sensors to measure the PCC voltage to achieve good control performance [15], [16], [17]. Under large grid impedance, the measured PCC voltage is more close to the inverter output voltage instead of grid voltage, the resulting positive feedback loop of the controller is not negligible, which will decrease the stability margin of the grid-tied inverter [5]. In addition, the control bandwidth is limited by the proportion-integral (PI) or proportion-resonant (PR) controllers in some methods [15], [16], [17], [18]. The sophisticated and time-consuming parameter tuning processes are inevitable [19], [20].
The MPC methods have been applied to grid-tied inverters to achieve fast control [21], [22], [23], [24], [25], [26], [27], [28], [29]. Most of these MPC-based methods are FCS-MPC methods, and many of them still require voltage sensors [21], [22], [23]. Nam et al. [24] presented an FCS-MPC-based method to remove voltage sensors but kept the PLL function to extract the grid phase angle in dq-frame. Although FCS-MPC has advantages of direct control and fast transients, it is not suitable for SiC grid-tied inverter due to its variable switching frequency leading to degraded harmonics [22].This inherent drawback has also been experimentally demonstrated in [26]. On the other hand, deadbeat-based MPC control can solve this variable switching frequency issue and achieve fast transients. However, the existing deadbeat control methods for grid-tied inverters still require the voltage sensors, PLL, and/or PI/PR controllers in the outer loop [30], [31], [32]. Therefore, issues of PLL-based methods, such as stability and control parameters tuning, have not been solved. There is lack of a direct deadbeat control method. Another issue with MPC methods is that control performance may suffer from the model inaccuracy especially under large grid impedance [25]. State-observer (SB)-based method [27] and passivity-based control method [28], [29] are proposed to solve this issue, but the voltage sensors for measuring the grid voltage are still required. In addition, there is a tradeoff between global stability and the steady state current performance. Therefore, it is still a great challenge to solve the parameters mismatch problem of these predictive-based control methods, considering the impedance of the grid and the absence of the voltage sensors.
In addition to the challenges to maintain both stability and fast transients, the SiC grid-tied inverters face another control challenge to achieve LVRT/ZVRT due to the reduced interface filter, thanks to higher switching frequency. LVRT/ZVRT feature is crucial for the reliability and robustness of the grid-tied inverters and required by the IEEE 1547-2018 standard [33]. Traditional LVRT control strategies are not able to mitigate the enlarged inrush current of the SiC-based grid-tied inverters. A low latency hardware-based ZVRT transient control method for a SiC-based three-phase inverter is presented in [34] to suppress the inrush current during the ZVRT transients, whereas this method requires additional fast response hardware circuits to implement the transient control. A dynamic voltage support controller was designed in [35] to achieve fast control and suppress the current overshoot during the LVRT. However, different control modes need to be identified and switched during the operation of the grid-tied inverter. Moreover, a fast LVRT detector and extra design process are required for the transient controller.
To solve the aforementioned challenges, a novel deadbeat control is developed in this article as a direct control strategy for a SiC grid-tied inverter with L filter. The developed control also allows removing PLL loop and predicting grid voltage without voltage sensor, which is beneficial to improve the system stability and reduce cost. To solve the parameter mismatch issue of MPC control especially under voltage sensorless condition, a novel OAPI method only based on sampled grid currents is proposed, which further improve the control performance and enhance stability under wide-range grid impedance conditions. A unity-cycle delay canceller is developed to compensate for the control and computation delay. Hence, not only the grid voltage can be predicted, but also the grid inductance can be identified online. Therefore, both fast and stable control performance can be achieved. Due to the high nonlinearity of the proposed deadbeat method, the traditional stability analysis approaches are not applicable. In this article, the Lyapunov stability theory-based method is utilized to evaluate the system stability. In addition, the proposed direct deadbeat control can achieve a universal control for LVRT/ZVRT without extra hardware or software to mitigate inrush current significantly under PLL-less and voltage sensorless condition. Another advantage of the proposed control is the ease of implementation, which is verified on the implementation in a 5-kW SiC inverter prototype with 50-kHz switching frequency. Both the simulation and experimental results are provided to verify the advantages of the proposed method.
The rest of this article is organized as follows. Section II presents the developed system model and detailed operation principles of the proposed direct deadbeat control to achieve PLL-less and voltage sensorless for SiC grid-tied inverter with L filter. The simulation results of the proposed control with ZVRT are provided and compared with those of traditional control. Section III introduces the proposed robustness enhancement technologies including the unity-cycle delay canceller and the OAPI to be integrated with the proposed deadbeat controller to solve time delay and model parameters mismatch issues. The global stability of the proposed control is also analyzed in Section III based on Lyapunov theory. The experimental verification is provided in Section IV. Finally, Section V concludes this article.

II. PROPOSED DIRECT DEADBEAT CONTROLLER FOR SIC GRID-TIED INVERTER WITH L FILTER
The proposed control block diagram is presented in Fig. 1 to control a three-phase SiC grid-tied inverter with L filter. It consists of three main blocks: mathematical model block, current reference generation block, and direct deadbeat controller block.
The mathematical model block includes the circuit model and grid voltage prediction. The developed equivalent circuit model is highlighted in yellow in Fig. 1, where L s represents the total inductance of the filter L f and grid inductance L g , and R s is the parasitic resistance. The corresponding mathematic model is presented in the following by applying the Forward Euler discretization method: where i g_abc , v inv_abc , and v g_abc are the grid current, inverter output voltage, and the grid voltage in abc-frame, respectively.
T s is the sampling period, which is selected as the same as the switching period in this study. Based on (1), the grid voltage v g_abc can be predicted without voltage sensors. At kth sampling cycle, the grid current i g_abc (k) is measured. As shown in Fig. 1, only the grid current sensors are utilized for measurement. The sampled currents of (k-1)th and kth sampling cycles, i.e., i g_abc (k-1) and i g_abc (k), and the inverter output voltage in previous cycle v inv_abc (k-1) are utilized to predict the grid voltage to achieve voltage sensorless feature in the proposed control. Since the sampling frequency is much higher than grid line frequency, assumed that grid voltage does not change considerably in one sampling cycle, the predicted grid voltage is derived as follows: wherev g_abc (k) are the predicted three-phase grid voltages in abc-frame at kth sampling instant. The predicted grid voltages in αβ-frame can be calculated in the following through the Clarke transformation: Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply.
The predicted grid voltage in αβ-frame,v g_αβ (k), together with the active power reference and reactive power reference P * and Q * is the input to the current reference generation block to derive the next cycle current reference i * abc (k + 1) using the following: is the predicted grid voltage vector in αβ-frame, which can be calculated from (3), i * α (k + 1) and i * β (k + 1) are the next cycle current references in αβ-frame, respectively, and i * abc (k + 1) is the next cycle current reference in abc-frame.
The generated next cycle current reference i * abc (k + 1) and the predicted grid voltagev g_abc (k) are substituted into (1) to implement the direct deadbeat control in the next cycle. As a result, the inverter output voltage reference in abc-frame can be calculated as follows: After receiving the voltage references at kth sampling instant, the three-phase SVPWM modulation functions of M abc = [M a , M b , M c ] are employed to generate the corresponding switching states S abc based on the following: The control block diagram in Fig. 1 demonstrates that both PLL and voltage sensors are not required with the proposed deadbeat method. In addition, LVRT/ZVRT can be achieved seamlessly using the same deadbeat control law instead of an extra designed control to mitigate the inrush current, which is different from other control methods. The required LVRT/ZVRT curve profile can be integrated into the current reference generation block in Fig. 1. The constant current control is one of the typical control strategies for grid-tied inverter to achieve LVRT/ZVRT [37]. In this article, the constant current control is selected to conduct a fair comparison and validate the performance of the proposed deadbeat control method. The corresponding current reference during LVRT/ZVRT need to take predicted grid voltage into consideration and is generated in the following: Fig. 2 shows the graphical depiction of LVRT/ZVRT operation principle using the proposed deadbeat controller. Note that no voltage sensors are used for LVRT. At (k-1)th sampling cycle, the grid voltage drops to a low-voltage condition. At kth sampling cycle, the current i g_abc (k) is measured, and the predicted grid voltage is obtained with the proposed predictor. Therefore, the grid voltage can be accurately and timely predicted in 1 switching cycle after LVRT/ZVRT transient. The future current reference i * abc (k + 1) is then calculated according to the predicted grid voltage, P * and Q * , and LVRT requirement profile. The deadbeat controller will generate the inverter output voltage reference so that the grid current can reach the current reference in the next cycle. The switching signals can be generated by the SVPWM modulation approach adopted in this article. The high control bandwidth allows the fast dynamic control performance of the proposed deadbeat controller and suppresses the inrush current during the LVRT transients.
The proposed PLL-less, voltage sensorless direct deadbeat control under LVRT, specifically under ZVRT, is simulated and compared with traditional control method presented in [5] employing a PR controller-based grid current controller in stationary frame with PLL and voltage sensors for a SiC inverter with L filter. Fig. 3 shows the simulation results of a 10-kW SiC grid-tied inverter with L filter using two methods, respectively, where grid voltage is 400 V llrms /60 Hz, V dc is 700 V, switching frequency is 50 kHz, L s is 500 μH and R s is 0.05 Ω. It should be noted that ZVRT/LVRT boundary is defined as 0.15 per unit (p.u.) of grid voltage magnitude by the IEEE Standard 1547-2018 [33]. Hence, a ZVRT is simulated under 0.05 p.u. grid voltage and constant current control is selected during ZVRT process.
The grid voltage drops to 0.05 p.u. at t = 0.1 s. After grid voltage-sag duration time of 0.2 s, the grid voltage recovers to normal conditions at t = 0.3 s. The results of the traditional method are shown in Fig. 3(a) where inverter is controlled at constant peak current control mode during the ZVRT. The waveforms from top to bottom are grid voltages, grid currents, inverter output voltages, and active power reference and instantaneous calculated value. The current overshoot during the ZVRT transition is increased to 7.38 p.u. of the maximum current under normal condition. In practical applications, such large current overshoot will not only trigger inverter protection/shutdown to fail the ZVRT, but even worse, damage equipment and hardware circuits. Besides, it can be found that the traditional method needs around 20 ms to reach the steady state after the ZVRT transient. Fig. 3(b) shows the simulation results with the proposed direct deadbeat control method. The predicted grid voltages, grid currents, and inverter output voltages are shown at second, third, and fourth waveforms screens in Fig. 3(b), respectively. The real grid voltages are presented on the top waveform screen. It can be observed that the grid voltages can be accurately predicted before, during, and after the ZVRT process. With the proposed direct deadbeat control method, the inverter can achieve fast, stable, and reliable control during the ZVRT, and the transient time and overshoot currents are significantly mitigated as the Fig. 3(b) shows. Besides, it is noted that the current harmonics performance of the proposed method is the same as the traditional method since the consistent switching frequency is achieved. It is worth pointing out that the proposed deadbeat is a unified control method for both steady states and transients, which requires no modes identification or modes switching during ZVRT process.
The simulation results have demonstrated that the proposed deadbeat control can achieve PLL-less, voltage sensorless, and ZVRT operation with low current harmonics at steady state and significantly mitigated inrush current at ZVRT transients.
The proposed deadbeat control method is also able to deal with unbalanced grid conditions. Similar to traditional grid-tied inverter control solution under unbalanced grid [38], [39], the positive sequence component of the predicted grid voltage can be extracted to achieve positive sequence control.
It is important to note that in real applications, the time delay of the sampling and control always exists owing to the necessary computation time and implementation time of the sampling, control, and PWM. In addition, the parameter mismatch issue needs to be taken into consideration, especially with the wide range of unknown grid impedance. These nonideal conditions not only degrade the control performance but cause stability issues as well. Therefore, methods are proposed to solve these issues, which are introduced in the next section.

III. ROBUSTNESS IMPROVEMENT METHODS AND STABILITY ANALYSIS
In this section, a unity-cycle delay canceller and the OAPI technology are developed to be integrated with the proposed deadbeat controller to solve the delay-time effect, parameter mismatch, and wide range of unknown grid impedance issues in practical applications. The stability of the proposed control system is then analyzed based on Lyapunov theory. Fig. 4(a) shows the grid current (blue), modulation function (red), predicted grid voltage (black), and PWM (purple) waveforms of one phase without delay compensation. The blue dots represent the moment the current is sampled, whereas the black dots represent the moment the modulation function is updated. There is always a delay time, denoted as t d , between the current sampled instant and the modulation function updated instant due to the delay time of the control and computation, which is unknown and varying in most cases. This delay time will introduce a deviation to the sampled current, resulting in an inaccurate reference voltage and modulation function. In addition, the errors of sampled current also will lead to errors in grid voltage prediction in our proposed control, as shown by the black solid line representing the ideal predicted grid voltage and the black dotted line representing the real grid voltage in Fig. 4(a). As a result, the irreconcilable errors in the current control will be introduced, thus affecting the control performance and stability of the whole system.

A. Unity-Cycle Delay Canceller
The concept of proposed delay compensation method is to predict the grid current one-cycle in advance and calculate the corresponding modulation of the next cycle but output this future modulation after one cycle; therefore, the one-cycle current forward prediction and one-cycle PWM delayed output is able to cancel the delay effect for each cycle.
The grid current one-cycle in advance can be predicted by using the measured current, predicted grid voltage, and inverter voltage reference in present cycle. For example, the predicted grid current in (k + 1)th cycle, denoted asî g_abc (k + 1), can be calculated in the kth sampling period based on the following: . (8) The output voltage reference in the (k+1)th cycle can be obtained at kth sampling period using the following: The corresponding modulation functions is, therefore, derived and stored to be applied at the next sampling instant to generate PWM signals. Fig. 4(b) shows the key waveforms with applying proposed delay canceller. Instead of using sampled current to generate modulation function at each cycle, the current is predicted in the previous cycle, so does the modulation function. The precalculated modulation one-cycle in advance will be stored and output after one cycle. As a result, there is no delay between the current sampling moment and the modulation updating moment, and the blue and black dots coincide in Fig. 4(b).
It is worth mentioning that the proposed delay canceller can be easily integrated to the direct deadbeat control block, as illustrated in Fig. 1.

B. Online Adaptive Parameter Identification (OAPI)
In order to address the parameter uncertainty and mismatch issues under wide-range grid impedance, an OAPI method is proposed to estimate the overall interface inductance between the inverter and the ac grid.
First, based on (1), the grid current of two consecutive sampling periods, i.e., (k − 1)th and kth cycles, is presented in the following: where i g_abc (k − 2), i g_abc (k − 1), and i g_abc (k) are the measured currents in three consecutive periods, v inv_abc (k − 2) and v inv_abc (k − 1) are the corresponding inverter output voltage in (k-2)th and (k-1)th periods, respectively, which can be calculated from the applied modulation functions, and v g_abc (k − 2)and v g_abc (k − 1) are the grid voltages during these two periods.
Considering the variation of the grid voltage in two consecutive cycles negligible, L s , which represents the total inductance of the filter L f and grid inductance L g , can be estimated asL s (k) in the following: During LVRT/ZVRT transients, the grid voltage can still be predicted every switching cycle using i g based on (2); however, it may change abruptly within a short time, therefore a predicted grid voltage in two consecutive cycles will be obtained and evaluated first. If the grid voltages of these two cycles are not close, the controller will not perform the OAPI, instead it waits for the next cycle and keeps previously identified L s value. Considering L s does not change frequently in real application, this approach will allow L s not to be affected by the grid voltage transients.
It is worth noting that L s identification based on (11) is enough for grid-tied applications with large X/R ratio, such as PV or wind energy grid integration through a large size line frequency transformer. Nevertheless, grid resistance needs to be considered for some applications when X/R ratio is small. The proposed OAPI method can also be used to identify parasitic resistance using the same principle.
The integration of the proposed OAPI to the system control is shown in Fig. 1. It can be observed that the proposed OAPI decreases the model mismatch and control errors of both the current control and the predicted grid voltage to generate current reference; therefore, the robustness of the proposed control strategy is enhanced against the inaccurate filter parameters and the wide range of unknown grid impedance.

C. Lyapunov Theory-Based Stability Analysis
After implementing delay compensation and OAPI, the overall control system block diagram can be derived in Fig. 5. Due to the nonlinearity characteristics of the proposed deadbeat controller, the Lyapunov stability theory, which seeks to characterize system behavior through state equilibrium point, is applied to analyze the stability of proposed deadbeat controller.
Based on the Lyapunov theory, if for any given time t, there exist a positive scalar λ limiting the difference with equilibrium state, defined as equilibrium point i g_eq in this control, then the system is stable, as shown in the following: where the equilibrium state i g_eq satisfies the following: To verify if i g_eq of the proposed control meet (12), the current difference between the grid current and the equilibrium state can be derived, and the upper limit of the current difference is obtained in the following: (14) where i g_abc (k − 1) and i g_abc (k) are the grid currents in two consecutive sampling periods, Δi g_abc max is the maximum current difference for two adjacent sampling instants, and I * g_abc max is the maximum current reference value.
Since the maximum current different in for two adjacent sampling instants Δi g_abc max can be derived from (1), (14) can evolve to the following: where V dc is the dc input voltage, and V g is the amplitude of the grid voltage. According to (15), the proposed control is able to meet (12), and the upper limit λ of the current difference is obtained in the following: However, (12) is a necessary but not a sufficient condition for the stability of the system relative to the equilibrium points. If (12) is met, only the nondivergence and the maximum tracking errors of the control variables can be obtained. Therefore, the uniform asymptotic stability, which guarantees the global convergence of the system, needs to be met to serve as the necessary and sufficient condition to ensure the global stability of the system.
The uniform asymptotically stability criterion requires that there exists a δ to meet the following: where O(k) is the squared norm of the current tracking error i err (k), which can be calculated in the following: Authorized licensed use limited to the terms of the applicable license agreement with IEEE. Restrictions apply. To calculate current tracking error, the grid current can be derived based on the control block diagram in Fig. 5 as follows: Since the delay time is compensated and the total inductance is identified, the grid voltage prediction can be ensured to be accurate and stable. Therefore, (19) can be reconfigured as follows: Therefore, the current tracking error can be derived from (20) as follows: Since the sampling frequency is much higher than the ac line frequency, assuming that v g_abc (k − 1) ≈ v g_abc (k) and i * abc (k − 1) ≈ i * abc (k). O(k) can be obtained in the following: According to (17), (18), and (22), the globally attractive criteria can be derived.
The current tracking error will converge to zero in the future periods. As a result, the uniform asymptotically stability of (17) is proved. The sufficient necessity of global stability of the proposed deadbeat controller is, thus, guaranteed.

IV. EXPERIMENTAL VERIFICATION
The experimental testbed shown in Fig. 6 is established in the laboratory where voltage sensor is not required. The proposed direct deadbeat control with the unity-cycle delay canceller and OAPI is implemented on a digital controller (Myway PE-Expert4) to control a 5-kW two-level SiC grid-tied inverter to demonstrate its performance. The oscilloscope is used to monitor the PCC voltage and current waveforms during the tests. In order to demonstrate grid-tied operation under wide-range grid  impedance, a grid-tied test using grid emulator (EGSTON CSU 100-1GAMP4) to emulate stiff grid with small grid inductance and real grid connection through a 1.5-MVA transformer is conducted. The grid voltage of real grid connection contains fifth and seventh low-order harmonics, and vTHD is about 4% while vTHD of grid emulator is only about 0.5%. The key experimental parameters are listed in Table I. In order to create a weak grid scenario in which small short-circuit ratio (SCR) should be less than 10, extra three-phase inductors were added to the grid side to achieve L g = 4.6 mH and small SCR as 4.16.
First, the performance of the unity-cycle delay canceller is evaluated alone without OAPI through the grid-tied experiments using grid emulator since the system is only stable under small grid impedance if OAPI is not applied. The experimental results with and without delay canceller in one single test are shown in Fig. 7(a) and (b), respectively. The waveforms from the top to bottom on the left-hand side are the monitored v PCC , inverter output line-to-line voltage v inv , and grid current i g_abc , respectively. The grid current fast fourier transform (FFT) is shown on the right-hand side. By comparing Fig. 7(a) and (b), it can be found that the grid currents in Fig. 7(b) are better controlled and have smaller switching harmonics. The iTHD without delay canceller in Fig. 7(a) is 5.81%, and the iTHD of with delay canceller in Fig. 7(b) is 4.85%. The unity-cycle delay canceller effectively improves the steady-state performance of the inverter. Meanwhile, it can be observed that the monitored v PCC is clean with negligible switching harmonics since the grid inductance is small, and v PCC is close to v g . Therefore, the proposed deadbeat control method can still achieve good current and power control performance even without the proposed OAPI technology under small grid impedance.
However, the control performance will be degraded when the grid inductance L g is not negligible and cannot be obtained accurately and timely. Fig. 8 shows the experimental results when L g /L f = 120% in one single test. Fig. 8(a) shows the result with delay canceller but without OAPI algorithm. From Fig. 8(a), it can be observed that the v PCC has larger switching harmonics since it is more close to v inv due to the large grid inductance. In addition, the larger grid inductance will also cause inductance mismatch in the established deadbeat model, leading to a poorly controlled grid current and a resonance peak of the inverter  output impedance between 3 and 5 kHz. Therefore, the current harmonics within this frequency range cannot be suppressed and iTHD becomes 12.17%. Fig. 8(b) presents the experimental results with OAPI algorithm and delay canceller. Through the proposed OAPI technology, L s , which contains filter inductance L f and grid inductance L g , can be accurately identified and updated in the control. It can be found that v PCC still has a large switching harmonic due to the large grid inductance. Nevertheless, Fig. 11. Dynamic experimental results for grid synchronization during start-up with P * = 100% at t 0 when L g = 600 µH and L g /L f = 120%.  the steady-state grid current can be well controlled with the proposed OAPI algorithm and the iTHD is reduced to 3.87%. Hence, the effectiveness and robustness of the proposed direct deadbeat control method with unity-cycle delay canceller and OAPI algorithm is validated when L g increased from 50 to 600 μH. Fig. 9 shows the steady-state performance under weak grid when L g increased to 4.6 mH and SCR becomes 4.16. The steady-state experimental results were obtained using the proposed deadbeat control method with delay canceller and OAPI. It can be found that the SiC grid-tied inverter can operate with well-controlled current under large grid inductance condition.
The measured v PCC of Fig. 9(a) is very close to v inv under large grid inductance. The iTHD of the grid current is 3.79%, and the switching frequency harmonic is greatly suppressed by the large interface inductance. L s identification results under different grid inductance are illustrated in Fig. 10(a) and (b), respectively. It can be concluded from Fig. 10 that the proposed OAPI algorithm is effective and accurate for identifying the total interface inductance and the estimation error is less than 2%. It worth mentioning that Fig. 8(b) and Fig. 9 can also serve as a good indicator that L s is estimated accurately; otherwise, i g is seriously distorted due to large low-order harmonics leading to unstable operation under weak grid condition.
The dynamic performance of the proposed control is verified through start-up and power step change. Fig. 11 shows the experimental results of grid synchronization during start-up transients connected to the real grid. The SiC inverter is connected to the ac grid at t 0 with P * = 5 kW. There is no grid frequency preset in the start-up. Since v g is not able to be predicted before grid connection,v g is, therefore, the inverter voltage resulting in generated v inv before t 0 containing no fundamental ac frequency component. After synchronization, v inv follows the same frequency and phase as v g . The SiC inverter can quickly synchronize with the ac grid without PLL and voltage sensors. In addition, the inrush current-free feature can be achieved during the synchronization transient, which avoids triggering the fault protection and enhances the system robustness. The synchronization during start-up process can be completed and enter the steady state within 1 ms (∼0.06 ac cycle).
The experimental results of power reference step changes with the proposed control connected to the real grid are presented in Fig. 12. The P * first changes from 0 to 5 kW, and then changes back from 5 kW to 0. Note that no PLL or voltage sensor is applied, instead it predicts the grid voltage information to generate the current reference and inverter voltage reference. It can be found that not only the steady-state current and power are well controlled, but also good dynamic performance with fast response is achieved. There is no current overshoot during these transients. The inverter tracks the references accurately with short settling time (400 μs/20 sampling cycles/∼2% ac cycle).
The LVRT experimental results are shown in Fig. 13. The grid emulator is used to generate the low-voltage condition. The grid voltage first drops from 200 to 100 V llrms . After grid voltage-sag duration time of 0.5 s, the grid voltage recovers to normal conditions. The SiC grid-tied inverter is controlled at the constant current mode during the LVRT process. With the proposed PLL-less voltage sensorless direct deadbeat control method, the SiC inverter can achieve fast, stable, and reliable control during the LVRT, and the overshoot currents and transient time are significantly mitigated (400 μs/20 sampling/∼2% ac cycle). The grid current reference is accurately tracked during the whole process.
It is important to note that the proposed direct deadbeat control method is a unified control method for both steady states and transients, which requires no modes identification or modes switching during LVRT process.
The effectiveness and the advantages of the proposed direct deadbeat control method under wide-range grid impedances are verified in the experiment. Through the proposed direct deadbeat control method, the voltage sensorless and PLL-less SiC gridtied inverter can achieve superior steady state, transient, and LVRT control performance.

V. CONCLUSION
A direct deadbeat control method is proposed in this article for SiC grid-tied inverters to achieve not only fast but stable operation under wide-range grid impedance. Compared with the state-of-the-art grid-tied inverter control methods, the novel features of the proposed method can be summarized as follows.
No extra hardware circuit or additional transient controller is required to mitigate the inrush current during LVRT. 3) Proposed OAPI method and the unity-cycle delay canceller has solved the parameter mismatch issue of MPC approach and compensated delay effects.

4) The global stability is achieved and proved based on
Lyapunov stability theory. 5) No complex and time-consuming controller parameter design is required. 6) Ease of implementation to achieve fast dynamics and superior steady-state performance. The proposed method is experimentally verified on a SiC gridtied inverter with L filter. The proposed method is able to operate under unbalanced grid condition and estimate grid resistance for low X/R ratio applications, which will be verified in our future work. The proposed method can also be applied to grid-tied inverter with LCL filter. The benefits will be investigated in our future work.