A Two-Stage Module Based Cell-to-Cell Active Balancing Circuit for Series Connected Lithium-Ion Battery Packs

This article addresses a two-stage module based cell-to-cell active equalization topology based on a modified buck-boost converter for series connected Lithium-ion battery packs. In the proposed topology, initially module based equalizing currents are controlled. Subsequently, cell-based equalizers are controlled in parallel within each battery module. The proposed topology significantly reduces the balancing time by transferring higher balancing current from a strong cell to the weakest cell in a module directly. With the proposed topology's modularized design, reduces voltage stress on long strings of switches, resulting in improved performance with fewer components. The operating principle, control strategy and design constraints are analyzed in detail. The MATLAB/Simulink platform is utilized to demonstrate the feasibility of the proposed technique for balancing the energy in series connected battery cells. To reduce the complexity of the control approach, the digital control is implemented using an FPGA control board. Further, a laboratory prototype is developed to show the feasibility and operability of the proposed topology.

to its electrochemical limits, which is insufficient to fulfill the high voltage requirements of electric vehicle.Therefore, a large number of lithium-ion cells are need to be connected in series and parallel to provide the battery voltage and power requirements.
The electric properties of cell in the battery pack can change due to the manufacturing and environmental variations, which leads to voltage mismatches between the cells while the battery pack is in charging or discharging state.Due to these specific cells, they may be overcharged or depleted, that reduces usable battery capacity and lifetime.Thus, the battery pack must be provided with a reliable cell balancing system to reduce the cell voltage mismatches and to enhance system performance.
The state-of-charge (SoC) and cells' terminal voltage are two often utilized indices for cell balancing.Since, the cells' SoC and open-circuit voltage (OCV) have a known relationship, they can provide the same balancing effect [2].
Moreover, obtaining the precise SoC of each individual cell is quite difficult.Consequently, cell voltage balancing can be used instead of cell SoC balancing for lithium-ion batteries.
There are two types of balancing methods: passive and active.A resistor is generally used in parallel with each cell in passive techniques.The main drawback of the passive techniques, is that the overcharged cell's extra energy is dissipated as heat by the resistor.The passive cell balancing circuit is mainly employed in low power applications due to its low cost and easy control.To overcome the drawbacks of passive cell balancing circuits, the active methods are used to balance the charge between cells using active components such as inductors, transformers, capacitors and combination of inductors and capacitors.
In the C2P type, the charge is transferred from the highly charged cell to the pack, and this method is suitable for balancing the cells while the battery is being charged.The P2C method can transfer charge from the pack to low charged cell; this method is suited for balancing the cells during the battery discharge.The cell balancing speed can be improved to some extent by these methods.However, these methods cannot achieve direct charge transfer between unbalanced cells, which leads to a lower balancing efficiency.
In the direct C2C type, charge can be transferred from a highly charged cell to a low charged cell while the battery is in charging or discharging condition.However, these circuits can simultaneously process only one healthy and one weak cell, resulting in a lower cell balancing speed for a long series cell string.The multi-winding transformer balancing circuit [7], LC series resonant circuit [8] and balancing circuit with a single inductor [9] can transfer energy directly from C2C.However, in [7], the circuit is limited in terms of windings, complicated and expensive.In [8], the balancing current is proportional to the difference in voltage between the unbalanced cells.Despite the small difference in voltage between the cells, it requires more cell equalization time and it has more complexity in control algorithm.In [9], the balancing circuit requires more switches and diodes to combine unbalanced cells with an inductor.In the AC2C type, charge can only be transferred between two adjacent cells [13], [14], [15].Switched capacitors and Bidirectional buck-boost based equalizers are good choices for the AC2C type.
In [13], a single equalization unit is shared by neighbouring two cells.Each equalization unit has an identical structure, and charge can flow efficiently from one cell to another cell in either way.The main drawback of this topology is that the balancing speed decreases with an increase in the number of cells.
Most of the topologies mentioned above can simultaneously balance one or maximum of two cells.To overcome this problem, AC2AC balancing method is used, which can balance many cells at a time.The AC2AC balancing circuits are mainly categorized into three types: multi winding transformers [16], switched capacitors [17] and individual balancing units [18], [19], [20], [21].In the multi-winding transformer-based method, each cell requires an individual winding.Since, the transformer-based circuits are limited in windings, it is impossible to practically design and implement the transformer with 'N' number of windings.In the switched capacitor-based method, the balancing speed increases with an increase in switching frequency, but its efficiency decreases accordingly.The individual balancing unit method can achieve better balancing performance, but it has complex control circuit and increased circuit size.
Multiple equalization mode based circuit is presented in [22], which can balance the cells in a unit-to-unit and middle-to-sides modes.However, it is difficult to achieve a balance between the non-adjacent cells due to the lack of direct charge transfer paths.A multiphase interleaved converter is presented for transferring charge from AC2AC [23].The large volume of the inductor is the main drawback of the circuit, which directly affects the converter parameters, including maximum current, switching frequency, and nominal DC bus voltage.The analysis of an active charge balancing topology based on a single non-isolated DC/DC converter is presented in [24].Due to increased number of cells connected in series, the total estimated efficiency and converter power rating are reduced proportionally.Hence, this approach is only suitable for low voltage applications.Furthermore, to increase the efficiency of the balancing circuit, a continuous conduction mode based buck-boost cell balancing circuit is presented in [25], where the cell equalization time is more, although the zero-voltage switching technique is used.
However, the above discussed topologies are difficult to apply for a long battery string.Hence, to overcome these difficulties, modularization technique is used.In this technique, a long series battery string is divided into several modules, each containing the same number of series cells.To attain equalization between modules, requires two transformers for the circuits presented in [26], [27].In [3], each module has its transformer though it can balance some cells in the module.Multiple cell equalization is achieved simultaneously in [28], but each module requires a multi-winding transformer.Nevertheless, the equalization system must include active switches and transformers due to modularization.Therefore, the equalization system is to be bulky, heavy, and expensive.In addition, the additional components reduce the efficiency of the system.
To overcome the limitations in the above-mentioned literature and to aid in enhancing the balancing speed with fewer components, this article addresses an active cell balancing topology based on the modified buck-boost converter.
The following are salient features of the proposed topology over the conventional methods.
1) The conventional circuit can target only one cell at a time.Whereas, the proposed circuit can target two cells simultaneously.Thus, the balancing speed is increased.2) Detecting and balancing low charge cells, becomes easier with proposed module based cell balancing circuit.3) In the proposed active cell balancing topology, equalization is not only confined among the cells, but it is also feasible between two unbalanced modules simultaneously.4) Modularized cells of the proposed circuit can significantly reduce the voltage stress on the switches.Moreover, it improves the system performance with fewer components.The rest of this article is organized as follows.The circuit structure, operational principles and control strategy of the proposed topology are described in Section II.Section III describes the design parameter calculations.Simulation and experimental results are presented in Section IV.Comparison of the proposed topology with conventional topologies is provided in Sections V and VI concludes this article.

II. PROPOSED ACTIVE CELL BALANCING TOPOLOGY
The circuit structure, operating principle and control strategy of the proposed topology is discussed in this section.

A. Circuit Structure
The conventional one-stage cell balancing circuit based on a buck-boost converter is shown in Fig. 1    From conventional topology shown in Fig. 1(a), the energy can be transferred from C 1 to C 3 via C 2 only; it includes two inductors L 1 and L 2 .Whereas, in the proposed topology shown in Fig. 2(a), energy can be transferred directly from cell C 1 to C 3 through the inductors L 1 or L 2 , improving the system's flexibility.Thus, the cell balancing speed is high, and power losses decrease in the proposed cell balancing topology.Moreover, the proposed two-stage active balancing topology requires only five inductors and ten switches to meet the same current limit.Conversely, the conventional two-stage balancing circuit requires eight inductors and fourteen switches, which increases the circuit complexity and the number of components.

B. Operational Principle
A battery pack with six cells, is considered to demonstrate the operational principle of the proposed active cell balancing topology, with each module containing three cells.The proposed cell balancing topology has two stages of equalization circuits such as module balancing and cell balancing.SoC equalization is one of the techniques for balancing a battery pack but obtaining the exact SoC of each cell is highly challenging.However, the SoC is proportional to the battery's OCV.Therefore, the equalizer in the proposed cell balancing topology determines the operating modes and switching patterns based on the voltage difference of the cells.

1) First Stage (Module Balancing):
The module balancing operates on the principle of buck-boost converter topology.The source and target modules are decided by the module depending on the level of voltages.Fig. 3 shows that by controlling the switches S m1 and S m2 , energy can be transferred from source module to the target module by monitoring the voltages of two adjacent battery modules.
In the module balancing, switches S m1 and S m2 are turned on and off in a complementary manner.Let us consider the V M 1 and V M 2 are the voltages of the module 1(M 1 ) and module 2 (M 2 ) respectively, i M 1 & i M 2 are the module currents, L m is the inductor and i + L m and i − L m are the charging and discharging currents of the inductor, respectively.Fig. 3 shows when S m1 operational circuit and its corresponding waveforms Case 1: Mode 1 [t 0 -t 1 ]: It is assumed that module M 1 as the source module and M 2 as target module.Thus, the voltage from module M 1 is applied to the inductor L m , when S m1 is turned on as shown in Fig. 3(a).
The inductor current i L m increases linearly from zero during this period, whereas the electric energy is converted into magnetic energy, which is stored in the inductor L m .The source module M 1 , discharge current i M 1 also rises linearly from zero.As a result, the excess energy of the source module M 1 is transferred to L m .The charging current of inductor L m is expressed as, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
Mode 2 [t 1 -t 2 ]: Since, i L m cannot change abruptly when S m1 is turned off, the body diode of S m2 offers a freewheeling path for i L m .Consequently, at this period, the body diode conducts before the switch S m2 conducts, and the inductor L m is paralleled with target module M 2 via S m2 , as shown in Fig. 3(b).Hence, the inductor's polarity is flipped, and i L m drops linearly when S m2 is turned on.The discharging current of the inductor L m is expressed as, The inductor's magnetic energy is converted to electric energy and delivered to the target module M 2 .These two periods make up one switching cycle as shown in Fig. 3(c).
Mode 3 [t 2 -t 3 ]: Mode 3 begins at t = t 2 , when the inductor current returns to zero.In mode 3, as the circuit operates in discontinuous conduction mode (DCM) both the switches are turned off.Similarly, in case 2, by controlling switch S m2 , energy can be transmitted from M 2 to M 1 .
2) Second Stage (Cell Balancing): Unlike module balancing, the balancing process occurs between the three cells and achieves the balance in the second stage.In this stage, two types of energy transfer scenarios are possible between the cells.a) Charge transfer between adjacent cells: In this scenario, the charge is transferred from source cells to the target cells directly in one step.The working principle of proposed cell balancing circuit is divided into four different cases.Fig. 4(a)-(h) show the operational principle for the four cases.Case 1: respectively, L 1 and L 2 are the inductors, i L1 and i L2 are the inductor currents.By comparing the three cell voltages, analyse of the circuit is carried out as follows.
Case 1: ( The source and target cells are decided by the cell with higher and lower voltages, respectively.This case is operated under DCM, and it has three modes.The key waveforms of current during charging and discharging conditions of the inductor ) are presented in Fig. 5(a).
Mode 1 [t 0 -t 1 ]: When S 1 is turned on at t = t 0 , the cell C 1 starts discharging and excess energy of C 1 is stored in the inductor L 1 in the form of magnetic energy.Subsequently, C 1 , S 1 and L 1 form a loop and the balancing current builds up with the direction shown in Fig. 4(a).The charging current of the inductor L 1 is expressed as, at t = t 1 , the current in the inductor L 1 reaches its maximum value: discharging current of the inductor L 1 is expressed as, Mode 3 [t 2 -t 3 ]: Mode 3 begins at t = t 2 when the inductor current returns to zero.In this mode, both the switches are turned off as circuit operates in the DCM of operation.The total balancing current of the inductor L 1 for a period of (t 0 − t 3 ) is expressed as, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

TABLE I OPERATING MODES OF PROPOSED MODULE BASED CELL BALANCING FOR CASE 1, CASE 2, CASE 3 AND CASE 4
Similarly, the inductor currents (i ) and inductor voltages (V L1 , V L2 ) for case 2, case 3 and case 4 are given in Table I and the corresponding key waveforms are presented in Fig. 5(b), (c) and (d), respectively.
b) Charge transfer between non-adjacent cells: In this scenario, the charge transfer from a source cell to the target cell cannot be transferred directly in one step due to inappropriate direct energy transfer paths.However, the first step transfers charge from a source cell to an adjacent cell.Subsequently, the charge is transferred from the adjacent cell to the target cell in the second step.Therefore, the charge is transferred from a source cell to the target cell in two steps.
For the analysis, it is assumed that the source cell is C 2 , and the target cells are C 1 and C 3 in case 5 (V C2 > V C1 &V C3 ).The charge can transfer from the source cell to either of the cells C 3 or C 1 in the first step, thus the cells C 1 or C 3 can be considered as intermediate cells.In the next step, the charge is transferred from either of the cells C 2 and C 3 to cell C 1 or C 1 and C 2 to C 3 , depending upon the switching operation, same as in case 2 and case 3. The proposed cell balancing circuit's operating principle for case 5 is explained as follows.
Case 5: ( Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.If Mode 1 ( t 0 − t 1 ): In first step, when S 2 is turned on at t = t 0 as shown in Fig. 6(a), the highly charged cell C 2 starts discharging, and excess energy of C 2 is stored in the inductor L 1 .Subsequently, C 2 , C 3 , S 2 and L 1 form a closed circuit, and the balancing current (i L1 ) builds up in the inductor L 1 .
Mode 2 ( t 1 − t 2 ): When switch S 2 is turned off at t = t 1 as illustrated in Fig. 6(b), and the loop with L 1 , D 1 and C 1 is formed, during this period, the charge is transferred from L 1 to C 1 , which means that the charge is transferred from a highly charged cell C 2 to an adjacent cell C 1 .
Mode 3 ( t 2 − t 3 ): After the first step ends, the cells C 1 and C 2 having higher charge than C 3 .Thus, mode 3 starts when S 3 is turned on at t = t 2 as shown in Fig. 6(c), and excess energy of C 1 and C 2 is stored in the inductor L 2 .
Mode 4 ( t 3 − t 4 ): Mode 4 starts when S 3 is turned off at t = t 3 as illustrated in Fig. 6(d), and the loop is formed with L 2 , C 3 and D 4 , during this period, the charge is transferred from L 2 to C 3 , which means that the charge is transferred from a highly charged cell, i.e., C 2 to the target cell C 3 .
Case 6: ( , to discharge highly charged cells V C1 &V C3 , switches S 1 and S 4 are turned on and off in a complementary manner.Fig. 6(e)-(h) show the operating principle for the case 6 and the key waveforms are shown in Fig. 7(b).
Mode 1 ( t 0 − t 1 ): In first step, when S 1 is turned on at t = t 0 as shown in Fig. 6(e), the highly charged cell C 1 starts discharging, and excess energy of C 1 is stored in the inductor L 1 .Subsequently, C 1 , S 1 and L 1 form a closed circuit, and the balancing current (i L1 ) builds up in the inductor L 1 .
Mode 2 ( t 1 − t 2 ): When S 1 is turned off at t = t 1 as shown in Fig. 6(f), and the loop with L 1 , C 2 , C 3 and D 2 is formed, during this period, the energy is transferred from L 1 to C 2 &C 3 which means that the energy is transferred from a highly charged cell C 1 to an adjacent cells C 2 &C 3 .
Mode 3 ( t 2 − t 3 ): After the first step ends, the cells C 3 having higher energy than C 1 &C 2 .Thus, mode 3 starts when S 4 is turned on at t = t 2 as shown in Fig. 6(g), and excess energy of C 3 stored in inductor L 2 .Subsequently, C 3 , S 4 and L 2 form a closed circuit, and the balancing current (i L2 ) builds up in the inductor L 2 .
Mode 4 ( t 3 − t 4 ): Mode 4 starts when S 4 is turned off at t = t 3 as illustrated in Fig. 6(h), and the loop with L 2 , D 3 , C 1 and C 2 is formed, during this period, the charge is transferred  from L 2 to C 2 , which means that the charge is transferred from a highly charged cell, i.e., C 3 to the target cell C 2 .The operating modes of case 5 and case 6 are given in Table II.

C. Control Strategy
A control scheme is developed to analyse the operation of equalization, as shown in Fig. 8.The controller detects the cell terminal voltages.Based on the identified terminal voltage, the V OC of each cell is estimated.The main aim is to equalize each cell V OC .Thus, the difference of reference voltage V t and ΔV is considered as the error signal, the error signal is generated only when the ΔV is greater than the predefined threshold voltage value V t .
The error signal represented as, To eliminate stability difficulties and improve steady-state error, the error signal is sent through a PI controller block.The output signal of the PI controller is fed to the FPGA controller board, which is composed of a data processor, digital controller and PWM generator.Based on the control signal from the PI controller, gate signals are generated, which are provided to the isolated gate driver to operate the cell balancing circuit.The equalizer can be switched off to save power and the error integration can be reset after complete equalization has been achieved, i.e., error signals are extremely near to zero.
This proposed module based cell balancing circuit utilizes the constant current and constant voltage (CC/CV) charging mode to charge the cell.The cell is charged with the constant current source in CC mode until the cell voltage reaches rated value.The cell is charged with constant voltage and decreasing current in CV mode until the current exceeds the specified level.The constant current discharging method is used to discharge the cell.

III. DESIGN PARAMETERS
The inductor design, OCV estimation and measurement of battery internal resistance & temperature are discussed in this section.

A. Inductor Design
To avoid the magnetization effect of the inductor, the inductor saturation current must be configured higher than the maximum inductor peak current.Thus, the inductor is determined by the following expression, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
Where i = 1 & 2, V is the cell voltage, D is the duty cycle, T s is switching time and I Li, avg is the average inductor current.
By considering the terminal voltages of source and target cells V CSource and V CT arget , respectively, D is the duty cycle, L i is the inductor where i = 1&2 and T s is switching time, the condition to ensure the DCM buck-boost operation in [11] is, (11) During normal operating conditions, the open-circuit voltage of a battery varies from 2.5 V to 4.2 V. Using this voltage, the value of duty cycle is computed as follows, By considering the battery with a capacity of 2 Ampere-hour at a 3C rate, it is required to manage equalizing inductor current below 6A. 10 kHz switching frequency is considered for the designing of the circuit parameters.
Similarly, for module balancing, the duty cycle (D m ) of S m1 and S m2 is considered as, From ( 1) and ( 3) the expressions of balancing inductors for the first and second stages are as follows: Therefore L 1 &L 2 are considered as 100 µH and L m is 50 µH.

B. OCV Estimation
There is usually a discrepancy between the OCV and terminal voltage (V n ) of the battery during the equalization process due to inconsistency between diffusion characteristics and the battery's internal resistance.The accuracy of equalization assessment is governed by the voltage drop due to battery's internal resistance.Fig. 9 shows the commonly used battery model.The OCV is represented with DC voltage source.The RC network (r p and c p ) represents the polarization resistance, capacitance and (r i ) represents the ohmic resistance.The battery r eq can be determined using the simplified battery model depicted in Fig. 9(b).

C. Measurement of Battery Internal Resistance & Temperature
As shown in Fig. 9(a), r eq contains the equivalent impedance of the RC network and r i.When (−i cn ) and (i cn ) are the charging and discharging currents of battery respectively, the estimated OCV of the battery while charging and discharging is expressed as,  When the battery is charged continuously with the constant current source.A step pulse current(I CP ) is applied to the battery when the measurement begins.The corresponding RC network impedance of the Thevenin model can be neglected when compared to the internal resistance.From Fig. 10(a), it can observe that the initial voltage variations are due to the voltage drop of internal resistance in a short period.
Therefore, the difference between terminal voltage (ΔV n ) and pulse charging current (ΔI CP ) of the battery can be used to calculate the equivalent internal resistance (r eq ).
The typical equivalent resistance characteristics of NCR 18650 lithium-ion batteries are presented in [29].The responses of r eq versus battery OCV are presented in Fig. 10(b), indicating that the variation of r eq throughout the entire OCV range is substantially less than the average value.Hence, the average r eq is used to calculate the OCV of each cell in the proposed cell balancing topology to simplify the control algorithm.By compensating the voltage drop due to r eq , the OCV parameter can be estimated precisely.This enhances the precision of equalization judgment.
The typical acceptable temperature region for Lithium-ion batteries, is −20 °C to +60 °C.Both low and high temperatures outside of this region lead to degradation of performance and irreversible damages, such as lithium plating and thermal runaway that leads to energy loss of battery.
The charging should take place only at a battery temperature of +5 °C to +45 °C for minimum energy loss.During experiments, various temperature readings are taken for both charging and

TABLE III EXPERIMENTAL PARAMETERS
discharging of each cell.It can be illustrated from the graphs that during both cell to cell Fig. 11(a) and module to module Fig. 11(b).It is found that the temperature varies between maximum of 25 °C to 28 °C, which is normal during the operation and it can be considered that energy loss is minimum.

IV. SIMULATION AND EXPERIMENTAL VALIDATION
In order to prove the theoretical analysis of the proposed topology, simulation and laboratory prototype are implemented.Figs.12-15 present the simulation and experimental waveforms of all the six operating cases, respectively.Figs.[16][17][18] show the experimental results of equalization process.A laboratory prototype for the proposed topology consisting of five modules containing three lithium-ion cells connected in series is developed.Each cell is equipped with a voltage sensor to sense the cell voltage.Fig. 19 shows the laboratory setup for the proposed topology.Table III summarizes the experimental parameters that are used to laboratory prototype.An FPGA based digital control algorithm has been implemented for the proposed topology that aid of simple control and robust performance.
In order verify the effectiveness of the proposed two-stage topology, various case studies are investigated for module and cell balancing.12(a)-(d) depict the simulation and experimental waveforms of current and voltage of module balancing circuit for case 1, where M 1 is the source module, i.e., V M 1 = 11.3V with C 1 = 3.85 V, C 2 = 3.75 V, C 3 = 3.7 V, and M 2 is the target module V M 2 = 10.3V with C 4 = 3.7V, C 5 = 3.4V, C 6 = 3.2 V.At this instant V M 1 is greater than V M 2 , hence the switch S m1 is turned on.Therefore, the charge is transferred from the source module (M 1 ) to the inductor (L m ) during the turned-on period of S m1 , as illustrated in Fig. 3(a).Fig. 12(a) and (c) illustrate simulated and experimental waveforms of the module balancing current (i + L m = i M 1 ), that is stored in the inductor L m during turn-on period of S m1 .It flows into target module M 2 i.e., (i − L m = i M 2 ), through body diode of S m2 during turn-off period of S m1 , as shown in Fig. 3(b).These results validate (1) and ( 2) and theoretical waveforms of Fig. 3(c).It is considered module balancing is verified by the positive current (discharging) of the source module (i M 1 ) and the negative current (charging) of the target module (i M 2 ).Moreover, the lower voltage module (M 2 ) receives more current.It can be observed that the average current of module 2 is greater than module 1, that expedites the balancing speed.Since V M 2 is greater than V M 1 , the switch S m2 should be turned on.Therefore, the energy is transferred from the source module (M 2 ) to the inductor (L m ) during the turned-on period of S m2 .Fig. 12(e) and (g) illustrate simulated and experimental waveforms of the module balancing current (i

A. Module Balancing 1) Case 1. (V
, that is stored in the inductor L m during turn-on period of S m2 .It flows into target module M 1 i.e., (i − L m = i M 1 ), through body diode of S m1 during turn-off period of S m2 .Fig. 12(f) and (h) show the simulated and experimental waveforms of drain to source voltage of the switches S m2 and S m1 , respectively.
To evaluate the theoretical waveforms illustrated in Fig. 5(a), the simulation and experimental results are measured at D 1 = 0.4 as expressed in (12) are shown in Fig. 13(a)-(d), where cell C 1 is the highly charged cell and C 2 & C 3 are the low charged cells.Since C 1 is greater than C 2 & C 3 , the switch S 1 should be turned on.Therefore, the charge is transferred from the highly charged cell C 1 to the inductor L 1 during the turn-on period of S 1 , as shown in Fig. 4(a).
Fig. 13(a) and (c) show the simulated and experimental waveforms of discharging current from cell C 1 (positive current i.e., i C1 = i + L1 ), that is stored in the inductor L 1 during turn-on period of S 1 and recovered charging current to cells C 2 and C 3 (negative current i.e., −i C2 = −i C3 = i − L1 ) during turnoff period of S 1 as shown in Fig. 4(b).These results support (3) and ( 5) and the waveforms illustrated in Fig. 5(a).
It is notable that the experimental waveforms are almost matchup with simulated waveforms, and both the waveforms are concurred with (6). 2 To evaluate the theoretical waveforms illustrated in Fig. 5(b), the simulation and experimental results are measured at D 2 = 0.3 as expressed in (12) are shown in Fig. 13(e)-(h), where cells C 2 and C 3 are the highly charged cells and C 1 is the low charged cell.Since C 2 & C 3 is greater than C 1 , the switch S 2 should be turned on.Therefore, the charge is transferred from the highly charged cells (C 2 & C 3 ) to the inductor (L 1 ) during the turn-on period of S 2 , as shown in Fig. 4(c).
, that is stored in the inductor L 1 during turn-on period of S 2 and recovered charging current to cell C 1 (negative current i.e., −i C1 = i − L1 ) during turnoff period of S 2 as shown in Fig. 4(d).
Fig. 13(f) and (h) present the simulated and experimental waveforms of gate pulse (S 2 ), i L1 ≈ 2.4 A and voltage stress across switches S 2 and S 1 i.e., V DS2 ≈ 8V, V DS1 ≈ 4V respectively. 3 To evaluate the theoretical waveforms illustrated in Fig. 5(c), the simulation and experimental results are measured at D 3 = 0.3 as expressed in (12) are shown in Fig. 14   the charge is transferred from the highly charged cells (C 1 & C 2 ) to the inductor (L 2 ) during the turn-on period of S 3 , as shown in Fig. 4(e).
Fig. 14(a) and (c) show the simulated and experimental waveforms of discharging currents from cells , which is stored in the inductor L 2 during turn-on period of S 3 and recovered charging current to cell C 1 (negative current i.e., − i C3 = i − L2 ) during turnoff period of S 3 as shown in Fig. 4(f).Fig. 14(b) and (d) present the simulated and experimental waveforms of gate pulse (S 3 ), i L2 ≈ 2.4A and voltage stress across switches S 3 and S 4 i.e., To evaluate the theoretical waveforms illustrated in Fig. 5(d), the simulation and experimental results are measured at D 4 = 0.4 as expressed in (12) are shown in Fig. 14(e)-(h), where cell C 3 is the highly charged cell and C 1 &C 2 are the low charged cells.Since C 3 is greater than C 1 &C 2 , the switch S 4 should be turned on.Therefore, the charge is transferred from the highly charged cell C 3 to the inductor L 2 during the turn-on period of S 4 , as shown in Fig. 4(g).Fig. 14(e) and (g) show the simulated and experimental waveforms of discharging current from cell C 3 (positive current i.e., i C3 = i + L2 ), that is stored in the inductor L 2 during turn-on period of S 4 and recovered charging current to cells C 1 and C 2 (negative current i.e., − i C1 = − i C2 = i − L2 ) during turnoff period of S 4 as shown in Fig. 4(h).Fig. 14(f) and (h) show the simulated and experimental waveforms of gate pulse (S 1 ), inductor current i L2 ≈ 1.6A and drain to source voltage of the switches S 4 and To evaluate the theoretical waveforms illustrated in Fig. 7(a), the simulation and experimental results are shown in Fig. 15 and Cell voltages during cell equalization process of six cases: ) and (i) Experimental results of module and cell balancing.

C. Validation of Balancing Effect
For the proposed topology, the module equalization must be completed before the cell equalization to avoid the consequences of inconsistency between the cell voltages within the module.Thus, the threshold voltage of the module equalization should be greater than cell equalization.In order to ensure accuracy of the circuit, the threshold voltages for the module and cell equalizations are set to 0.03 V and 0.02 V, respectively.
1) Module Balancing: In order to verify the module balancing effect an experiment is conducted for two cases with different module initial voltages were presented in Fig. 16.
Fig. 16(a) presents the experimental module balancing waveform for case 1, where M 1 is the source module i.e., V M 1 = 11.3V with C 1 = 3.85 V, C 2 = 3.75 V, C 3 = 3.7 V, and M 2 is the target module i.e., V M 2 = 10.3V .After the equalization process initiated by the controller, module M 1 starts discharging and M 2 starts charging periodically.As soon as voltage gap between modules is reduced from 1 V to 25 mV, the complete module equalization is achieved at point (A = 250 s) with 10.75 V.
Fig. 16(b) presents the experimental waveform for case 2, where M 2 is the source module i.e., V M 2 = 11.9V, and M 1 is the target module, i.e., V M 1 = 11.45V.After the equalization process starts, module M 2 starts discharging and M 1 starts charging periodically.As soon as voltage gap between modules is reduced from 0.45 V to 22 mV, the complete module equalization is achieved at point (B = 260 s) with 11.65 V. Threshold voltage values are determined by the accuracy required.Higher accuracy requires a smaller threshold, and longer equalization time.Therefore, the balancing time in this case is more compared to case 1.
2) Cell Balancing: To verify the feasibility of the control strategy, an experiment is conducted for six cases with different initial Lithium-ion cell voltages are presented in Fig. 16.As discussed above, after completion of module equalization for case1 the cell voltages within the module1 are sensed as C 1 = 3.65 V, C 2 = 3.6 V, C 3 = 3.55 V. Hence, the initial values for case 1 are 3.65 V, 3.6 V, 3.55 V concerning with C 1 , C 2 and C 3 .In this case, C 1 has the highest voltage (3.65 V), C 3 has the lowest voltage (3.55 V), and C 2 is the second lowest voltage (3.6 V) among the three cells.
The initial voltage difference between the highest and lowest cells are 0.1 V. Therefore, after the equalization process starts, cell C 1 starts discharging, and cells C 2 &C 3 start charging periodically (refer Fig. 16(c)).Since the voltage difference between C 1 and C 2 is less than C 1 and C 3 .Thus, the earlier equalization is achieved between C 1 and C 2 at point A 1 before C 1 and C 3 at point B 1 .The complete equalization is achieved at point (C = 400 s) as soon as the voltage difference between all the three cells is reduced from 0.1 V to 18 mV.
The initial voltage values for case 2 are 3.89 V, 3.95 V and 4.01 V.In this case, cell C 3 has the highest voltage (4.01 V), C 1 has the lowest voltage (3.89 V) and C 2 has the second highest voltage (3.95 V) among the three cells.
The initial voltage difference between the highest and lowest cells are 0.12 V. Therefore, after the equalization process starts, cells C 2 &C 3 start discharging, and cell C 1 starts charging periodically (refer Fig. 16(d)).Due to the voltage difference between C 3 and C 2 , is small compared to C 3 and C 1 .Hence, the equalization is achieved first between the cells C 3 and C 2 at point A 2 before C 3 and C 1 at point B 2 .The complete equalization is achieved at D = 270 s, as soon as the voltage difference between all the three cells is reduced from 0.12 V to 15 mV.Moreover, it can be observed from Fig. 13(e), the lower voltage cell i.e., cell C 1 receives more current than other cells.Hence, the average current of cell C 1 is higher than the cells C 2 and C 3 .Therefore, the balancing time in this case is less compared to case 1.
Similarly, the initial values for case 3 are 3.880 V, 3.904 V, 3.792 V.In this case cell C 2 has the highest voltage (3.904 V), C 3 has the lowest voltage (3.792 V) and C 1 has the second highest voltage (3.880 V) among the three cells.
The initial voltage difference between the highest and lowest cells are 0.112 V. Therefore, after the equalization process starts, cells C 1 &C 2 start discharging, and cell C 3 starts charging periodically (refer Fig. 16(e)).Due to the voltage difference between C 2 and C 1 is small compared to C 2 and C 3 .Hence, the equalization is achieved first between the cells C 2 and C 1 at point A 3 before C 2 and C 3 at point B 3 .The complete equalization is achieved at E = 280 s as soon as the voltage difference between all the three cells is reduced from 0.112 V to 12 mV.
The initial values for case 4 are 3.75 V, 3.8 V, 3.9 V.In this case cell C 3 has the highest voltage (3.9 V), C 1 has the lowest voltage (3.75V) and C 2 has the second lowest voltage (3.8V) among the three cells.The initial voltage differences between the highest and lowest cells are 0.15 V.After the equalization process starts, cells C 3 starts discharging, and cells C 1 and C 2 start charging periodically (refer Fig. 16(f)).Due to the voltage gap between C 3 and C 2 is less than C 3 and C 1 .Thus, the earlier equalization is achieved between C 3 and C 2 at point A 4 before C 3 and C 1 at point B 4 .However, the cell with lower voltage i.e., cell 1 in this case receives more current.Hence, the more equalization current is transferred from C 3 to C 1 than C 2 .As soon as the voltage gap between all the three cells is reduced from 0.15 V to 16 mV, the complete equalization is achieved at point F = 405 s.
The initial voltage values for case 5 are 3.85 V, 3.95 V and 3.8 V.In this case, cell C 2 has the highest voltage (3.95V), C 3 has the lowest voltage (3.8V) and C 1 has the second highest voltage (3.85 V) among the three cells.
The initial voltage difference between the highest and lowest cells is 0.15 V. Therefore, after the equalization process starts, cell C 2 starts discharging, and cells C 1 &C 3 start charging periodically (refer Fig. 16(g)).In the first step, the excess energy of cell C 2 is transferred to adjacent cell C 1 .Hence the equalization is achieved first between the cells C 2 and C 1 at point A 5 .
In the next step, the energy is transferred from cells C 1 &C 2 to C 3 same as in the case 3 and achieves equalization at point B 5 .The complete equalization is achieved at G = 610 s as soon as the voltage difference between all three cells is reduced from 0.15V to 10 mV.
The initial voltage values for case 6 are 4 V, 3.89 V and 3.95 V.In this case, cell C 1 has the highest voltage (4 V), C 2 has the lowest voltage (3.89 V) and C 3 has the second highest voltage (3.95V) among the three cells.The initial voltage difference between the highest and lowest cells is 0.11 V. Therefore, after the equalization process starts, cells C 1 &C 3 start discharging, and cell C 2 starts charging periodically (refer Fig. 16(h)).
In the first step, the excess energy of cell C 1 is transferred to adjacent cells C 2 &C 3 .Hence the equalization is achieved first between the cells C 1 and C 3 at point A 6 .After the first step ends, cell C 3 has highest charge than C 1 &C 2 .Thus, the energy is transferred from cell C 3 to C 2 and achieves equalization at point B 6 .The complete equalization is achieved at H = 508 s, as soon as the voltage difference between all three cells, is reduced from 0.11 V to 20 mV.Moreover, it can be observed from Fig. 16(h), the balancing time is less compared to case 5 because in this case two cells (C 1 &C 3 ) are the source cells and one cell (C 2 ) is the target cell.
Further, extensive experimentation is conducted to show the module equalization is accomplished before the cell equalization Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply. of the proposed two-stage topology, with initial module and cell voltages of case 1 presented in Tables IV and V respectively.Since the module balancing inductor (L m ) is smaller than the cell balancing inductors (L 1 and L 2 ), more equalization current is transferred between modules than the cells.It leads to an early equalization accomplishment between the modules before achieving the cells equalization.From Fig. 16(i), it can observe that clearly, the module equalization is achieved before the cell equalization.
In order to evaluate the proposed cell balancing circuit with more cells, it is verified with the 55V battery pack, consisting of fifteen series connected cells.
The initial cell voltage values of fifteen cells are considered as 3.8 V, 3.5 V, 3.59 V, 3.55 V, 3.6 V, 3.79 V, 3.7 V, 3.68 V, 3.62 V, 3.741 V, 3.695V, 3.78 V, 3.62 V, 3.645 V and 3.65 V, respectively.All the cell voltages are balanced to 3.66 V at 1080s of cell equalization shown in Fig. 17(a).
The fifteen series connected cells are modularized into five modules to verify the module balancing circuit, each with three cells.The initial module voltages are 11.33V, 10.65V, 10.86 V, 11.12 V and 11 V, respectively.Fig. 18(a) shows that, all the modules are equalized to 10.992 V at 480 seconds of the module balancing.It is observed that, with the cell balancing circuit, all the cells are equalized at the 1080s, but module balancing circuit reduces approximately half of the balancing time compared to the cell balancing circuit.

V. COMPARISON OF PROPOSED TOPOLOGY WITH CONVENTIONAL METHODS
To show the superiority of the proposed topology, a comparison has been made with conventional cell balancing topologies given in Table VI.The number of components is calculated under the assumption that the battery pack voltage is 330 V, which is Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.composed of six modules, each module is having fifteen series connected cells.
The modularized fly-back converter based balancing circuit is presented in [5].This topology can transfer energy using the C2C and M2M methods and has a simple control structure.However, it requires more transformer windings, which increases the size of the balancing circuit, and it has a low balancing speed due to the diodes involved in the circuit.LC series resonant balancing circuit is presented in [8].This topology utilizes a balancing current that is proportional to the voltage difference between the imbalanced cells.Despite the small voltage difference between the cells, it requires more cell equalization time.The switched capacitor-based balancing circuits are presented in [10] and [14].These circuits require more balancing time because energy can be transferred between two adjacent cells only using the C2C method.In [26], the modularized two-stage balancing circuit is presented.This circuit can be implemented using the P2C method, and it can reduce the balancing time.However, it requires seven converters to transfer energy from the pack to the weakest cell.Thus, this circuit has lower energy transfer efficiency.In [27], only two transformers are required that are shared by modules.This circuit can be implemented using both cell to pack and pack to cell types.However, it can target only one cell at a time.Hence, it requires more balancing time and is unsuitable for high-power applications.The energy can be transmitted using the combination of C2C and C2P methods with the circuit presented in [28].This circuit requires an individual transformer for each module.Moreover, it requires more balancing time because the diodes are involved in the balancing process.
The proposed two-stage topology has more superior features compared to conventional topologies.With the proposed topology, equalization is not only restricted between the cells.It is also possible between two unbalanced modules simultaneously to shorten the equalization time with fewer number of components.Hence, the cost of the system is reduced.With different operational cases to choose from, it is accessible to choose the relevant equalization case based on the unbalanced cells.Due to the lack of direct energy transfer paths, the proposed topology is achieving the equalization between non-adjacent cells in two steps.Therefore, balancing time is more for non-adjacent cells than adjacent cells equalization.However, the proposed topology achieves cell equalization with less balancing time than conventional topologies presented in Table VI.Therefore, the proposed topology is suitable for equalizing the series connected Li-ion battery pack.

VI. CONCLUSION
A two-stage module based active cell-to-cell balancing topology based on modified buck-boost converter has been proposed in this article.The proposed configuration consists of (2N-2) high-frequency switches and (N-1) inductors.It facilitates the direct paths for energy transfer between the cells in a module by appropriately placing the inductors, that improves the system's efficiency.Further, the performance of the system has been improved by minimizing the voltage stress of the switches with modularized cells.The proposed topology with fewer components can simultaneously target and balance the two cells.Thus, the balancing speed is improved effectively.The equalization is achieved for both cell-to-cell and module-to-module stages, with the proposed active cell balancing topology by utilizing FPGA based digital control strategy.A control strategy is developed based on its operating principles to deal with the unbalanced cells.A laboratory prototype has been developed to study the performance of the proposed active cell balancing topology.Extensive tests have been conducted for the prototype to validate the proposed topology.The proposed topology has been validated for six cases with different initial cell voltage conditions, and the test results are found satisfactory.The cell equalization time is found to be 400 s with the proposed topology, which is significantly less compared to conventional topologies.Therefore, the proposed active cell balancing circuit is a suitable and promising topology for equalizing series connected Li-ion cells in a long string.

Fig. 2
Fig. 2 shows the proposed active cell balancing topology composed of two stages of balancing circuits.Fig. 2(a) shows a second stage of the balancing circuit, which contain three cells, two inductors (L 1 & L 2 ) and four switches (S 1 , S 2 , S 3 & S 4 ), to form single cell equalization unit.In contrast, the first stage structure is similar to the buck-boost converter topology.The complete structure of the proposed two-stage balancing topology, where six cells are connected in series, is composed of five inductors (L 1 , L 2 , L 3 , L 4 & L m ) and ten switches (S 1 , S 2 , …S 8 , S m1 & S m2 ) along with body diodes shown in Fig. 2(b).From conventional topology shown in Fig.1(a), the energy can be transferred from C 1 to C 3 via C 2 only; it includes two inductors L 1 and L 2 .Whereas, in the proposed topology shown in Fig.2(a), energy can be transferred directly from cell C 1 to C 3 through the inductors L 1 or L 2 , improving the system's flexibility.Thus, the cell balancing speed is high, and power losses decrease in the proposed cell balancing topology.Moreover, the proposed two-stage active balancing topology requires only five inductors and ten switches to meet the same current limit.Conversely, the conventional two-stage balancing circuit requires eight inductors and fourteen switches, which increases the circuit complexity and the number of components.
3 and D 2 is formed as shown in Fig. 4(b), during this period the energy is transferred from L 1 to C 2 & C 3 , and the
to discharge highly charged cell i.e., C 2 , switches S 2 and S 3 are turned on and off in a complementary manner.Fig. 6(a)-(d) show the operating principle for the case 5 and the corresponding key waveforms are shown in Fig 7(a).

Fig. 10 .
Fig. 10.(a) Typical voltage & current response curves with pulse charge during r eq measurement, (b) equivalent internal resistance profiles of lithium-ion batteries.

Fig. 12 (
b) and (d) illustrate the simulated and experimental waveforms of drain to source voltage of the switches S m1 and S m2 is restricted to 10 V in a steady state, and the switch voltage spike is limited to 12 V with proper snubber circuit design.It is evident that the proposed balancing circuit has significant characteristics, such as low voltage stress across the switches.2) Case 2. (V M 2 > V M 1 ): Fig. 12(e)-(h) show the current and voltage waveforms of the proposed module balancing circuit for case 2, where M 2 is the source module, i.e., V M 2 = 11.9V with C 4 = 4.1 V, C 5 = 3.95 V, C 6 = 3.85 V, and M 1 is the target module, i.e., V M 1 = 11.45V with C 1 = 3.75 V, C 2 = 3.8V, C 3 = 3.9 V.

Fig. 13 (
b) and (d) show the simulated and experimental waveforms of gate pulse (S 1 ), inductor current i L1 ≈ 1.6A and the drain to source voltage of the switches S 1 and S 2 i.e., Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

Fig. 13 (
e) and (g) show the simulated and experimental waveforms of discharging currents from cells C 2 & C 3 (positive current i.e., i + L1 (a)-(d), where cells C 1 & C 2 are the highly charged cells and C 3 is the low charged cell.Since C 1 & C 2 is greater than C 3 , the switch S 3 should be turned on.Therefore, Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
(a) and (b), where cell C 2 is the source cell and C 1 & C 3 are the target cells.Since C 2 is greater than C 1 & C 3 , switches S 2 and S 3 are turned on and off in a complementary manner.Fig. 15(a) and (b) show the simulation and experimental results of gate pulse of switches S 2 & S 3 , charging and discharging currents of inductors L 1 & L 2 during the period S 2 & S 3 operated in complementary manner.6) Case 6. (V C1 & V C3 > V C2 ): To evaluate the theoretical waveforms illustrated in Fig. 7(b), the simulation and experimental results are shown in Fig. 15(c) and (d), where cells C 1 & C 3 are the source cells and C 2 is the target cell.Since C 1 & Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.

Fig. 17 .
Fig. 17.Experimental results of cell voltage versus balancing time of 15 series connected cells: (a) with cell balancing, (b) without cell balancing.

Fig. 18 .
Fig. 18.Experimental results of module voltage versus balancing time: three cells are connected in series to form a module, and five modules are connected to form a battery pack (a) with module balancing, (b) without module balancing.

Fig. 19 .
Fig. 19.Experimental setup for (a) fifteen cells with five cell equalizers and four module equalizers, (b) single cell equalizer, (c) single module equalizer.

TABLE II OPERATING
MODES OF PROPOSED MODULE BASED CELL BALANCING FOR CASE 5 AND CASE 6