Optimization of Transition Edge Sensor Arrays for Cosmic Microwave Background Observations With the South Pole Telescope

In this paper, we describe the optimization of transition-edge-sensor (TES) detector arrays for the third-generation camera for the South Pole Telescope. The camera, which contains ∼16 000 detectors, will make high-angular-resolution maps of the temperature and polarization of the cosmic microwave background. Our key results are scatter in the transition temperature of Ti/Au TESs is reduced by fabricating the TESs on a thin Ti(5 nm)/Au(5 nm) buffer layer and the thermal conductivity of the legs that support our detector islands is dominated by the SiOx dielectric in the microstrip transmission lines that run along the legs.


I. INTRODUCTION
URRENT cosmic microwave background (CMB) [1], [2] experiments aim to precisely measure the CMB polarization, especially the parityviolating B-mode polarization, [3] with the goal of measuring the energy scale of inflation, the number of neutrino species, and the sum of masses of neutrinos.[4], [5] The measurements require exquisite sensitivity, which means large-format cameras with many bands for removing foreground signals.[6] One such camera, which is being built for the next-generation experiment on the South Pole Telescope (SPT-3G), [7] has 2690 pixels, each with 6 transition-edge sensor (TES) detectors [8], [9] measuring 2 linear polarizations in 3 bands, and will be deployed at the end of 2016.
In this paper, we describe the optimization of the TES detector arrays for SPT-3G.The TES critical temperature (Tc) distributions of wafers prepared by two different detector fabrication processes and two different TES film structures have been systematically investigated.The result shows that the TES performance becomes more controllable if the TES is prepared on an unetched surface with a thin Ti(5 nm)/Au(5 nm) buffer layer.The thermal link, a LSN(low-stress silicon nitride)/Nb/SiOx/Nb quadruple layer structure, is another critical component for the detector array.Two test wafers were fabricated to investigate the detailed thermal link properties as functions of the film structure and the leg dimensions.We found that the thermal conductance is approximately linearly dependent on the leg width-to-length ratio in our detector arrays, and the LSN contributes approximately 30% of the total thermal conductance of the whole leg.These results provide important information for improving the overall sensitivity of the detector array.
The paper is organized as follows: Section II gives an overview of the detector fabrication and characterization, Section III describes the TES performance with different substrate surfaces and film structures, and Section IV describes an investigation of the thermal link properties.

A. Design
The SPT-3G camera has 10 hexagonal detector arrays, each containing 269 pixels.Fig. 1(a) shows the details of a pixel.The millimeter-wavelength signal is received by a self-complementary, logperiodic, broadband, sinuous antenna.[10], [11] Three-pole, quasi-lumped-element filters [12]- [14] split the signal into three bands centered around 95, 150 and 220 GHz.Superconducting, 10 Ω, Nb, microstrip, transmission lines [15]  increase the heat capacity and stabilize the detector.[16] The thermal link of the TES detector is a set of four LSN legs that support the island.The leg length and width is designed to provide a detector saturation power (Psat) roughly 2.5 times the expected loading (Pload) from the sky, telescope, and cold optics.Detailed information about the island and the leg are shown in Fig. 1

B. Characterization
A digital, frequency-domain, multiplexing scheme [19] has been developed to read out groups of 64 detectors using a single pair of wires, [20] makeing it possible to quickly evaluate the performance of large numbers of detectors.
For this work, the detector performance was investigated using measurements of the resistance, (R), versus Psat for different bath (i.e., wafer or wafer holder) temperatures (Tb) as shown in Fig. 1(c).Psat(Tb) is indicated by the dashed lines in Fig. 1(c).Values of Psat(Tb) from Fig. 1(c) can be plotted, as in Fig. 1(d), and fitted to: [21]- [23] Psat= K(Tc n -Tb n ) (1) where the constant K = NkA/l, N is the number of legs, A is the leg cross section, l is the leg length, k is the thermal conductivity of the leg material, and, n is the index for thermal conductivity.The fit yields values of the parameters and the thermal conduction ratio G(Tc) = dPsat/dT = nKTc n-1 .Since the phonon noise equivalent power (NEP) [24] is directly related to G and Tc, it is important to keep Psat within a reasonable range.
Currently in SPT-3G project, the target Tc is 510 mK and the target Psat is 10.6 pW, 16.0 pW and 21.0 pW for 95 GHz, 150 GHz and 220 GHz bands, respectively.These values are equal to twice the expected optical loading during normal operation, assuming an overall optical efficiency of 85%.They may be varied depending on the measured optical efficiency.

III. TES PERFORMANCE
In some SPT-3G arrays, the TESs are fabricated on an etched SiOx surface, [17] while in others, the TESs are fabricated on an unetched surface.[18] The unetched surface gives much lower scatter in Tc, as shown in Figs.2(a) and (b).It is possible that residual by-products and increased roughness, due to etching SiOx during fabrication of the Nb microstrip, may cause the large scatter shown in Fig. 2(a).The TESs on etched SiOx have slightly higher Tc than those on unetched SiOx, due to the fact that the latter are prepared at a much earlier stage, so they encounter more fabrication processing.Heating during processing reduces the TES Tc, as shown i We have also investigated adding a Ti(5 nm)/Au(5 nm) buffer layer under the TES to isolate the TES from the substrate.The buffer layer results in lower Tc, and lower scatter in Tc, for both etched and unetched SiOx, as shown in Figs.2(c) and 2(d).In Figs.2(c) and 2(d) the combination of the buffer layer and thinner Ti (100 nm for Fig. 2(c) and 150 nm for Fig. 2(d)) gives Tc in the range 450 -510 mK, cf.550-600 mK for the thicker TESs without buffer layer in Figs.2(a) and 2(b).
The small scatter in Tc in Fig. 2(b) may be due to a smaller number of detectors for this measurement (~50 for Figs.2(a) and 2(b), cf.~150 for Figs.2(c) and 2(d)) or variations in the etch that releases the detector legs and islands from the Si wafer (releasing process).Releasing decreases Tc, probably due to heating of the TESs, and increases the scatter in Tc, as shown in Fig. 3. Fig. 3 also shows a larger variation in Tc with radius and band.Since these effects are only observed in released devices, they could be due to (i) excess, banddependent, optical loading in the measurement setup, or (ii) heating of the TESs during release (or during final oxygen plasma cleaning to remove photoresist), which may depend on band because detectors for different bands have different leg lengths with different thermal conductivities.

IV. PROPERTIES OF THE THERMAL LINK
We have fabricated two test wafers to investigate the effects of different film structures (Fig. 4(a-c)) and different leg widths and lengths (Fig. 4(d-f)), respectively.Fig. 4(a-c) shows results for detectors with (a) legs that have only LSN and Nb leads for reading out the TESs (black squares), (b) legs with LSN, the 500 nm SiOx dielectric for microstrip transmission line and Nb leads (blue dots), and (c) legs that have LSN and a complete microstrip transmission line (red triangles).K for detectors with only LSN and Nb leads is 3 times smaller than for the other configurations, and the microstrip Nb ground layer has little effect on K, as expected for a superconductor, so the thermal conductivity of the legs must be dominated by the SiOx layer, with the LSN contributing only ~30%.
Since the SiOx layer thickness is constrained by the filter design, and the LSN layer on the legs must be thick enough to support the island without breaking, changes to the leg thermal conductivity may require a different leg width or length.Fig. 4(d-f) shows measurements of detectors from a wafer on which ¼ of the detectors have 23% longer legs and ¼ have 26% narrower legs.A complete discussion of these results is outside the scope of this paper (more discussion about thermal link can be found in [25], [26]) and the origin of the scattering of K in our results is still under investigation.However, it is clear that K is approximately proportional to the ratio of leg width to leg length (W/L), as expected for long legs.The scaling of K with W/L also suggests that the islands and legs are fully released, i.e., the legs are the only thermal link between island and the substrate.A touch between island and the substrate would give a higher K for long and narrow legs than the observed results.
V. CONCLUSION In summary, we have shown that adding a thin Ti(5 nm)/Au(5 nm) buffer layer under a Ti/Au TES significantly decreases the scatter in transition temperature.We have demonstrated that the thermal conductivity of the legs that support the SPT-3G detector islands is dominated by the SiOx microstrip dielectric layer, and that the thermal conductivity scales as expected with leg width/length.These results will be used to optimize the performance of the TES detector arrays for the new SPT-3G camera.

Fig. 1 .
Fig. 1.(a) SEM image of a pixel.(b) Detail around the island.All TESs are with a dimension of 15 m 80m in this paper.The sketch shows the crosssection of a leg.The LSN layer was 1m before processing and it will be thinner in the final devices.(c) TES resistance as a function of the Ptot for different bands.(d) Psat as a function of the Bath Temperature Tb: measurements (points) and predicted trend (solid curves).

Fig. 2 .
Fig. 2. Tc distribution for TESs (a) on etched SiOx, (b) on unetched SiOx, (c) with Ti(5nm)/Au(5nm) buffer layer on etched SiOx, (d) with Ti(5nm)/Au(5nm) buffer layer on unetched SiOx.TES Tc change as a function of the baking temperature (TBake) is shown in the insert of (b).The average Tc and standard deviation (SD) are labeled in each figure.All TESs are covered by 20 nm Au in this paper.

Fig. 4 .
Fig. 4. Detector parameters for different leg film configurations (a-c), and different leg widths and lengths (d-f).For these measurements, Tb =300 mK.The detectors in (a-c) are dark (no load resistors on the islands).

Fig. 3 .
Fig. 3. TES Tc as a function of the distance from the wafer center for unreleased detectors (top panel) and released detectors (bottom panel, the detector legs and islands are released from the Si wafer).Every 4th row of pixelss on this wafer was left unreleased.