A New Soft-Switched High Step-Up Trans-Inverse DC/DC Converter Based on Built-In Transformer

This article proposes a new Zero-Voltage Switching (ZVS) high step-up DC/DC converter based on a built-in transformer for renewable energy applications. The proposed topology utilizes a Three-Winding Built-In Transformer (TWBT) to increase the voltage gain, but unlike most coupled-inductor-based DC-DC converters, high output voltages can be obtained under a lower magnetic turns ratio. In this circuit, with the help of a regenerative active clamp circuit, the energy of the leakage inductor from the TWBT is absorbed and transferred to the output, therefore, the ZVS conditions at turn-on time are achieved for switches. The voltage stresses across the switches of the proposed topology are limited, and the diodes reverse-recovery issue are eliminated. Due to the low input current ripple, the suggested topology can be used for renewable energy sources. Furthermore, because of the low number of components along with the soft-switching operation, the proposed circuit can offer enough high efficiency. The operational principle, steady-state analysis, and characteristics of the proposed converter are provided. Finally, a 200 W prototype with 25 V input and 400 V output voltage is built to validate the analytical results.


I. INTRODUCTION
In recent years, for Renewable Energy Sources (RES) applications, there has been special attention to increasing efficiency and obtaining higher power density of high-voltage gain DC-DC converters [1]. These converters act as an interfacing circuit to boost the low input DC voltage(typically 20-40 V) to the demanded regulated high output DC voltage (380-400 V DC ) for providing acceptable ac utility voltage. High voltage gain DC-DC converters are also required for various applications like robotics, UPS, automobile HID lamps, data center, satellite, appliances, medical devices, motor drive, and server power supplies [1], [2]. High-voltage gain ratio and continuous input current are the primary critical requirements for RES applications [1], [3]. For low-power applications, the non-isolated type of high step-up converters with the common ground between input and output with a low number of components and low cost are more desirable [4], [5].
In conventional current-fed step-up converters, such as boost and flyback, because of low conversion ratio, high switch voltage stress, and serious reverse recovery problems, improving the key indicators of such converters are necessary. So that, high voltage gains are obtained at acceptable efficiency without requiring ultra-high duty cycles. So far, many transformer-less DC-DC converters with the help of boosting techniques like voltage multipliers, switched capacitors, switched inductors, and cascading connections have been proposed to enhance the voltage gain [1]. However, the ultra-high voltage gains of these modified structures are often achieved by using more power stages and more components, with increased cost, complexity, and conduction losses [6].
To further improve the key indicators of the high step-up DC-DC converters such as voltage gain ratio, components count, and efficiency, many topologies based on the transformer (isolated or built-in) and Couple-Inductor (CI) have been developed [7], [8]. In these circuits, the magnetic devices along with other voltage-boosting methods are employed under different configurations of step-up topologies [9]. Here, the turns ratio of the transformer or CI helps to further increase the voltage gain ratio with fewer components. However, a considerable voltage spike on the main power switches under high turns ratio caused by the leakage inductance of the magnetic device is a serious issue with the use of CI or transformer, which can be limited using clamp circuits (active or passive) [5], [10]. Also, in high-voltage gain DC-DC converters, hard-switching performance and diode reverse recovery often have a negative effect on the conversion efficiency. To solve this problem, the operation of the circuit under soft-switching using Zero Voltage Switching (ZVS) or Zero Current Switching (ZCS) is highly recommended to improve the converter performance and power density [8], [11].
In the last two decades, many non-isolated high step-up DC-DC structures using CI (two or three winding) combined with other boosting methods (VM, SC, or SI) with proper performance have been presented. In [11], [12], [13], two-winding CI along with VMs are utilized to raise the voltage gain ratio. Despite an ultra-high voltage conversion ratio along with soft-switching performance, these converters suffer from a high input current ripple, which is accounted as the main disadvantage of the proposed converter. To solve the aforementioned problems, new types of high-voltage gain converters with continuous input current have been introduced [14], [15], [16], [17]. In these converters, the single power switch operates under turn-ON ZCS transition with low voltage stress. Besides, the leakage inductor energy of the CI is absorbed with help of a regenerative passive clamp circuit. However, in these converters, a wide range of voltage conversion ratios cannot be provided. Also, a new type of ultra high-gain DC-DC converter with low input current ripple using a three-winding coupled-inductor is suggested in [18]. Nevertheless, using many semiconductor components is the main disadvantage of this converter.
In [19], [20], [21], high step-up DC-DC converters with active clamp circuits have been presented to provide ZVS performance for the power switch. The active clamp circuit not only absorbs the leakage energy of the magnetic devices but also passes the leakage current from the anti-parallel diode (body diode) of the main power switch before the gate signal comes. However, due to the series connection of the CI and input DC source, high input current ripple is created in these circuits, which is the main demerit of the converters. Furthermore, two new types of high-gain converter with ZVS condition and low input current ripple are proposed in [22] and [23]. However, this converter cannot provide high voltage gain ratios.
A new design of high voltage gain DC-DC converters has been proposed with high voltage gain in the form of transinverse characteristic versus turns ratio of the CI [24]. In this topology, unlike other conventional CI-based converters, the voltage gain is increased by reducing the magnetic turns ratio, which leads to more efficiency improvement. Although the converter draws a continuous current from the input DC source, hard-switching performance and considerable reverse recovery problems are the disadvantages of this circuit. In [25], [26], [27], some single-switch CI-based structures of trans-inverse or partial trans-inverse of DC-DC converters with low input current ripple and ZCS performance have been presented to provide high output voltage for RESs. In these converters, a regenerative passive clamp circuit helps to recycle the leakage inductor energy. In addition, the leakage inductor eliminates the diodes reverse recovery problem of the converter diodes. A new modified Y-source step-up DC-DC converter with ZVS characteristics is also proposed [28]. In this topology, higher voltage gains are achieved by decreasing of turns ratios of the secondary and the tertiary sides of the CI.
Another effective way to improve the efficiency of the highstep-up converters is utilizing a built-in transformer (BIT). Due to the zero average value of the currents passed through windings of the BIT, the magnetic flux is balanced which increases the core saturation capability. Consequently, comparing the CI-based topology, it is feasible to build the BIT with a lower volume core. Also, the RMS values of the currents that pass through the winding of a built-in transformer are reduced than the CI, which alleviates its conduction losses [11]. In [29] and [30], two new step-up DC-DC converters using BIT and low input current ripple are introduced. These topologies operate under ZVS conditions with LRR. Moreover, in [31] and [32] two new type of BIT-based DC-DC converter are presented. However, these converters suffer from low voltage gain ratio and complex design procedure.
Based on the above discussions, a new high step-up DC/DC converter using a Three-Winding built-in transformer with continuous input current is presented. The main benefits of this proposed structure are categorized as follows: 1) The capability to provide an ultra-High voltage gain under a lower turns ratio (Trans-Inverse property); 2) Utilizing a TWBT with zero average current value; 3) Low component count (10 components); This article is organized as follows. The topology description and mathematical derivation of the suggested topology are provided and its soft-switching operation is analyzed in Sections II and III. In Section IV, the main key indicators of the introduced converter are compared with some counterparts. Converter design considerations are given in Section V. Then, experimental results from a laboratory prototype are shown in Section VI to verify the theoretical analysis. Finally, a brief conclusion are provided in Section VII.

II. THE PROPOSED CONVERTER STRUCTURE AND PERIODIC STEADY-STATE OPERATION
Schematic diagram of the proposed converter along with circuit variables is shown in Fig. 1. This converter is based on SEPIC and composed of a TWBT, an input inductor (L in ), two active switches including the main power switch (S a ), and an auxiliary switch (S b ), two diodes (D 1 , and D o ), and four capacitors (C 1 , C 2 , C 3 , and C o ). TWBT comprises an ideal transformer with turns of the primary, secondary, and tertiary windings N 1 , N 2 , and N 3 , a magnetizing inductance L m and a leakage inductance L k , which is merged to the primary side of the built-in transformer. Combining the tertiary side of the built-in transformer along with C 3 and D 1 in the form of a VM increases the voltage gain ratio of the converter by setting the turns ratio. According to Fig. 1, the voltage stress across the power switch S a is limited by a regenerative active clamp circuit, consisting of C 2 and S b . In this state, the recovered energy of the leakage inductance L k , which is stored in C 2 , is transferred to the output with the help of a VM circuit. In this circuit, the leakage inductances of the TWBI help to eliminate the reverse recovery issue for the diodes D 1 and D o . To simplify the circuit steady-state analysis, the following assumptions are considered during one switching period.
1) All switching components are regarded as ideal.
2) All capacitors are large enough. Thus, their voltage is constant without any ripple.
3) The TWBT is modeled as an ideal transformer with a magnetizing inductor (L M ) and a merged leakage inductor (L k ) referred to the primary side.  At t = t 0 , the switch S b turns off; while S a has not yet received the power-on command. In this state, the leakage inductance of the TWBT begins to resonate with the switch output capacitances C rSa and C rSb . Therefore, C rSb is charged while C rSa is discharged by the difference between i Lin and i N2 .

Mode 2 [t 1 -t 2 ]:
The difference current between the input inductor and the secondary side of the TWBT (i Lin and i N2 ) flows through the antiparallel diode (body diode) of switch S a ( Fig. 3(b)). To achieve the soft-switching ZVS, the power switch S a should be turned on while its antiparallel diode conducts. In this condition, the turn-on loss of S a is greatly reduced. In this mode, the input DC voltage is applied to the input inductor L in and TWBT, thus i Lin and i Lk start to increase linearly.

Mode 3 [t 2 -t 3 ]:
At the beginning of the third time interval, the power switch S a starts to conduct under turn-ON ZVS condition. As it is shown in Fig. 3(c), the output diode D o is conducting, while D 1 is reverse-biased in this time duration.

FIGURE 3. Operation modes of the proposed converter. (a) Mode-1(t 0 -t 1 ), (b) mode-2 (t 1 -t 2 ), (c) mode-3 (t 2 -t 3 ), (d) mode-4 (t 3 -t 4 ), (e) mode-5 (t 4 -t 5 ), (f) mode-6 (t 5 -t 6 ), (g) mode-7 (t 6 -t 7 ), and (h) mode-8 (t 7 -t 8 ).
The leakage inductance of the TWBT decreases the di/dt in the main switch S a during this state. In this mode, the input inductor (L in ) receives energy from the input DC voltage. Thus, its current starts to increase at a positive slope. The series connection between the leakage inductance of the tertiary side of the TWBT and the output diode leads to i Do reaches to zero with a gentle slope without a reverse recovery problem at the end of this transient mode (t = t 3 ).

Mode 4 [t 3 -t 4 ]:
In the state, the power switch S a is still on, and the diode D 1 starts to turn on at ZCS condition. As shown in Fig. 3(d), the input inductor L in is magnetized by the input power supply V in ; therefore its current (i Lin ) increases linearly. Moreover, due to the positive voltage applied across the magnetizing inductor (L M ) from the capacitor C 1 , its current (i LM ) starts to increase under a positive slope. Moreover, the capacitor C 3 is charged by the tertiary side of the TWBI and the capacitor C 2 . In this mode, the following equations can be given: Here, K denotes the coupling coefficient of the TWBT, which is defined as: : S a is turned off at t = t 4 ; while S b has not yet received the power-on command. In this time interval, Diode D 1 is still on (Fig. 3(e)). The leakage inductance of the built-in transformer begins to resonate with the switch output capacitances C rSa and C rSb . Therefore, C rSb is discharged by I Lin as well as i N2 while C rSa is charged. At the end of this interval, output capacitance C rSa is charged to V C2 . Mode 6 [t 5 -t 6 ]: At t 5 , the antiparallel diode of the auxiliary switch S b is forced to conduct with the difference current between i Lin and i N2 (Fig. 3(f)). In this mode, the energy stored in the leakage inductance of the TWBT is absorbed by the clamp capacitor C 2 . To achieve ZVS, the auxiliary switch S b should be turned on when its antiparallel diode conducts. In this interval, the negative voltage is placed across L m, thus its current start to reduce. In this state, the voltage stress across the main switch S a is clamped. Mode 7 [t 6 -t 7 ]: At t 6 , the turn-on signal of the clamp switch S b comes, and this switch begins to conduct under ZVS conditions. In this transition interval, the diode D 1 is also conducting. In this mode, the capacitor C 1 is charged by the leakage inductance current of the built-in transformer.
Because of the series connection between the tertiary side of the TWBT and D 1 , the current of this diode (i D1 ) reaches zero with a low slope under the LRR conditions at the end of this mode.

Mode 8 [t 7 -t 8 ]:
In the mode, the auxiliary switch S b is still on, and the diode D o starts to turn on at ZVS condition, as it is shown in Fig. 3(h). During this interval, the output capacitor C o receives energy from the capacitor C 3 and the magnetizing inductor of the TWBT. Also, the capacitor C 1 receives energy from the primary side of the TWBT. Due to the negative voltage applied to the magnetizing inductor, its current starts to decrease at a negative slope. In this mode, the following equations can be given: A summary of soft-switching performance of the switching elements of the proposed topology is illustrated in Table 1.

III. STEADY-STATE ANALYSIS OF THE PROPOSED TOPOLOGY
For the sake of simple analysis, only operations Modes 4 and 8 are considered, since the time duration of these modes is larger than other intervals significantly.

A. VOLTAGE GAIN
The average value of the voltage of the capacitors C 1 and C 2 can be calculated by employing the voltage-second balance principle for the input and magnetizing inductors over one switching period as follows: Here, D is the duty cycle of the switch S a . Using (2), (11), and (12), the voltage of the capacitor C 3 is obtained as: Finally, by using the relations (7)-(9), and (11)-(13), the overall voltage gain of the suggested converter is calculated as: Fig. 4 shows the voltage gain of the suggested converter under various duty cycle and some coupling coefficient (n 21 = 0.7 and n 31 = 1.4). It is clear that the existence of the leakage inductance has no significant effect on the conversion ratio, so it can be neglected. Consequently, the ideal voltage gain of the proposed converter with K = 1 is obtained as:   In other words, the output voltage of the converter is more sensitive to n 21 than n 31 . Thus, in this converter, higher voltage gain can be achieved under fewer turns ratios of the TWBT, which helps to reduce the conduction power losses.
Moreover, Fig. 6 shows the voltage gain of the proposed topology as a function of the turns ratio n 21 for some values of n 31 at a constant duty cycle D = 0.55. From this figure, by increasing the turns ratio n 21 toward unity (n 21 →1) an ultra-high voltage gain can be achieved. In other words, unlike the most coupled-inductor-based DC-DC converters, the voltage gains of the proposed converter are increased under small turns ratios which can be considered as a unique merit of this topology.

B. VOLTAGE AND CURRENT STRESS ACROSS THE POWER DEVICES
According to Fig. 3 and using (15), the magnitudes of drainsource voltage stress (V ds ) on the switches S a and S b can be obtained as follows: Also, the maximum repetitive peak reverse voltage on the converter diodes D 1 and D o can be deduced as: Considering (15), the input average current of the presented converter is given as: Here I o denotes the output load current. In this circuit, with the help of the current average law for the converter capacitors, the average current values of the magnetic and leakage inductors of the TWBT are obtained as: Since the average current value of the magnetic inductor of the built-in transformer in the proposed converter is zero, the ac flux is balanced in the core which increases the saturation margin. The peak current of the diodes D 1 and D o can be estimated as follows: Besides, the peak value of the currents passing through the switches S a and S b can be given using (20) and (21) Here, D 2 is the conduction time duration of the body diode of the S b . Moreover, D 3 is the conduction time duration of the switch S b . The time durations D 3 and D 4 are obtained as: Fig. 7 shows the RMS current value of the main power switch S a along with the voltage gains as a function of the duty cycle at some turns ratios n 21 and n 31 . Considering that the power switch in high-gain converters bears the most current stress, therefore its analysis is a suitable method to determine the reasonable range of the duty cycle. From this figure, The best range to choose the duty cycle is in the middle range (0.35<D<0.7). Because in this range, high voltage gains are obtained under minimum current stress level.

C. POWER LOSS ANALYSIS
In this part, an analysis of the theoretical power dissipations for the components used in the suggested converter is provided.
Switch Loss: Every switch presents switching losses at on and off states along with conduction loss during their on-state. As the presented topology operates under ZVS performance for both switches S a and S b , only switch off-transitions involve losses. Therefore, the switches' power losses in the proposed circuit are given as: Here, t off represents the switch fall time.
Diode Loss: The power losses of diodes include conduction resistive dissipations, forward voltage drop, and reverse recovery losses. In the proposed circuit, all diodes are turned-off without reverse recovery problem. Consequently, the diodes power loss of the converter is calculated as: Here, V F and r D(on) are the forward voltage drop and the diode on-state resistance, respectively.
Capacitor Loss: due to the equivalent series resistance (r ESR ), the capacitors of the converter are expressed the conduction losses as: Where r Lin and r w1-3 denote the series winding resistances of the input inductor and TWBT, respectively.
The core power losses of the magnetic components of the proposed converter, including the input inductor and TWBT, are calculated by the help of Steinmetz's equation as follows: Here, α, β, and K c are constant and are dependent on the core material. Also, V c is volume of core, ρ c is mass density of core material. Moreover, the flux density in (40) can be calculated as: Using the efficiency of the converter, the non-ideal voltage gain ratio can be given as: The theoretical efficiency curve as a function of duty cycle under several values of turns ratios n 21 is provided in Fig. 8. The main parameters of the presented topology are V in = 25 V, R L = 800 , n 21 = 0.7, n 31 = 1.1, and f s = 50 kHz. In addition, the parasitic components of the circuit are r DS = 7.6 m , As can be seen, increasing the turns ratios of the TWBT leads to an increase in voltage gain and a decrease in the converter efficiency. However, the proposed converter with a high voltage gain and soft-switching performance, is able to provide high power-handling capacities.

D. SOFT-SWITCHING CONDITION
The efficiency of the suggested circuit is improved with ZVS performance for main and auxiliary switches (S a and S b ). During operating modes 1 and 2 of the proposed converter, the ZVS turn-ON of S a is achieved due to the fact that its antiparallel diode is ON before the gate pulse comes. To satisfy the ZVS turn-ON of S a , the available inductive energy should be high enough so that i in + i N2 will still remain negative after C ra is fully discharged during the resonant time of the mode-1; thus: By placing the values of i N2 in mode 1, and the voltage of the switches, the following equation is obtained.
Here, C r = C ra + C rb . From (44), the minimum value of the output load to achieve the ZVS condition can be given as:   to achieve the soft-switching ZVS for the main power switch S a is illustrated in Fig. 10.
Moreover, During operating mode-5, the leakage inductance of the built-in transformer begins to resonate with the switch output capacitances C rSa and C rSb . To satisfy the ZVS turn-ON of S b , the following condition should be provided: From (46): Regarding (47), the minimum value of the output load current to achieve the ZVS condition for auxiliary switch S b can be given as: The ZVS region of the auxiliary switch S b of the presented topology at n 21 = 0.7, n 31 = 1.1 and V in = 25V is decpicted in Fig. 11. Table 2 summarizes an analytical comparison of the main circuit features of the proposed converter with its previously published non-isolated counterparts with low components. Fig. 12 shows the line charts of the voltage gain comparison of the converters mentioned in Table 2 versus the   Table II. duty cycle under the same conditions n 21 = 0.7, n 31 = 1.4 (for three-winding CI-based converters), n = n 21 +n 31 = 2.1 (for two-winding CI-based converters). It can be seen that among these converters, the presented converter has a superior voltage gain ratio compared to other converters. It is worth mentioning that the converter in [24] is also able to provide high voltage gains at the range of 0.43 < D < 0.5. Nevertheless, the steep slope of voltage gain changes in this topology leads to its more complicated control.  Table 2.

IV. CIRCUIT PERFORMANCE COMPARISON AND EVALUATION
Further, the normalized voltage stresses across the main power switch of the converters in Table 2 are drawn in Fig. 13. Among the converters, the proposed topology has less switch voltage stress for all ranges of the duty cycle. Similarly, Fig. 14 depicts the normalized voltage across the output diode of the converters. From this plot, the output diode voltage stress is lower than the output voltage. The other converters that provide less voltage stress across the output diode, are inferior in their other features. The electrical characteristics of the converters are also presented in Table 2. Of course,   Table 2.
it is worth mentioning that different topologies have been tested in different conditions. In addition, the power density of the converters by considering the size of the capacitors and magnetic components are are provided and shown in Table 3 at V in = 25 V, V out = 400 V, P o = 200 W, D = 0.55, I in = 2A, and f s = 50 kHz. From this table, it can be stated that the proposed converter has a suitable and acceptable power density.
According to the above discussions, the suggested converter with low components count and soft-switching performance meets good performance for the renewable energy cases applications.

V. CONVERTER DESIGN CONSIDERATIONS
From Fig. 7, the best range to choose the duty cycle is in the middle range (0.35<D<0.7). Because in this range, high voltage gains can be obtained at the minimum current stress levels across the main power switch S a . After determining the appropriate range of the duty cycle, it is necessary to select the proper values of the turns ratios n 21 and n 31 . As mentioned before, n 21 has a more significant effect on increasing the voltage gain of the converter. However, according to Figs. 5 and 6, although the increase of n 21 leads to an increase in the voltage gain, it also leads to an exponential increase in the current stress. Consequently, choosing values very close to the unit is not recommended. It seems that choosing n 21 < 0.8 can be reasonable.
By considering an acceptable current ripple, the minimum value of the input inductor can be derived as: where I in represents the permitted input current ripple. The minimum value of magnetizing inductance (L m ) of the TWBT The core sizes of magnetic devices are typically determined by the product of window winding area cross-sectional area (A P ) factor [33]. This parameter is calculated as: Where, the meaning of symbols used in (51) are listed in Table 4. Then, the number of turns for input and magnetizing inductor can be determined as: Where, A L is inductance per turn that can be find in selected magnetic core datasheet.
According to the converter output power, capacitor voltage, the maximum tolerant voltage ripple ( V Co ), and converter switching frequency f s , the minimum value of the output capacitor C o can be obtained as: In addition, the proper values of the capacitors C 1 , C 2 , and C 3 are calculated as follows: where V C1,2,&3 denote the allowable voltage ripple. Also, during the operating mode 4, a resonant tank is created between the leakage inductor of the TWBT and the capacitor C 1 .
In order to avoid high frequency resonant oscillation between L k and C 1 , it is necessary the half of the resonant period be more than the duration time of mode-4.

VI. EXPERIMENTAL RESULTS
The theoretical analysis of the presented topology has been validated with a 200 W, 25 V input, and 400 V output sample prototype in the laboratory. The main components of the prototype are listed in Table 5. In this prototype, two photocouplers TLP350 are used for driving the state of the MOSFETs. Because of the low voltage rate on the converter switches S a and S b , two MOSFETs IPP076N15N5 with very low R DS(on) are utilized. To decrease the conduction power loss in the circuit, MKT capacitors are used for C 1 -C 3 . The experimental waveforms of the voltage and current of the components were obtained using a high-frequency current probe PA-667 and a differential voltage probe GDP-025. Current probe PA-667 has division coefficients of 500 m and 50 m and differential voltage probe GDP-025 has division coefficients of x20, x50 and x200.  Figs. 17 and 18(a). Continuous input current waveforms along with the leakage inductance current and the output voltage of the proposed converter at full load condition in steady-state, are given in Fig. 18(b). Because of the soft-switching performance and LRR conditions for all diodes of the converter, the output DC voltage is constant without voltage spikes and noises at the switching instants, which is the other benefits of the suggested topology. For different output power levels, the efficiency of the proposed converter is measured and illustrated in Fig. 19. Measured maximum  efficiency of the converter is about 95.8% at P o = 120 W for V in = 25 V and V o = 400 V. From this figure, increasing the output power leads to decreasing the converter efficiency with a light slope. Also, Fig. 20 shows a pie diagram of power loss breakdown at full load conditions. The experimental results of the dynamic response under a 50% disturbance in the output load by considering a simple closed-loop controller (PI) ( from R L1 = 800 to R L2 = 1200 in periodic form) are shown in Fig. 21. A photograph      of the experimental prototype of the presented converter is shown in Fig. 22.

VII. CONCLUSION
In this article, a new ZVS high voltage gain DC-DC converter with a low number of components has been proposed for renewable energy source applications. By implementing a three-winding built-in transformer with a voltage multiplier circuit, a flexible voltage gain with trans-inverse property is achieved. In such a case, high voltage gain can be obtained under a lower turns ratio of the transformer. The maximum voltage stress on the power MOSFET is considerably restricted by utilizing an active clamp circuit, which is also guaranteed the soft-switching (ZVS tuns-on) performance for the switches. High voltage gain, low components count, the soft-switching (ZVS) performance, continuous input current with low ripple, enough high efficiency, low voltage stress, and low reverse recovery are the main advantages of the proposed converter. The feasibility of the proposed converter design has been proved through a 25 V-400 V and 200 W laboratory prototype.