Design and Optimization of InAs Waveguide-Integrated Photodetectors on Silicon via Heteroepitaxial Integration for Mid-Infrared Silicon Photonics

—Waveguide-integrated photodetectors (PDs) play a crucial role in mid-infrared (MIR) silicon photonics, serving vital functions in sensing and communication applications. III-V semi-conductors are widely used in MIR PDs, and many state-of-the-art III-V PDs on Si still require complicated integration methods. Heteroepitaxial growth technology is a competitive approach for large-scale integration; however, buffers capable of simultaneously achieving heteroepitaxial growth and optical coupling are limited in the MIR region. In this paper, we report a waveguide-integrated InAs PD on Si, incorporating a GaAs/Ge buffer design based on interfacial misﬁt (IMF) technology. We optimize the geometric structure and calculate the optoelectronic properties at a wave-length of 3 µ m. For our simulated parameters, the optimal PD achieves a responsivity of 2.77 A/W and a detectivity of 4.68 × 10 9 cm · Hz 1/2 · W -1 at -1V. This work suggests a promising avenue to further develop high-detectivity and high-speed PDs for MIR silicon photonics.

high-performance computing, and data centers [1], [2].Recently, there has been strong demand for extending the wavelength of silicon photonics to the MIR region.The MIR spectrum, typically defined as being from 2 to 20 μm, involves the primary absorption bands on particular chemical molecules and groups, which will benefit bio-and chem-sensing and lab-on-chip technologies.On the other hand, silicon photonics operating in the MIR spectrum can support free-space and on-chip optical communication due to two atmospheric windows (3.5-5.5 μm and 8-14 μm) [3].Numerous MIR silicon photonics devices have been developed, such as Si-on-insulator (SOI) waveguide, Ge-on-Si waveguide, 4.8-μm quantum cascade laser, and MIR resonators [4].Recent advances in the detection of volatile organic compounds [5], label-free glucose sensing [6], and on-chip gas spectroscopy [7] have been demonstrated using MIR silicon photonics devices.
PD is an essential device for optical signal transmission.Compared with surface-illuminated and edge-coupled PDs, waveguide-integrated PDs exhibit a high waveguide-to-PD couple efficiency, which is important for planar integration in silicon photonics.Moreover, the waveguide-integrated PD can simultaneously achieve a high responsivity and response rate because the direction of the incident light is normal to the photo-generated carriers' transportation.Zn + implemented Si waveguide-integrated photodiodes could operate from 2.2 to 2.4 μm with a room temperature responsivity of 0.09 A/W [8].As a group-IV semiconductor alloy, GeSn provides a tunable bandgap to cover 2-4.6 μm through changing its Sn composition [9].Waveguide-integrated GeSn quantum-well PDs and modulators operated at 2 μm were developed on silicon via heteroepitaxial growth [10].Due to its narrow bandgap, black phosphorus MIR PDs can reach 4.03 μm and be easily transferred onto silicon [11].Moreover, a high cutoff frequency (>10 MHz) was achieved in black phosphorus PDs due to their high mobility and the short lifetime of carriers [12].
III-V compound semiconductors are widely used for MIR PDs with high responsivities and low noise.GaInAsSb waveguide PDs were integrated on a SOI wafer via die-to-wafer bonding, where a responsivity of 0.4 A/W was achieved at 2.3 μm [13].The 300 K bandgap of InAs is 0.32 eV [14].Thus, the InAs p-i-n surface-illuminated PD can cover 2-3.6 μm [15].Introducing Bi and Sb into InAs can further extend the operating wavelength of PDs to 11 μm [16].Heteroepitaxy is an effective way for low-cost and wafer-scale integration, which does not require a complicated bonding process.Recently, exciting progresses in heteroepitaxial growth have been demonstrated, such as a quantum dot laser on Si [17], a GaSb-based MIR laser on Si [18], and an InAs/InAsSb PD on Si [19].
Heteroepitaxial growth of high-quality InAs layers on silicon remains challenging.The lattice mismatch between InAs and silicon (11.6%) can lead to threading dislocations, and the structural difference (polar vs. nonpolar) between III-V compound semiconductors and silicon can result in anti-phase boundaries (APBs).To overcome these difficulties, buffer technologies are required.In this study, graded buffers, such as GaInAs and InAlAs, were demonstrated, where defects were confined in the buffers and a low defected top InAs layer was achieved.It should be noticed that a thick and complicated buffer may suppress the coupling efficiency from the waveguide to the InAs PDs.Intentionally forming an IMF array is a promising strategy for highly lattice mismatched growth.An IMF array consists of highly uniform 90°interfacial misfit dislocations [20].Generally, when growing III-V semiconductors on heterogeneous substrates, two types of misfit dislocations can form: 60°and 90°.Compared to 60°ones, 90°misfit dislocations can release twice the amount of the strain energy caused by lattice mismatch and make no contribution to the formation of threading dislocations [21].Therefore, a thin buffer is recently available for the growth of InAs on silicon.Surface-illuminated InAs and InSb PDs on silicon were demonstrated using IMF array-based growth techniques, where a 300 K responsivity of 0.57 A/W in the InAs PD [22] and an 80 K responsivity of 0.7 A/W in the InSb PD [23] were achieved, respectively.Recently, limited research on the integration of waveguide InAs PDs on Si using the buffer technology is reported.In the development of a waveguide PD based on the heteroepitaxial integration, it's essential to consider the optical transmission process, especially the evanescent coupling.Therefore, both the structures of the buffer and the device should be optimized simultaneously to obtain a high responsivity and bandwidth.
This paper presents a detailed design of the waveguideintegrated InAs PDs on silicon via heteroepitaxial growth.A GaAs/Ge buffer was designed to bridge the lattice mismatch between InAs and Si, while the Ge layer also functioned as a MIR waveguide.The incident light propagating in the Ge-on-Si waveguide evanescently coupled to the absorbing layer in the InAs waveguide PD.To achieve the superior optical and electrical properties, the influence of design parameters including buffer thickness, the geometry of the InAs PD, and the size of the taper were simulated using the finite difference time domain for light propagation analysis.Over 60% absorption efficiency and a high detectivity were achieved in the optimized design of the PD.This work provides guidelines for the integration of InAs or InAs/GaSb type II PDs on silicon via heteroepitaxial growth for MIR silicon photonics.

II. DEVICE STRUCTURAL DESIGN
To realize the heteroepitaxial integration of InAs PDs on Si, the design of buffer structures should simultaneously consider the suppression of defects due to lattice mismatch and the evanescent coupling process from the waveguide to the PD.Fig. 1(a) shows the epitaxial layer structure where InAs layers are grown on Si through a GaAs/Ge buffer.The buffer thickness will be discussed later.The lattice constants of the layers and their lattice mismatches with silicon are shown in Fig. 1(b).It is obvious that the abrupt change in the lattice constant occurs at the Ge/Si and InAs/GaAs interfaces.The growth of low-defected and relaxed Ge on Si is a mature process and commercial GeSi virtual substrate is available [24].Moreover, the virtual substrate can be used for the fabrication of a Ge-on-Si waveguide, which demonstrates a low loss up to 11.25 μm [25].For the growth of InAs on (100) Ge, there is a dual challenge of simultaneously suppressing the formation of APBs and creating an IMF array at the InAs/Ge interface.Inserting a GaAs buffer layer between InAs and Ge is an appropriate method due to the similar lattice constants of GaAs and Ge.To achieve an APB-free GaAs layer, both offcut GeSi substrates and the migration-enhanced epitaxy (MEE) growth mode should be employed simultaneously [26].The formation of IMF array during the heteroepitaxy of InAs on GaAs has been reported [27].According to previous research, factors such as growth temperature, pre-growth surface reconstruction, and the III/V ratio impact the formation of IMF array [28], [29], [30].Therefore, it is crucial to carefully control these growth parameters to successfully form IMF arrays.
Fig. 1(c) shows a schematic of the atomic arrangement at the InAs/GaAs interface with IMF array.The differences in the lattice constants between InAs and GaAs leads to the distortion in Ga-As bonds, which further result in the accumulation of strain energy [31].The As atom periodically skips one Ga atom and forms a bond with the next Ga atom to form a misfit dislocation, which can reduce the strain energy.Further microscopic analysis shows that the size of the lattice deformation around the misfit dislocation is smaller than 1 nm, while the separation between dislocations is 6 nm.The details of the growth of an InAs  layer on silicon are demonstrated elsewhere [32].Therefore, this proposed epitaxial structure is a feasible platform for the integration of the Ge waveguide and waveguide-integrated InAs PD on silicon.Based on this, analyzing the geometric structure, coupling condition, and their effects on performance of the waveguide PDs are highly valuable.
The schematic of the Ge waveguide and waveguide-coupled InAs PD is shown in Fig. 2(a), and the incident light is 3 μm in this work.A Ge taper is designed to assist the coupling between Ge-on-Si waveguide and Ge buffer.The InAs PIN PD is rectangle-shaped with a double-mesa structure.As shown in Fig. 2(b), the top mesa consists of a metal contact, p-type doped InAs, and unintentionally doped InAs, while the n-type doped InAs, GaAs, and Ge buffer are present in the bottom mesa.The detailed material parameters of different layers in the PD are listed in Table I.It should be noted that n-type doped InAs does not absorb 3-μm light due to the blue shift of the absorption edge in n-type InAs where the donor doping results in the rising of the Fermi level [33].Therefore, despite the presence of high-density dislocations at the InAs/GaAs interface, their influence of the optical absorption is not significant.
When operating the PD, the light transmitting in the Ge-on-Si waveguide is first coupled to the Ge buffer through a taper coupler.Next, it is coupled to the InAs PD via evanescent coupling and mainly absorbed in the i-InAs layer.The GaAs layer is located between the Ge and InAs layer and has the smallest refractive index.Therefore, the existence of GaAs may limit the coupling.The possibility of the evanescent coupling is initially analyzed using the equation below: where d is the penetration depth of the evanescent wave in a waveguide; λ is the wavelength of incident light which is 3 μm in this work; n 1 is the refractive index of the core; n 2 is the refractive index of the cladding region; and θ is the incident angle.Substituting the refractive index of Ge and GaAs, it is obvious that the minimum of d is 0.206 μm, even if the incident angle of 90°is assumed.

A. Waveguide and Taper
In this research, the optical properties of InAs waveguide PD are numerically investigated using finite-difference time domain (FDTD) method which is widely used in the design of waveguide device [34], [35].Prior to the design of PD, the geometry of the Ge waveguide was analyzed to ensure the single-mode transmission at 3 μm.As shown in Fig. 3(a), the fundamental transverse electric mode is observed where the width and height are 2000 nm and 450 nm, respectively.Fig. 3(b) illustrates an optical field transmit distribution in the Ge-on-Si waveguide.Most of the optical power is confined in the Ge core, while a part of the mode spreads to the Si substrate, which can be partially avoided by using SOI instead of the Si substrate.However, the development of the Ge-SOI platform is not mature due to the absorption of the SiO2 layer in the MIR region and the restricted growth temperature of the Ge layer [36].A GaAs-cladded Ge-on-Si waveguide is shown in the right side of the image, and no change in the optical power distribution is observed.As mentioned above, the optical coupling process in the proposed PD can be divided into two steps.In the first step, the incident light couples from the Ge waveguide to the bottom part of the PD (specifically, the Ge buffer layer).Then, the light couples into the intrinsic layer of the PD through the evanescent coupling.The coupling scheme for the first step uses an adiabatic taper, as shown in Fig. 2(a).According to previous research [37], [38], the optimized design of the taper can maximize the optical absorption.Fig. 4(a) and (d) show the top view optical power distribution of the PD with different widths of taper opening and top mesa, and the width of the bottom part is fixed at 60 μm.The absorption of the InAs layer is not considered.The transmittance (η), indicating that the total optical power can be covered by the top mesa, is calculated at distances of 25 μm (η 1 ) and 50 μm (η 2 ) from the taper, respectively.In Fig. 4(a) and (b), the width of the top mesa is equal to that of taper opening, and the width is 10 and 20 μm, respectively.For the 10 μm mesa width, the η 1 and η 2 is 77.21% and 57.79%, while the η 1 and η 2 is increased to 82.18% and 62.44% when the mesa width is expanded to 20 μm.The decreased η with the increased distance from the taper is due to the lateral diffusion of light.In Fig. 4(c), the η deceases when the width of the mesa remains and the opening of the taper increases to 20 μm, which can be attributed to the increased taper opening prompting the lateral diffusion of light.Therefore, the η can be improved through increasing the mesa width to 20 μm while the taper opening of 10 μm remains, as shown in Fig. 4(d), where the η 1 and η 2 is 98.71% and 89.46%.In addition to the higher transmittance, another advantage of this design is the simplification of the simulation.In this study, the 2D simulation is reasonable because of the neglected reflected light from the sidewall.As shown in Fig. 4(d), most of the optical power is distributed with the 20 μm width while the reflected optical power from the sidewall is nearly zero.

B. Ge and GaAs Graded Buffers
The evanescent coupling strongly depends on the structure of buffer layers.In this study, a Ge/GaAs buffer is used for the heteroepitaxial integration, where the Ge layer acts as both a buffer and a waveguide.Therefore, the thickness of the Ge layer simultaneously influences both the transmission mode in the Ge waveguide and the efficiency of evanescent coupling.Fig. 5(a) and (b) show the optical field transmit distribution at different Ge layer thicknesses.This distribution characterizes the process of optical transmission, which occurs from left to right.According to the color bar, the optical power within the Ge waveguide is reduced to 40% as the PD length is 100 μm.It demonstrates that the active layer has absorbed approximately 60% of the optical power.When the height of the waveguide varies, the light transmitted within it still maintains the TE 00 mode.Once the light couples into the PD, the optical field initially exhibits oscillatory distribution due to the resonant cavity formed by the difference in the effective refractive index of each layer of the PD.Due to the higher refractive index of the Ge buffer compared to the upper GaAs and lower Si layers, most of the light is confined in the Ge buffer.Theoretical analysis indicates that when the thickness of Ge is greater than one quarter of the wavelength (0.75 μm), the mode field of the TE 00 mode is almost completely distributed in the waveguide.However, the impact of an excessively thin Ge buffer on the material quality of the heteroepitaxial structure should be considered, because previous research indicates that most of dislocations distributes along the Ge/Si interface [39].
The PD length dependent absorption efficiency at different thicknesses of the Ge layer is shown in Fig. 5(c), where the light Authorized licensed use limited to the terms of the applicable license agreement with IEEE.Restrictions apply.
source locates in the Ge waveguide.It can be observed that when the Ge layer thickness is in the range of 0.35-0.5 μm, variations in thickness have a minimal impact on the absorption efficiency of the PD.A nearly 60% absorption efficiency can be achieved in the PD with a Ge layer thickness of 0.45 μm.This is consistent with the estimation of the optical power distribution mentioned previously.A significant decrease in efficiency can be observed when the thickness of the Ge layer is 0.55 μm.This is because most of the light is confined in the waveguide to suppress the evanescent coupling.However, it is worth noting that when the Ge layer is very thin (0.35 or 0.4 μm), the increase in absorption efficiency slows down, as the length of the PD increases.One possible explanation for this phenomenon is that the optical mode is not well confined in the Ge waveguide due to the low waveguide height.Thus, a part of the light power fails to couple into the PD.To verify this hypothesis, the influences of light source positions on the absorption efficiency is investigated as shown in the inset of Fig. 5(c).One light source locates in the Ge waveguide as discussed above, while the other one locates in the left side of the Ge buffer, specifically at position 0 μm on the xaxis in Fig. 5(a).In contrast to the light source in the waveguide, the lower thickness of the Ge layer results in a higher absorption efficiency.Obviously, the decreased absorption efficiency can be attributed to the first coupling step, which is the insertion loss of the taper.Given that the Ge layer determines the single-mode transmission condition and the evanescent coupling efficiency, optimizing its thickness can lead to unavoidable insertion loss due to substrate mode leakage in Ge-on-Si waveguides.
Fig. 6(a) and (b) illustrate the optical field transmit distribution of the PD at different GaAs thicknesses.As the GaAs thickness increases, more light is confined in the Ge.The relationship between absorption efficiency and the PD length at different GaAs thicknesses is shown in Fig. 6(c).The increased thickness of the GaAs layer results in a decrease in the absorption efficiency of the PD.It should be noted that the data from the 0.00 μm thick buffer is presented for comparison.As mentioned in Section II, the growth of a GaAs buffer is essential.Research on GaAs grown on GeSi substrates indicated that no reduction in minority carrier lifetime or increase in interface recombination velocity, even with a GaAs layer thickness of only 100 nm [40].PDs with a 100 nm GaAs buffer layer still achieve over 30% absorption efficiency, making the use of a 100 nm GaAs buffer layer suitable for practical experiments.Research on the impact of APBs on the optical coupling process is limited.APBs can be considered analogous to grain boundaries.Previous studies on polycrystalline silicon waveguides have shown that scattering at grain boundaries can cause the transmission mode to convert into higher-order modes or radiation modes [41].The proposed InAs waveguide PD, with its wide Ge/GaAs buffers, can operate under multimode conditions with minimal sidewall loss.Therefore, the impact of APBs on optical coupling can be neglected.

C. InAs Active Layer
The active layer of the PD consists of a p-type, an n-type and an intrinsic InAs (i-InAs) layer.The absorption efficiency mainly depends on the design of i-InAs layer.Fig. 7(a) and (b) show optical field transmit distribution at different thicknesses of the i-InAs layer, and no significant differences are observed.Due to the evanescent coupling, the optical absorption by InAs mainly occurs in the intrinsic region near GaAs, so increasing the thickness of the absorption layer will not significantly improve the PD's performance.The relationship between absorption efficiency and PD length for different thicknesses of the InAs layer is shown in Fig. 7(c).After the thickness reaches 1.0 μm, the influence on absorption efficiency saturates.
Due to the nature of narrow bandgap semiconductor, the absorption related to free carriers in highly doped InAs needs to be considered in this work.In this simulation, the effective refractive index and extinction coefficients of active layer materials at different doping concentrations were extracted from the previous research [42].The distribution of optical power absorption in the i-InAs layer is quantitatively analyzed and illustrated in Fig. 8(a) and (b).The length and height of the i-InAs layer is 100 μm and 1 μm, respectively, and the color intensity indicates the ratio of the absorbed power (P abs ) at each position between the light source power (P 0 ).Half of the incident light power is absorbed in the first 20 μm, and nearly 90% of the optical absorption occurs in the lower half of the i-InAs layer.Only in the front 10 μm part of the PD, the upper half of the PD exhibits optical power absorption.The non-uniformity of the optical absorption distribution mainly comes from the fact that the optical transmit direction in the PD waveguide is different  from the direction of evanescent coupling, which causes the uneven distribution of photo-generated carriers and affects the device's responsivity and normal operation.This aspect needs to be carefully considered when designing the absorption region of the PD for different applications.Introducing the concept of optical field control can address the issue of non-uniform optical distribution within the InAs active layer.By employing tapered lateral waveguides and designing a dual-sided illumination structure [43], [44], optical power can be gradually guided into the absorption layer, resulting in a more uniform distribution rather than being concentrated at the front end.For the designed InAs PD, this necessitates a larger area of the Ge waveguide bottom than the buffer and replacing the taper with a multi-mode interference (MMI) splitter to accommodate dual-sided optical input.In short, the absorption efficiency can reach 60% through the optimization of the PD design.

IV. ELECTRICAL PROPERTIES
The performance of InAs PD is significantly limited by the dark current, therefore, a thorough analysis of the dark current is conducted in this work.The carrier thermal diffusion effect significantly impacts the dark current under forward bias [45].The slow carrier diffusion in highly doped layers (n-InAs and p-InAs) can be neglected since the electrical simulation is conducted at DC and low frequency.When the PD operates at high reverse bias, the band structure of InAs distorts, resulting in significant band to band (BTB) dark current [46].Auger recombination and radiative recombination mechanisms are not prominent in narrow-bandgap PDs.Therefore, the main dark current mechanisms for the designed narrow-bandgap semiconductor-based PD at low reverse bias are surface leakage, Shockley-Read-Hall (SRH) recombination and trap-assisted tunneling (TAT) process [47], [48].The mechanism of surface leakage current is complicated, with various sources, such as surface state, dislocation and surface defects introduced during fabrication.In this work, surface leakage is considered as the surface recombination process which is described using a reduced-dimensional model of bulk SRH recombination [49].Therefore, the surface leakage current density (J surf ) can be expressed as [50]: where q is the electron charge, n i is the intrinsic carrier concentration, s 0 is the surface carrier recombination velocity, A is the top mesa area, d is the mesa depth and P is the mesa perimeter.
Considering that waveguide PDs typically operate at 300 K, the impact of temperature on the dark current of PD is ignored in this work.Additionally, the TAT field effect is described by Hurkx's modified model [51], and the SRH and TAT current density could be expressed by the equation below [52]: where Γ is the TAT enhancement factor, W d is the depletion width, and τ is the carrier lifetime.The influence of defects on minority carrier lifetime is significant in the heteroepitaxial integration of InAs on Si, even though an optimized growth strategy is employed.The carrier lifetime (τ ) can be expressed as [53], [54]: where v th is the carrier thermal velocity, σ t is the trap parameter related to trap capture cross-section.N t is the defect state density related to dislocation.Moreover, the presence of APBs will also reduce the minority carrier lifetime [55].Although quantitative studies on the impact of APBs on minority carrier lifetime are limited, and experimental results for the dislocation density are not yet available, the minority carrier lifetime can still be estimated based on previous research.V. L.  InAs at 300 K and calculated a carrier lifetime of 3.22 μs based on the Auger theory [56].For the heteroepitaxial growth of InAs on GaAs, the carrier life time was reported to be 3.18 μs at 77 K and 59 ns at 300 K [57], [58].J. L. Boland et al. reported a room temperature photoconductivity lifetime of 130 ps for InAs nanowires grown on a GaAs substrate [59].Therefore, carrier lifetimes of 0.5 ns, 5 ns, 50 ns, and 500 ns are used in this simulation.The influence of different carrier lifetimes on the dark current density (J dark ) of the designed InAs PD is illustrated in Fig. 9(a).With a minority carrier lifetime less than 50 ns, the dark current density of the device increases rapidly.
When the carrier life is 5 ns, the J dark is 0.48 A/cm 2 at -0.5 V.This result is comparable to the heteroepitaxially grown p-i-n InAs PD reported by S. Woo et al., where the J dark is 0.8 A/cm 2 at -0.5 V [60].
The responsivity and detectivity (D * ) can be further calculated based the obtained J dark .The photoresponsivity of the PD is expressed as where I photo is the photocurrent, and P in is the input power.The D * and noise equivalent power (NEP) are calculated using the following equations [61], [62]: where I dark is the dark current, k is the Boltzmann constant, and T = 300 K. R 0 is the shunt resistance, which is extracted using dI dark /dU bias at U bias = 0 V.The R 0 is thus obtained as 6112.5 Ω.A is the top mesa area of the designed PD.The D * at different power of incident light is shown in Fig. 9(b).The responsivity is suppressed under a high-power density of incident light due to the enhanced scattering process and recombination of the photo-generated charge carriers.Therefore, with the increased input power, the D * also decreases.Under the power of 25 μW, the responsivity of 2.77 A/W is obtained at -1 V bias, which is comparable to that of the commercial InAs photovoltaic PD [63].The corresponding D * and NEP are calculated to be 4.68×10 9 cm•Hz 1/2 •W -1 and 0.956 pW/Hz 1/2 , respectively.The D * of proposed waveguide InAs PD on Si is higher than the surface-illuminated InAs PD on Si where the D * is 6.1×10 8 cm•Hz 1/2 •W -1 at 3.5 μm [22].Compared to the MIR PD integrated on SOI waveguide through bonding process, the PD proposed in this work exhibits a higher NEP, while an GaInAsSb PD on SOI demonstrated a NEP of 0.54 pW/Hz 1/2 at 2.3 μm [13] and an InP-based type-II PDs on SOI demonstrated a NEP of 0.035 pW/Hz 1/2 at 2.35 μm [64].
In addition to the responsivity and the detectivity, the frequency response of the InAs waveguide PD is also investigated at 3 μm.One significant figure-of-merit of a high-speed PD is the 3-dB bandwidth (f 3dB ).For the proposed PD, f 3dB are generally limited by carrier diffusion time outside the depletion region, carrier transit time in the depletion region, and resistancecapacitance (RC) delay.In this study, carrier diffusion time can be ignored because negligible photocurrent is generated in the p-InAs and the n-InAs contact layers at 3 μm-wavelength due to the highly doping and the misfit dislocation network in the virtual substrate.Therefore, the f 3dB of the PD can be calculated using where f T is the carrier transit frequency and f RC is the RC frequency, respectively [65].The carrier transit frequency (f T ) is the minimum time of the carriers transiting the i-layer, which can be calculated by where v sat is the saturation hole drift velocity and d i is the thickness of the i-layer.Since the influence of defects on the saturation hole drift velocity can be neglected [66], the value of hole drift velocity used in this calculation is 5×10 4 m/s based on the results from bulk InAs [67].The RC bandwidth can be calculated using where R is the sum of the load resistance and the series resistance of PD, C is the junction capacitance, d i is the thickness of the intrinsic region, ε is the permittivity of InAs, and A is the bottom area of the intrinsic region.The load resistance is set as 50 Ω to achieve impedance matching in the radio frequency (RF) measurement [68].The research about the series resistance of InAs-based PD is limited and it is related to some extrinsic elements, such as contacts and wire bond.Chen et al. reported that the series resistance of an AlInAsSb nBn PD was around 2 Ω using a novel equivalent circuit model [69].Therefore, the R is 50 Ω in this work.The calculated bandwidths with different intrinsic region thicknesses and PD lengths are shown in Fig. 10(a) with a fixed intrinsic region width of 20 μm.The bandwidth decreases with increased PD length limited by the RC delay.Further increasing the intrinsic region thickness leads to a decreased bandwidth, because the main limited factor of the bandwidth is changed from the RC delay to the carrier concentration.Fig. 10(b) shows the frequencies characterizing PD's bandwidth at different intrinsic region thickness.The 3-dB bandwidth depends on the carrier transit frequency (f T ) and the RC bandwidth (f RC ).In the designed PD with an intrinsic region width of 20 μm, when the intrinsic region thickness is less than 1.3 μm, the RC delay becomes the primary limit of 3-dB bandwidth.If the intrinsic region thickness exceeds 1.3 μm, the carrier transit becomes the main limit.
As mentioned above, most of the incident light is absorbed near the InAs/GaAs interface.Therefore, the benefit of a thicker intrinsic region is not obvious.On the other hand, an excessively thin intrinsic region not only reduces the PD's bandwidth but also leads to the optical losses caused by the absorption of metal contacts.With a PD length of 10 μm and an intrinsic region thickness of 0.4 μm, the highest achievable bandwidth is 40.5 GHz.As the PD length increases, the peak of bandwidth shifts to the thicker intrinsic region.Considering most of the light is absorbed near the InAs/GaAs interface, reducing the intrinsic region thickness is a feasible approach to obtain a high bandwidth and appropriate responsivity simultaneously.
Fig. 11 shows the influence of different intrinsic region width and PD lengths on the bandwidth with a fixed intrinsic region thickness of 0.4 μm.The data from a PD with an intrinsic region thickness of 1 μm and a length of 10 μm is also shown for comparison.The intrinsic region width has almost no effect on the bandwidth for the PD with an intrinsic region thickness of 1 μm.For PDs with an intrinsic region thickness of 0.4 μm, increasing the intrinsic region width significantly reduces the bandwidth, primarily due to the RC delay.Reducing the intrinsic region width to below 5 μm results in a PD bandwidth exceeding 50 GHz.It should be noted that the PDs with narrow intrinsic regions own lower absorption rates due to the mode distributing outside the region and scattering losses.Therefore, careful design and fabrication flow are essential for developing the InAs waveguide-integrated PD operating at high frequency.Recent research about the MIR free-space communication has shown bandwidths below 1 GHz.Therefore, the InAs waveguide-integrated PDs exhibits the potential for application in high-capacity MIR communications [70].
Finally, possible fabrication process for the proposed InAs waveguide PD is discussed which can be simply divided into two stages: the growth of InAs and device fabrication.The growth process initiates with an offcut GeSi wafer and a solid-state molecular beam epitaxy (MBE) systems could be used for growth.An annealing process is first carried out on the GeSi wafer at 650°C for 20 minutes to form double atomic steps which can be confirmed using the reflection high-energy electron diffraction (RHEED) equipped with the MBE system [71].Then GaAs will be grown on Ge using MEE growth mode.During MEE mode, the As source and Ga source are alternately opened, with a few seconds of growth interruption between the activation of each source.The purpose of using this method is to ensure that As dimers can completely cover the double-atomic steps and that the growth mode is two-dimensional [72].These two steps will prevent the formation of APBs in GaAs due to single atomic steps on the Ge surface, resulting in a high-quality GaAs layer, which is important for the subsequent growth of InAs.An InAs is subsequently grown on GaAs, utilizing the previously mentioned IMF method.In the stage of device fabrication, the III-V layers within the region of waveguide could be etched using chlorine-based (Cl-based) inductively coupled plasma (ICP) etching, and the thickness of Ge layer could be reduced to the designed dimension through the design using fluorine-based (F-based) ICP etching.Subsequently, the Ge waveguide could be formed by laser lithography and Cl-based ICP etching.For the fabrication of InAs PD, the top mesa could be initially formed using lithography and Cl-based ICP etching, stopping at the n-InAs contact layer.In the formation of bottom mesa, the InAs and GaAs layers could be first formed using the same process, then the Ge layer could be etched to the Si substrate using F-based ICP.Finally, all Au/Ti contact pads could be formed using a standard lift-off process.In the fabrication of heteroepitaxial devices, the etching rates of different epitaxial layers may differ from those of the corresponding bulk materials.Therefore, it is necessary to design a systematic etching experiment to obtain optimized process parameters.To suppress the influences of surface defects on the electrical properties of the devices, passivation techniques, such as low-temperature deposition of SiO 2 or SiN x , should be considered [73].Finally, material characterization methods like TEM and XRD will help researchers to investigate the causes of discrepancies between experimental and simulation results.

V. CONCLUSION
In conclusion, we conducted a numerical investigation of a MIR InAs waveguide PD integrated on Si through heteroepitaxial integration.Utilizing IMF technology, we proposed a thin GaAs/Ge buffer to address the lattice mismatch between InAs and silicon, while simultaneously enabling optical coupling.The Ge layer in the buffer functioned as a Ge-on-Si waveguide, and the GaAs layer, with a thickness of less than 200 nm, enhanced the evanescent coupling efficiency from the waveguide to the detector.To optimize the device performance, we examined the thicknesses of the Ge and GaAs layers, the shapes of the taper, and the InAs intrinsic layer.The widths of the taper opening and the mesa were found to influence the coupling efficiency from the waveguide to the PD.The thickness of the Ge layer was optimized to be in the range of 0.4-0.45μm, as a thicker Ge layer led to low evanescent coupling efficiency, while a thinner Ge layer resulted in high insertion loss.Analysis of the InAs intrinsic layer revealed that most of the incident light was absorbed in the front and bottom parts of the PD.The optimized PD exhibited a responsivity of 2.77 A/W and a detectivity of 4.68×10 9 cm•Hz 1/2 •W -1 at 3 μm.Further refinement of this PD could entail implementing a barrier layer to diminish dark current, employing tapered lateral waveguides or a dual-sided illumination structure to enhance the uniformity of optical absorption in the InAs intrinsic layer.Additionally, exploring photodetectors based on InSb and InAsSb could help extend the operating wavelength.This research was expected to spur continued interest and developments in waveguide-integrated PDs via heteroepitaxial growth for MIR Si photonics.

Fig. 1 .
Fig. 1.(a) The proposed epitaxial structure for the integration of InAs waveguide PDs on Si.(b) Lattice mismatch corresponding to epitaxial layer.(c) Schematic of atomic arrangement at the InAs/GaAs interface with IMF array.

Fig. 3 .
Fig. 3. (a) Mode diagram of Ge-on-Si waveguide; (b) Side view of optical field transmit distribution of GeSi waveguide with/without a GaAs cladding.

Fig. 5 .
Fig. 5. (a) Optical field transmit distribution of PD with 450 nm thick Ge and TE 00 mode of corresponding waveguide; (b) Optical field transmit distribution of PD with 550 nm thick Ge and TE 00 mode of corresponding waveguide; (c) Absorption efficiency as a function of PD length at different thickness of Ge.Inset at the bottom right of (c) is the thickness of Ge dependent absorption efficiency at different light source position.

Fig. 6 .
Fig. 6.(a) Optical field transmit distribution of PD with 100 nm thick GaAs; (b) Optical field transmit distribution of PD with 200 nm thick GaAs; (c) Absorption efficiency as a function of PD length at different thickness of GaAs.

Fig. 7 .
Fig. 7. (a) Optical field transmit distribution of PD with 600 nm thick i-InAs; (b) Optical field transmit distribution of PD with 1000 nm thick i-InAs; (c) Absorption efficiency as a function of PD length at different thickness of i-InAs.

Fig. 8 .
Fig. 8. (a) Power absorption at each position in i-InAs; (b) Colormap surface of power absorption in i-InAs.

Fig. 9 .
Fig. 9. (a) The dark current density versus the reverse bias voltage under different carrier lifetimes in the proposed PD; (b) The D * versus the reverse bias under different power of incident light in the proposed PD.

Fig. 10 .
Fig. 10.(a) Calculated 3-dB bandwidth as a function of intrinsic region thickness at different length of PD with 20 µm intrinsic region width; (b) The frequencies characterizing PD's bandwidth at different intrinsic region thickness.

Fig. 11 .
Fig. 11.Calculated 3-dB bandwidth as a function of intrinsic region width at different length of PD with 1 and 0.4 µm intrinsic region thickness.

TABLE I MATERIAL
PARAMETERS OF THE EPITAXIAL STRUCTURE