Mitigation Technique for Cascaded H-Bridge Multilevel Inverters Based on Pulse Active Width Modulation

This article considers <inline-formula> <tex-math notation="LaTeX">${l}$ </tex-math></inline-formula>-level cascaded H-bridge (CHB) inverters and proposes a new modulation method based on pulse active width modulation (PAWM), capable to minimize all harmonics with order <inline-formula> <tex-math notation="LaTeX">$n< 2l+1$ </tex-math></inline-formula> and to satisfy the European harmonic standards for medium-voltage-level applications EN 50 160 and CIGRE WG 36-05. A mathematical theorem and its proof are presented, stating the features of the procedure, which is an improvement of the selective harmonic elimination (SHE) PAWM proposed by Buccella et al. After a detailed description of the method, simulation and experimental results have been included, showing its capability to reduce low-order harmonics.

In almost all applications, it is desirable to reduce the harmonic content from the outputs keeping total harmonic distortion (THD) within the imposed limits [7]. It is compulsory in grid-tied applications, because it can cause unacceptable disturbances to other equipment, adversely affecting overall operations; moreover, it reduces overall efficiency, produces heat, and increases the risk of failures [8]. Harmonic components cannot be completely eliminated from an electrical system, but, in the case of power converters, a proper modulation technique can significantly reduce their impact [3]. High switching frequency modulations reduce THD and offer high dynamics but at the cost of significant switching losses, thus reducing overall converter's efficiency. Low switching frequencies limit switching losses but at the cost of high harmonics content [9], [10], [11] and low dynamics. The latter could be a problem in some applications, but it is not an issue in large power drives or in power converters for the grid. Recently, power levels in the megawatt range are becoming common, and significant research efforts are devoted to the development of low-frequency modulation techniques [12], [13]. The paper [14] proposes an universal formulation of the selective harmonic elimination (SHE)-pulse width modulation (PWM) problem with half-wave symmetry and with the capability to find solutions without using predefined voltage waveforms, and [15] proposes an algebraic-numerical hybrid method capable to calculate the right switching angles in real time and without any requirement on the choice of the initial values. Other strategies provide harmonic cancelation through the use of magnetic coupling. For instance, [16] proposes a method for derivation of an optimal ripple injection strategy for multipulse rectifiers. The current THD was improved in comparison with the 12-pulse mode of operation, and the low-frequency line current harmonics were virtually eliminated. The paper [17] proposes a new modular multilevel converter (MMC) topology in which the fundamental and the second-order harmonic current ripple can be eliminated, as their induced magnetic fluxes are canceled in the coupled core. Power converter's density and efficiency can be significantly improved, since the capacitor size is much reduced. The paper [18] presents a large-power voltage source converter suitable for FACTS, which combines four three-level neutral point clamped inverters that share a common dc bus, by means of intermediate magnetic elements with low VA rating, capable to ensure an equal power sharing between the four inverters. Since they allow harmonic cancelation between inverter poles and eliminate any third harmonic created by the modulation, the output voltage waveform has high quality, and output filtering can be avoided. Using variable dc sources with pulse amplitude modulation (PAM), a higher number of harmonics will be deleted but at the cost of additional unknowns in mathematical formulation [19], [20]. The paper [21] proposes a middle-level SHE-PAM (ML-SHE-PAM) method that calculates the switching angles and synthesizes the reference voltage for the variable dc sources. The paper [22] proposes a new pulse active width modulation (PAWM) method and reports a mathematical proof demonstrating that all harmonics, except those of order n = 2kl ± 1 being k = 1, 2, . . ., disappear from the output voltage waveform of an l-level inverter. Further improvements of power quality can be obtained using selective harmonic mitigation (SHM) techniques, which scopes are to mitigate low-order harmonics while maintaining the same switching frequency [23].
To this purpose, this article proposes an SHM-PAWM algorithm, which improves the SHE-PAWM method proposed by Buccella et al. [22]. The new modulation works at fundamental switching frequency, minimizes all harmonics with order n < 2l + 1, and satisfies the European harmonic standards defined for medium-voltage-level applications. Section II describes the proposed SHM-PAWM. Section III includes some comparison among the proposed procedure and other methods. Section IV gives the experimental validation, while the conclusions are summarized in Section V.

II. PROPOSED SHM-PAWM
PAWM is a modulation at fundamental frequency applied to an l-level CHB inverter with s = ((l − 1)/2) H-bridges (see Fig. 1), in which both switching angles and a set of unequal dc voltage sources V dci , i = 1, . . . , s, are calculated, applying an interpolating criterion and not chosen as the unknowns of the problem [22].
The Fourier series expansion of output phase voltage v N , The amplitude of the harmonic (2k − 1) is where the values of α i , i = 1, 2, . . . , s, are the switching angles, and the values of V dci , i = 1, 2, . . . , s, are the dc voltage sources feeding the H-bridges. The PAWM assumes a sinusoidal waveform at fundamental frequency ( f = 50 Hz), called reference sinusoidal signal (RSS) the modulating signal. Then, as shown in Fig. 2, the V dci dc sources are assumed, such that the obtained staircase output phase voltage intersects the RSS in the midpoints between two consecutive switching angles. Therefore, their amplitudes are given by where ϑ = ((2s + 1)π)/(2(l + 1)), and V m is the peak value of the RSS shown in Fig. 2. The latter is assumed to be equal to 1 p.u. when the modulation index is m = 1.
While SHE-PAWM in [22] assumes the switching angles the SHM-PAWM proposed in this article assumes Fig . 3 shows the switching pulses for phase A within the period [0, 2π]. Since the modulation technique works at fundamental switching frequency, only one pulse in a period is generated. Switching pulses for phases B and C can be obtained by applying a ±(2/3)π phase shift.
It will be demonstrated that the choice of the switching angles and of the unequal voltage sources (3)-(5) and (7) guarantees that the harmonics of order n < 2l + 1 satisfy the European voltage harmonic standards for medium-voltagelevel applications [24], [25].
The behaviors of the ratios |(F n /F 1 )| are shown in Fig. 5, which include the limits l n of the European code requirements [24], [25], summarized in Table I.
It can be observed that, for n < 2l + 1, the quantities |(F n /F 1 )| satisfy the European harmonic standards for medium-voltage-level applications.

III. COMPARISON WITH OTHER METHODS
The percent THD factor THD% is defined as where F k and F 1 are the amplitudes of the kth and of the fundamental harmonics, respectively. The THD% of the output phase voltage obtained using the proposed method is compared with those obtained using the following fundamental switching frequency techniques: 1) SHM-PWM mitigating low-order harmonics in [13] and [26]; 2) SHE-PWM eliminating low-order harmonics in [13]; 3) SHM-PAM mitigating low-order harmonics, assuming dc voltage sources depending on modulation index in [20] and [23]; 4) ML-SHE-PAM eliminating all harmonics except those of order 2(l − 1)k ± 1, k = 1, 2, . . ., in [21]; 5) SHE-PAWM eliminating all harmonics except those of order 2lk ± 1, k = 1, 2, . . ., in [22]. Fig. 6(a) and (b) compares THD% results obtained by previously listed methods using three-phase seven-level or ninelevel CHB inverters, respectively. It is possible to observe that the proposed technique always returns lower THD% than the other methods. Only around m = 0.77, the SHE-PWM technique, applied to a seven-level inverter, returns lower THD%.
As shown in Fig. 7(a), with a single-phase l-level inverter, the proposed SHM-PAWM always returns lower THD than SHE-PAWM and ML-SHE-PAM. In three-phase configurations, THD% is fluctuating, due to the automatic cancelation of the third harmonic and its multiples, as shown in Fig. 7(b).
If (2l − 1) is not multiple of 3, using the SHM-PAWM, the first not mitigated harmonic is the (2l + 1)th if (2l + 1) is not multiple of 3, or the (2l + 3)th if (2l + 1) is multiple of 3. Instead, using the SHE-PAWM, the first not canceled harmonic is the (2l −1)th, for instance, using the SHM-PAWM and a 15-level inverter THD% = 4.16. The first not mitigated   Table II shows the THD% obtained with the proposed SHM-PAWM and SHE-PAWM in [22] for both a single-phase and a three-phase l-level CHB inverter, considering up to the 301th harmonic. Table III shows the first not mitigated harmonics in a single-phase, l-level, CHB inverter using the proposed procedure and the first not eliminated harmonics with the one in [22] and with the ML-SHE-PAM in [21]. The proposed method increases the order of the first mitigated harmonic, hence allowing the use of lighter and cheaper output filters. Using the proposed SHM-PAWM with a 25-level inverter and considering the first 49th harmonics, THD is zero. The behaviors of a five-level inverter with symmetrical load until t = 40 ms and asymmetrical load since t = 40 ms have been considered in two distinct situations. Case #1: unbalancing in phase "C"; Case #2: unbalancing in phase "B" and phase "C." Table IV resumes the values of the resistances and inductances in imbalanced loads. Fig. 8(a) shows voltage waveforms before and after a load step for  Fig. 8(b) and (c) shows current waveforms during the time interval [0, 80] ms in Case #1 and Case #2, respectively. PAWM algorithms eliminate or mitigate more low-order harmonics than SHE-PWM. Consequently, they allow a reduction of the size of the output filter, decreasing cost and weight, and increasing efficiency; moreover, using a high number of levels, the output filter can be avoided. High efficiency is already ensured, because the proposed modulation works at fundamental switching frequency and with fixed angles, which do not depend on the modulation index. Since the variable dc link voltages required by the PAM method are provided by dc/dc converters, the proposed technique can be used at almost no cost in photovoltaic energy systems, battery energy storage systems (BESSs), or uninterruptable power supply (UPS) applications, which use dc/dc converters regardless of the adopted modulation technique. In conventional modulations, instead, for instance, PWM, switching angles depend on modulation index. Therefore, the duty cycle depends on m, and consequently, also, the losses and the efficiency are the functions of m.
IV. EXPERIMENTAL RESULTS To further validate the proposed mitigation technique, an experimental setup, which can be configured as a singleas well as a three-phase CHB-MLC, was assembled using

H-bridge cells and a control board developed by DigiPower
Ltd. [27]. The test rig is shown in Fig. 9. In particular, Fig. 9(a) and (b) shows the whole converter consisting of 48 H-bridge cells as those shown in Fig. 9(c) and the control board shown in Fig. 9(d). The latter includes one Cyclone V and one MAX 10 field programmable gate array (FPGA). Modulation algorithms were written in very high speed integrated circuit hardware description language (VHDL) using Altera Quartus software [29] and then uploaded on the FPGA, which executes the modulation algorithm in real time and sends the command signals to each H-bridge through a bidirectional serial peripheral interface (SPI).
The system is highly complex and reconfigurable, and its features are used only in part in this application. Each H-bridge cell includes four STW75NF20 MOSFETs, rated 200 V, 75 A [27] and was supplied by a Lambda GEN600-2.6 programmable dc power supply, rated 1.5 kW. Table V shows the applied switching angles and the corresponding supply voltage values that were obtained choosing V m = 100 V.
In three-phase configurations, computed switching angles obtained for phase "A" were shifted (2π/3) and (4π/3) and applied to phases "B" and "C." R-L loads with R = 160 and L = 18.5 mH were used both in single-and three-phase configurations.
A harmonic spectrum and THD were measured using a YOKOGAWA WT 1800 power meter. Experimental results show harmonic analysis for single-and three-phase CHB inverters with five, seven, and nine levels. Fig. 10 compares, for the five-level single-phase CHB inverter, the harmonic analysis obtained by the proposed SHM-PAWM and the   [22]. Table VI summarizes the obtained absolute and weighted values with harmonics up to the 13th. Experiments were performed setting the scope at 50 V/div for the voltage and 1 A/div for the current. Fig. 11 and Table VII refer to a single-phase seven-level CHB inverter; Fig. 12 and Table VIII   refer to a single-phase nine-level CHB configuration. Notice that the proposed SHM-PAWM mitigates the first 2l − 1 harmonics, meeting power quality standards. The SHE-PAWM in [22], instead, deletes the first 2l − 3 harmonics, but not the (2l − 1)th harmonic, resulting higher overall distortion. For instance, using a five-level inverter, using the proposed algorithm, the first not mitigated harmonic is the 11th; instead, using the SHE-PAWM in [22], the first not deleted harmonic is the ninth; hence, the proposed method increases the order of the first mitigated harmonic and needs a lighter   and cheaper output filter. Table IX shows computed and measured THD%, considering harmonics up to the 49th. Good agreement between simulated and experimental results can be observed. For three-phase configurations, the SHM-PAWM allows a THD reduction with respect to the SHE-PAWM, for 7, 9, 13, 15, 19, 21, 25, . . . level inverters. Table X shows that, for the single-phase configuration, the proposed SHM-PAWM always returns lower THD rather than the SHE-PAWM in [22]. Figs. 13-15 refer to three-phase five-level, seven-level, and nine-level CHB inverters, respectively.
The experimental response of the seven-level CHB inverter with the same load is measured during a change of the modulation index from 0.65 to 0.95, and it is shown in Fig. 16,   where it can be observed that, similar to [22], the steady-state condition is reached after about 30 ms.
For single-phase configurations with l = 5, 7, 9, the measured THD% values obtained by SHM-PAWM and SHE-PAWM in [22] are shown in Table X. It can be observed that SHM-PAWM reduces THD.
Finally, experimental tests named Case #1, Case #2, and Case #3, with imbalances, were performed for a single-phase seven-level inverter, assuming the rated (designed) dc voltages equal to V dc1r = 164.9 V, V dc2r = 132.2 V, and V dc3r = 73.38 V, respectively. The results are shown in Table XI where the THD% is reported for each case: in Case #1, the THD% increases about 3.8%, in Case #2, about 14%, and in Case #3, about 30%.

V. CONCLUSION
In this article, a novel SHM-PAWM technique has been proposed for l-level cascaded H-bridge inverters. The method has been successfully implemented and experimentally validated using both single-phase and three-phase, five-, seven-, and nine-level inverters. The method reduces all harmonics of order n < 2l +1 and satisfies the European harmonic standards for medium-voltage-level applications.