Fractional-Order and Power-Law Shelving Filters: Analysis and Design Examples

Low-pass and high-pass non-integer order shelving filter designs, which are suitable for acoustic applications, are presented in this work. A first design is based on a standard fractional-order bilinear transfer function, while a second one is based on the transposition of the integer-order transfer function into its power-law counterpart. Both transfer functions are approximated using the Oustaloup approximation tool, while the implementation in the case of the power-law filters is performed through the employment of the concept of driving-point impedance synthesis. An attractive benefit is the extra degree of freedom, resulting from the variable order of both fractional-order and power-law filters, which allows improved design flexibility compared to the case of integer-order filters. From the implementation point of view, only one building block is required to realize both filter types, thanks to the employment of the Voltage Conveyor.


I. INTRODUCTION
The most important characteristic of shelving filters is that, instead of completely removing the out-of-band frequencies as low/high-pass filters perform, they attenuate them by a predefined factor. Shelving filters are very important building blocks for implementing home Hi-Fi equipment, car stereos, in mixers, etc. [1], [2]. Among the main categories of shelving filers are the following: a) low-pass or ''low-shelf'' filters, which boost or attenuate the low end of the frequency spectrum, and b) high-pass or ''high-shelf'' filters, which boost or attenuate the high end of the frequency spectrum [3]- [8]. Shelving filters have been employed in [9] in order to improve the listening The associate editor coordinating the review of this manuscript and approving it for publication was Venkata Rajesh Pamula . experience, based on the equal-loudness-level contours (ELLC) provided by the ISO226:2003 standard [10], where it was mentioned that the slope of the gradient in the transition between the two bands must be less than 20 dB/dec. The analysis of fractional-order filters is based on the fundamental relationship L 0 D α t f (t) = s α F(s), which describes the Laplace transform of the derivative, for zero initial conditions. The transition slope offered by a fractional filter, of order 0 < α < 1, is equal to 20 · α dB/dec, making it an attractive solution for fulfilling the aforementioned specifications [11]- [17]. An implementation of fractional-order shelving filters has been presented in [18], where the rational integer-order function, derived through the approximation of the fractional Laplacian operator, was implemented using Operational Transconductance Amplifiers (OTAs) as active elements in a multi-feedback filter configuration.
Although this scheme offers electronic tunability and versatility, as both low-pass and high-pass filters are implementable by the same core, it suffers from the large active component count.
In the present work, two different methods are followed for the implementation of non-integer shelving filter functions. The first one is based on the substitution of the capacitors in the conventional (i.e., integer-order) shelving filter structures by fractional-order ones and their approximation by suitable RC networks. The second one is related to the implementation of power-law shelving filters and is based on the approximation of a transfer function formed as a ratio of a power-law impedance and an integer-order impedance. The overall power-law impedance is approximated and this is the main difference compared to fractional-order filters, where only the impedance of the corresponding fractional-order capacitor is approximated. This leads to the reduction of the circuit complexity in terms of passive component count. The performed comparison shows that the power-law shelving filter function is the most advantageous solution with regards to the spread of the values of passive elements, without losing the extra degree of freedom, which is offered by the variable order of the filter. Another important point is that the implementation of both filters is performed using only one active element, which is the Voltage Conveyor (VCII) [19]- [22].
The paper is organized as follows: the effect of the order on the frequency characteristics of both types of filters is studied in Section II, where the findings are supported by MAT-LAB results. The proposed fractional-order and power-law filters implementations are introduced in Section III, and the verification of their behavior is performed using the TSMC 0.18 µm CMOS process technology file in Section IV.

II. NON-INTEGER SHELVING FILTERS A. FRACTIONAL-ORDER SHELVING FILTERS
The transfer function of a fractional-order (0 < α < 1) shelving filter, is given by (1) where the shelving gain G is defined as G ≡ G L /G H , with G L and G H being the asymptotic low and high frequency gains, respectively [18]. In the case that G L > G H , the filter performs as low-pass filter, while for G L < G H it behaves as a high-pass filter. The time constant is τ 0 = 1/ω 0 , and the pole and zero frequencies are equally spaced (in logarithmic scale) around the characteristic frequency ω 0 according to (2) Therefore, the characteristic frequency will be the (geometric) mean of the pole and zero frequencies, i.e., ω 0 = √ ω P · ω Z , and it will be referred to as center frequency hereinafter.
Setting s α = ω α · cos( απ 2 ) + j sin( απ 2 ) in (1), the derived expressions for the magnitude and phase responses are The gain at the frequency ω 0 is equal to √ G L G H and is the (geometric) mean of the characteristic gains of the filter.
Considering (2), it is derived that the pole and zero locations are adjustable through the order of the filter. This is not the case for integer-order filters (α = 1), where √ G, and the position of the pole and zero is fixed through G and ω 0 . Owing to the fact that the pole and zero locations determine the location of the low (ω L ) and high (ω H ) cutoff frequencies (they are not the same in the case of fractional-order filters), the slope of the transition between the two bands can be adjusted through the order of the filter, assuming that the shelving gain (G) and the center frequency (ω 0 ) are predefined. The slope of the gain through the transition from the passband to the stopband is calculated through the following expression slope = 20 log(G) In order to have a better sense of the effect of the pole and zero location on the cutoff frequencies and, consequently, on the slope, let us consider the case of a filter with a given set of {ω 0 , G, G L(H ) } and with pole and zero frequencies far apart from each other. As a result, the low and high cutoff frequencies will be determined according to the following expressions [11] ω L,FO = ω P · 1 + cos 2 απ 2 − cos or, using (2) It is readily obtained from (7) that the cutoff frequencies are, also, symmetrically located (in logarithmic scale) around the center frequency ω 0 and they can be shifted through the change of the order. The slope is calculated as In the case of an integer-order filter, changing the slope is not possible, because the pole and zero frequencies are equal to the corresponding cutoff frequencies, i.e., ω L = ω P and ω H = ω Z and, consequently, (8), the well-known −20dB/dec slope of the integer-order filter is obtained.

B. POWER-LAW SHELVING FILTERS
An alternative transfer function, which describes a power-law shelving filter, is that given in (9) The location of the pole and zero is still described by (2), being the same as in the corresponding fractional-order filter [23]. Setting s = jω, the magnitude and phase responses are given by (10) and (11) The gain at the center frequency is still given by the formula √ G L G H . Under the same assumptions as in the case of a fractional-order filter, the low and high cutoff frequencies are Using (12), the expression of the slope is (13) and, consequently, the same derivations as in the case of fractional-order filters are valid. The only difference is the scaling factors, by which the zero and pole frequencies are multiplied. Resulting in different slopes of the transition between the passband and the stopband. To make this more evident, let us consider a power-law low-pass shelving filter with order α = 0.7 and {G L , G H } = {10, 1}. The obtained bode plots of the integer-order (black line), fractional-order (red line) and power-law (blue line) types of filters are demonstrated in Fig. 1, where this claim is confirmed.  It must be mentioned at this point that the accurate location of the cutoff frequencies must be calculated using (3) or (10). Let us consider the case of non-integer low-pass/high-pass filters with {G L , G H } equal to {10,1} (low-pass) or {1,10} (high-pass) and f 0 = 1 kHz. The corresponding gain and phase plots for orders α = {0.7, 0.8, 0.9}, in the case of a fractional-order filter, are depicted in Fig. 2, along with the corresponding plots of the integer-order filter. The most important performance characteristics are summarized in Table 1, while the corresponding ones of the power-law counterparts in Table 2.
From these results, it is concluded that the fractional-order filter shifts the cutoff frequencies of the filter further away from the center frequency, with regards to its power-law and integer-order counterparts. This reflects a less steep  transition from the passband to the stopband. The power-law filter offers an intermediate slope between the integer and fractional orders, due to the location of the cutoff frequencies, being between the corresponding ones of the integer-order and fractional-order filters.
Another important finding is that the equivalent order (α eq ) of a power-law filter offers the same cutoff frequencies with those of a fractional-order filter. The values of the power-law filters, which correspond to 0.7, 0.8, 0.9 fractional-order filters, are 0.393, 0.506 and 0.678, respectively. This is verified through the plots demonstrated in Fig. 3, where the obtained frequency characteristics are the same with those of the fractional-order filters of Table 1.

III. PROPOSED SHELVING FILTER IMPLEMENTATIONS A. IMPLEMENTATION OF FRACTIONAL-ORDER SHELVING FILTERS
Fractional-order shelving filters, described by (1), can be realized, using second-generation current conveyors (CCIIs) as active elements, by the topologies in Figs. 4-5. The topology in Fig. 4 corresponds to a low-pass and the one in Fig. 5 to a high-pass filter. Taking into account that the impedance of a fractional-order capacitor of order α and pseudo-capacitance C α is given by the formula Z (s) = 1/C α s α , the associated design equations are respectively  A problem, that occurs in the topologies of Figs. 4-5, is that they suffer from the effect of loading and, therefore, an extra output buffer is required in the case of cascade connection of filter stages.
A promising active element for avoiding such problems is the VCII, with its symbol depicted in Fig. 6. This element is constructed from a current follower, which establishes that i Y = i X , and from a voltage follower, which conveys the voltage at the terminal X into that at the terminal Z, establishing that υ X = υ Z . An enhanced low-frequency model of the VCII, with the associated parasitic resistors of each terminal included, is given in Fig. 7 (ideally, r Y , r Z → 0, and r X → ∞).
The proposed topologies of VCII-based shelving filters are demonstrated in Figs. [8][9]. Assuming that the VCII is ideal, then, by performing a routine analysis, it is easily verified that the design equations in (14)-(15) are also valid.    Considering the model in Fig. 7, the design equations become Therefore, the parasitics affect both the shelving gain, as well as the characteristic frequency of the filter.   The approximation of the fractional-order capacitors in Figs. 8-9 can be performed through the utilization of Foster or Cauer types of networks; for demonstration purposes, a Foster type-I network, whose configuration is given in Fig. 10, is used. Utilizing an n th -order approximation, the rational integer-order transfer function, that approaches the impedance of the capacitor C 1α , will have the form of with A i and B i (i = 0 . . . n) being positive and real coefficients. The required number of capacitors and resistors is equal to n and n + 4, respectively. The design equations of the Foster type-I network in Fig. 10 are summarized in (19) where r i , p i , k are the residues, poles and gain of (18) [24].

B. IMPLEMENTATION OF POWER-LAW SHELVING FILTERS
The implementation of the power-law shelving filters will be performed by the topologies in Figs. 11-12, where Z eq is considered as a driving-point impedance [25], given by (20)- (21), in the case of low-pass and high-pass filters, respectively.
The approximation of the impedances in Figs. 11-12 can be performed using the Oustaloup approximation [26], with the resulting rational polynomial transfer function having the form of (18) and, consequently, being implementable by the RC network in Fig. 10 using the design equations of (19). The required number of capacitors is the same as in the case of fractional-order filters, but the number of resistors is now reduced by three, becoming equal to n + 1.
Considering the effect of parasitic resistances of the VCII in both types of filters in Figs. 11-12, the derived transfer functions are modified to (22)-(23) with H PL (s) being the transfer function in (9). According to (9) and (22)-(23), the presence of parasitics affects only the gain of the realized transfer function.

A. FRACTIONAL-ORDER FILTERS
The performance of the proposed shelving filter topologies in Figs. 8-9 and 11-12 will be evaluated considering filter functions with {G L , G H } equal to {10,1} (low-pass) or {1,10} (high-pass) and center frequency f 0 = 1 kHz. Assuming that R 3 = 20 k , in the case of low-pass fractional-order filter functions, the values of R 1 , R 2 , calculated from (14) or ( Fig. 10 for approximating the fractional-order capacitor in Figs. 8-9. the Foster type-I network in Fig. 10, calculated using the expressions in (19) and rounded to the standard electronic component values conforming to the E96 series defined in IEC 60063, are summarized in Table 3.
MOS transistors provided by the TSMC 0.18 µm CMOS process are used in the simulations of the VCII topology shown in Fig. 13 [27]. Considering that V DD = −V SS = 0.9 V and I B1 = I B2 = 30 µA, the nMOS transistors' aspect ratio is chosen as 13.5 µm / 0.54 µm, while for the pMOS transistors as 40 µm / 0.54 µm. The bulk terminals of the pMOS transistors are connected to the source terminals of the relevant transistors, while the bulk terminals of the nMOS transistors are connected to the negative DC supply voltage. The parasitic resistances of Y, X, and Z terminal of VCII were calculated as 49.3 Ω, 16.33 M Ω and 52.76 Ω, respectively. It should be noted that the parasitic output resistance of the X terminal has been increased thanks to the cascode stage. The dimensions of the derived layout design of VCII, given in Fig. 13, are 40.78 µm × 37.55 µm, while the total power consumption is equal to 380.6 µW .
The obtained post-layout magnitude and phase responses of the fractional-order filters in the acoustic band (20 Hz − 20 kHz) are depicted in Fig. 14 (solid lines), along with the corresponding ones derived by the Oustaloup approximation of the transfer functions, marked by dashes. The most important characteristics of their frequency behavior are summarized in Table 4, where the values that correspond to the Oustaloup approximation are given between parentheses.
The sensitivity of the filter, with regards to the effects of MOS transistor mismatching and process parameters variations as well as of passive elements' values variations, has been evaluated through the utilization of the Monte-Carlo analysis tool offered by the Analog Design Environment for N = 100 runs. The obtained statistical plots of the gain and phase at the center frequency of a high-pass shelving filter with α = 0.8 are demonstrated in Figs. 15-16, where the values of the standard deviation were 0.133 dB and 0.085 • for the gain and phase, respectively. As the nominal values are 10 dB and −35.3 • , the derived results confirm that the topology has reasonable sensitivity characteristics.
The time-domain behavior of this filter is evaluated through its stimulation by a 10 mV , 1 kHz sinusoidal input signal and the obtained input and output waveforms are plotted in Fig. 17 confirming stability. The values of the gain and phase are 9.6 dB and −39.6 • , close to the theoretical values of 10 dB and −35.3 • , respectively.

B. POWER-LAW FILTERS
In order to achieve fair comparison, the same conditions employed for evaluating the performance of the  fractional-order filters will be used. Therefore, the implementation of power-law shelving filters with exactly the same characteristics as those of their fractional-order counterparts VOLUME 9, 2021    Fig. 10 for approximating the impedance Z eq in Figs. 11-12. is performed. As it was mentioned in Section II, the corresponding orders of the power-law filter for achieving the same cutoff frequencies are 0.393, 0.506 and 0.678, respectively. Using again the Oustaloup approximation, the values of passive elements, required for approximating the impedance Z eq ,  are given in Table 5, where it is evident that there is a significant reduction in the spread of the passive elements' values, compared to the corresponding values of the fractional-order type, given in Table 3 [28].
The obtained results showing the frequency behavior of the power-law filters, which are given in Fig. 18 and Table 6, confirm their performance in terms of accuracy.
The sensitivity of a high-pass shelving filter with α = 0.506 has been evaluated from the statistical plots in Figs    the gain and phase were 9.6 dB and 39.6 • , confirming also its accuracy in the time domain.

V. CONCLUSION
Two types of shelving filters, a conventional fractional-order one and a power-law one, both derived from an integer-order based function, were designed in this work. It was particularly shown that, for fulfilling the design specifications, the required order of the power-law filter is smaller than that of the corresponding fractional-order filter and this stems from the fact that the location of the cutoff frequencies is different for filters of the same order. Both filters are realized using appropriately configured RC networks intended to approximate the fractional-order capacitor, in the case of fractional-order filters, and the driving-point impedance, in the case of power-law filters. The design procedure is straightforward and the resulting structures are constructed from just one active element. This is not the case in the topologies presented in [18], where OTAs have been used as active elements and the increased circuit complexity and complicated design procedure were the price paid for the offered design flexibility and versatility. The realized filter functions have been obtained using a 5 th -order Oustaloup approximation and the provided post-layout simulation results of the designed acoustic filter functions verify the behavior of the presented structures in terms of accuracy and robustness. It must be mentioned at this point that the approximation of the power-law shelving filters can be also performed using curve-fitting-based tools, as in [23], [29], but in this work the Oustaloup approximation tool has been utilized in order to perform a fair comparison between the presented structures. The proposed concept can be also applied in the area of control systems, because shelving filters are the equivalents of the lead-lag compensators and this exploitation is a subject of ongoing research [30]- [33].

ACKNOWLEDGMENT
The publication of this article has been financed by the Research Committee of the University of Patras. also with the University of Calgary, AB, Canada; and also with the Nanoelectronics Integrated Systems Center (NISC) Research Center, Nile University, Cairo. He has authored or coauthored more than 350 publications in these areas (current H-index 45). His research interests include circuit theory, non-linear dynamics, chaos theory, and fractional-order circuits and systems with diverse applications ranging from the modeling of oscillatory networks and nonlinear behavior in electronic circuits and plasma physics to modeling of energy storage devices, bio-materials, and biological tissues. He has been a member of the IEEE Technical Committee on Nonlinear Circuits and Systems, since 2000. He was a recipient of the Egyptian Government First Class Medal for achievements in engineering sciences, in 2015, and the UAE President Award (Khalifa Award), in 2020. He is an International Observer in the European Cooperation in Science and Technology (COST) action on fractional-order system analysis synthesis and their importance for future design (CA15225) and an Expert with the United Nations Development Program (UNDP). He was on the Editorial Board of the IEEE JOURNAL ON  His main research interests include the design and applications of fractional-order circuits. VOLUME 9, 2021