Sensitivity of Lightly and Heavily Dopped Cylindrical Surrounding Double-Gate (CSDG) MOSFET to Process Variation

This research work analyzes the sensitivity of Cylindrical Surrounding Double-Gate (CSDG) MOSFET to process variation using the Poisson equation’s analytical solution. This work has been verified with the numerical simulation. Also, the results obtained have been compared with multi-gate device known as Cylindrical Surrounding Gate (CSG) MOSFETs. The lightly and heavily doped CSDG MOSFETs have been realized, and their immunity to parameter variation (channel length, Silicon thickness, and Random Dopant Fluctuations (RDFs)) have been compared to CSG MOSFET. This research work indicates that lightly doped CSDG MOSFET exhibits the slightest threshold variations than CSG MOSFETs. It confirms that the lightly doped CSDG MOSFET has better immunity to channel variation than CSG MOSFETs. This is due to its structure and inherent internal and external gate geometry, which offers greater control over the channel. However, for heavily doped CSG and CSDG MOSFETs, RDFs become a dominating factor, leading to more dispersion in the threshold variations. Therefore, the CSDG MOSFET’s immunity to channel variation becomes deteriorated due to the larger surface-to-volume ratio. At this point, the CSG MOSFET tends to offer better immunity to process variation. Hence, the sensitivity of threshold voltage to parameter variations depends entirely on the RDFs, as the heavily doped devices are aggressively scaled to the nanometer regime.


I. INTRODUCTION
The downscaling of MOSFET has benefited the microelectronic industries (manufacturing and applications) for the last three decades because the shrinking of transistors below 100 nm enables millions of transistors to be placed on a single chip [1][2][3][4]. At the miniaturized size, the multiple-gate devices such as SOI MOSFET, Double-Gate (DG) MOSFETs, Gate All Around (GAA) MOSFETs, Double FinFET (DFF) MOSFETs, and Cylindrical Surrounding Gate (CSG) MOSFETs are of better control than conventional bulk MOSFET devices because of their multi-gate structures [5][6][7][8]. The CSG MOSFET tends to offer a great current drive and better immunity to channel control than all other multi-gate structures except for Cylindrical Surrounding Double-Gate (CSDG) MOSFET, which has been proven to offer better control because of its dual-gate structure and large control area around the channel [9][10][11]. Although CSDG MOSFET is the promising alternative device for future scaling, its immunity to process variation is yet to be thoroughly examined.
Wang et al. [12] have concluded that RDFs process variation will severally affect the promising multi-gate device characteristics. It has already been proven that the CSG MOSFETs are more immune to process-induced variation and have less performance variation than the FinFET family and conventional MOSFETs [13]. There has been various ongoing research on CSDG MOSFETs. Gowthaman and Srivastava [14] have presented an analytical model of the lightly doped CSDG MOSFET for capacitive modeling using cylindrical coordinates. Rewari et al. [15] have developed a numerical model for electric potential, subthreshold current, and subthreshold swing for Junction-Less Double Surrounding Gate (JLDSG) MOSFET using the superposition method. The results have also been evaluated for different Silicon film thicknesses, oxide film thickness, and channel length.
Srivastava [16] has realized a nano-scaled CSDG MOSFET by means of a double-pole four-throw radiofrequency switch in terms of insertion loss, isolation, reverse isolation, and intermodulation. Hong et al. [17] have derived the complete general solution of nonlinear 1-D undoped Poisson's equation in Cartesian and cylindrical coordinates by employing a special variable transformation method. In this nanotechnology era (microchips), the replacement of diode with MOSFET improves the parameters of rectifier circuits in terms of switching speed, power consumption, bulky device size, and various heat or thermal losses. For this purpose, Maduagwu and Srivastava [18] have designed a bridge rectifier with the help of novel CSDG MOSFET.
To extend authors previous works, a systematic analysis has been carried out in this present research work to consider the impact of process variation on CSDG MOSFET. Here, the authors have analyzed the sensitivity of CSDG MOSFETs to process variation compared with CSG MOSFET using an analytical approach. The Parabolic Potential Approximation (PPA) model and the second-order differential solution have been used to assess the feasibility of CSDG MOSFET and CSG MOSFET devices [19][20][21][22]. This paper has been organized as follows. Section II presents the schematic of CSG MOSFET and CSDG MOSFET. Thereafter, analytical model of CSG and CSDG MOSFETs have been derived. Section III analyzes the threshold voltage based on the subthreshold current model and the channel potential. In Section IV, the sensitivity of the threshold voltage to process variation for CSG MOSFETs and CSDG MOSFETs have been performed. Finally, Section V concludes the work and recommends the future aspects.

II. ANALYTICAL MODEL OF CSG MOSFETS AND CSDG MOSFETS
A procedural derivation of the scaling length of multigates (DG and CSG) MOSFETs has been reviewed since the CSDG MOSFETs derivation is based on the same model. These are shown in Fig. 1.  Obviously, at the origin, r = 0, z = 0, an electric field (E) = 0 for both CSG and CSDG MOSFET. However, for CSG, the origin is center of the channel. The center of the CSDG MOSFET is Gaussian surface at r = t si /2 and E = 0.
The derivation of subthreshold current is dependent on the analytical potential solution. So, the potential solutions of both CSG MOSFET and CSDG MOSFET structure have been derived using a PPA model and a new modeling approach of the second-order differential solution to obtain the Poisson equation's solution of the device structures have been utilized.

A. POTENTIAL SOLUTION FOR THE CSG MOSFET GEOMETRY
Considering Fig. 1(a), at subthreshold regime, the potential distribution ψ(r,z) along the radius and z-axis satisfies the given Poisson equation as follows [22][23][24] where N a, ε si, and q are the doping concentration, permittivity of Silicon, and the electric charge, respectively. The potential distribution along the z-axis exhibits a parabolic profile as: where B o , B 1 , and B 2 are arbitrary constants that need to be obtained. The solution of the potential distribution has been obtained from Eq. (1) and Eq. (2) based on the boundary conditions from Fig. 1. Based on the radius variation, following conditions have been realized using the electrical potential and the electric field of the device structure: ➢ The Electric Potential in the device structure enables the derivation of B 0 along the z-axis.

Condition 1:
At the origin or source end of CSG MOSFET, the built-in potential can be given as: where K B , T, v bi , and n i are the Boltzmann's constant, thermal temperature, built-in potential, and intrinsic concentration, respectively. Condition 5: However, the electric field is continuous at the Silicon-oxide interface, which is in the Silicon substrate's middle. So, the total voltage drop in the device structure can be given as: where C ox , V GS , V FB , and ψ s are the gate oxide capacitance, external gate voltage, flat-band voltage due to work function differences, and surface potential. The gate oxide capacitance is given as: The remaining arbitrary constants along the z-axis can be determined by considering Eq. (6) of Condition 4 and Eq. (7) of Condition 5 to obtain the arbitrary constants, B 1 , B 2 in Eq (2) respectively, given as: Therefore, the channel potential of the CSG structure is given as: By substituting the arbitrary constant values into Eq. (10). The surface potential of CSG structure at r = t si /2 along the z-axis is given as: To obtain the total potential distribution in the device structure, the center potential must be known. Therefore, the center potential must be investigated. By substituting Eq. (11) into Eq. (1), a standard form of second-order differential equation is derived as: The general solution to the second-order differential equation (Eq. (12a)) is given as: The arbitrary constants, B 4 and B 5 , can be obtained by using the Eq. (3) of Condition 1 and Eq. (4) of Condition 2.
Since all the arbitrary constants had been derived, the potential distribution can be obtained.

B. POTENTIAL SOLUTION FOR THE CDSG MOSFET GEOMETRY
Similar to the derived CSG MOSFET, the potential distribution along the z-axis exhibits a parabolic profile w.r.t. the internal and external gate. It is written as: where m = 1 represents the internal potential with arbitrary constants (C 01 , C 11 , and C 21 ) and m = 2 illustrates the external potential with arbitrary constants (C 02 , C 12 , and C 22 ) for CSDG MOSFET. The arbitrary constants are obtained based on the boundary condition from Fig. 1(b). The electric potential and electric field of the device structure enable the derivation of the device structure.
➢ The Electric Potential in the device structure (CSDG MOSFET) enables the derivation of C 01 and C 02 along the z-axis Condition 6: At the origin of CDSG MOSFET, it's evident that the built-in potential is zero since there is a Silicon pile at the origin of the device structure, as shown in Fig. 1 Hence, there is no further mathematical analysis required for this condition.

Condition 7:
Considering the potential distribution around the silicon pile in CSDG MOSFET near the source as shown in Fig. 1b, the built-in potential can be written as: The potential distribution at any point along the z-axis w.r.t. the internal and external gate is obtained from Eq. (15) as follows: From this Eq. (18), it is evident that some of the arbitrary coefficients remain unchanged for both the internal and external potential. That is, C 11 (z) = C 12 (z), C 21 (z) = C 22 (z). Whereas C 01 (z) and C 02 (z) are dependent on the internal gate and external gate potential surface. Therefore, considering Eq. (15) w.r.t. surface potential of both internal and external gate, the arbitrary coefficients for C 01 (z) and C 02 (z) can be derived as: Internal Gate (radius 'a') ➢ The Electric Field in the device structure (CSDG MOSFET) enables the derivation of C 11 , C 12 , and C 21 , C 22 , along z axis Condition 8: Similar to CSG MOSFETs, differentiating Eq. (15) gives the electric field in the internal and external potential distribution of CSDG MOSFET. This is derived as follows: Internal electric field (radius 'a') From Eq. (18), it has been shown that C 11 (z) = C 12 (z), C 21 (z) = C 22 (z). With this, the remaining arbitrary coefficients are obtained from Eq. (20) as follows: By substituting Eq. (21) into Eq. (19), the arbitrary coefficients C 01 (z) and C 02 (z) will be obtained as: The relations between the internal and external gate potential can be derived as: Therefore, since all the variables had been obtained, the general potential profile along the radial path of the internal and external gate is obtained using potential distribution w.r.t. the internal gate: Hence, the internal potential has been obtained by substituting the arbitrary coefficients from Eq. (21) and Eq. (22a) into Eq. (24) given as: Similarly, the potential distribution w.r.t. the external gate is given as: The external potential distribution is obtained by substituting Eq. (21) and Eq. (22b) into Eq. (26) as: The variables used from Eq. (22) to Eq. (27) have been obtained as: To fully obtain the potential distribution in the CSDG device structure, the surface potential w.r.t. the internal and external gate must be known. Similar to CSG MOSFET, a standard form of the second-order differential is derived as: The variables of the differential equations are obtained based on Eq. (25) and Eq. (27) of the potential profile as: The terms used in Eq. (32) and Eq. (33) are given as: ( ) So, the general solution to the second-order differential equation represents the solution of the internal and external gates' potential distribution profile. This is obtained from Eq. (31) for both internal and external gates, respectively, as: The potential distribution of the CSDG device structure can be obtained with the help of the arbitrary constants. The further sections use these constants to realize the CSDG MOSFET.

III. DERIVATION OF THE SUBTHRESHOLD CURRENT OF CSG AND CSDG MOSFET
Since the potential distribution of the device structures has been obtained, their subthreshold current can be obtained using the verified model proposed by [26] as: Here Z depends on the potential distribution obtained from CSG MOSFET and CSDG MOSFET. Hence, it is expressed as follows: For CSG MOSFET structure, Z is estimated using the CSG MOSFET's channel potential derived as: For CSDG MOSFET structure, Z has been calculated with the derived channel potential as: The three-dimensional view of CSG and CSDG MOSFET structures used for device simulation are shown in Fig. 2. Their virtual fabrication is done with electronic device simulatior at 45 nm technology. The device Physics was used in modelling the devices at submicron technology using the parameters from Table 1. The characterization of the CSG and CSDG MOSFETs devices are done with electronic device simulator The MOSFET devices are calibrated for low power application in line with ITRS roadmap with nearly 1 nA/m off-current. The device parameters are represented in mesh format for better convergence.

IV. ANALYSIS OF CSG MOSFET'S AND CSDG MOSFET'S SENSITIVITY TO PROCESS VARIATION
This is the first attempt to analyze the sensitivity of CSDG MOSFET to process parameter variation. It was achieved by using a reasonable matured process such as lithography technique of ± 3σ (where σ stands for standard deviation) value, which is applicable for practical use of MOSFETs devices [27][28][29]. These deviations have similar effects on CSG MOSFET's and CSDG MOSFET's physical dimensions, such as the channel length and channel width, based on their geometry. Also, the threshold voltage variation is dependent on the dopant number fluctuation. With this, the estimated threshold voltage obtained from the subthreshold current model will determine the sensitivity to dopant fluctuation, assuming the number of dopants obeys the Poisson distribution. Therefore, the standard deviation is the average value of the dopant number (N a ). This process will aid the practical use of CSDG MOSFETs in the near future.
To compare the process variation of CSG MOSFETs and CSDG MOSFETs, the widths (W) must be equal to make a fair comparison. The total width of CSG MOSFET is W TOTAL = 2π(r) and that of CSDG MOSFET is W TOTAL = 2π(b-a) as shown in the Table I, here a point to note is that r = (b-a) for CSDG MOSFET.    The subthreshold current close form expression from Eq. (39) and Eq. (40) has been validated by comparing the analytical model with the numerical values. Using the drain current extraction method, the authors have estimated the threshold voltage based on the critical subthreshold current's value, which is dependent on the channel width and gate length of the device structure. The critical subthreshold current has been derived, as I DS_CRITICAL = 300 nm× (W TOTAL /L) [32,33]. The threshold voltage values for both heavy and light doped CSG and CSDG MOSFETs have been obtained based on draincurrent extraction. Silicon dioxide has been considered as the oxide thickness for a heavily doped device structure.
Meanwhile, Hafnium dioxide (HfO 2 ) has been taken as a dielectric constant for lightly doped device structure since a small equivalent oxide thickness is required. Hafnium dioxide has been proven to achieve a better electrical performance, thermal stability, high dielectric constant, and lower leakage current than Silicon dioxide [34][35][36][37][38][39][40][41][42]. From Since the width is the same for better comparison of both devices, Fig. 5, Fig. 6, and that CSDG MOSFET possesses a larger surface area than CSG MOSFET w.r.t. equal width. Therefore, for heavily dopped CSDG MOSFET devices, dopant number fluctuation becomes a significant factor to consider for its fabrication. Fig. 5 shows that the heavily dopped channel possesses more significant variation in threshold voltage than the lightly doped channel. The results are in good agreement with the numerical values. As shown in Fig. 6, the threshold voltage behaviours have been considered for both CSG and CSDG MOSFET for Silicon thickness variation. The CSDG MOSFET shows a smaller variation in the threshold voltage for lightly dopped channels than CSG MOSFET. This is attributed to its double-gate, which shows greater electrostatic control over the channel than CSG MOSFETs. For heavily dopped channel, the Silicon thickness variation effects are less significant.  The effect of channel variation on the threshold voltage is shown in Fig. 7. The variation in threshold voltage for the heavily doped channel between CSDG and CSG MOSFET is minimal and could be neglected. The reason has been that heavy channel doping reduces dependence on gate controllability. However, for lightly doped CSG MOSFET and CSDG MOSFETs, the variation in threshold voltage is smaller for CSDG MOSFET than CSG MOSFET because of the internal gate core of CSDG MOSFET. Fig. 8. shows the threshold voltage roll-off characteristics of CSG MOSFET and CSDG MOSFET for heavily dopped cannel. Both CSG MOSFET and CSDG MOSFET have the same roll-off characterization. This is because the heavily dopped channel reduces the device's dependence on the channel's   electrostatic control. In the lightly doped device structure shown in Fig. 9, it is evident that the threshold voltage rolloff for CSG MOSFET and CSDG MOSFET are approximately the same. However, the threshold roll-off of CSG MOSFET is slightly lower as the channel length is varied beyond 20 nm.
The overall threshold voltage variation due to source variations of CSG MOSFET and CSDG MOSFET can be determined by assuming that the variations sources such as the Random Dopant Fluctuation (RDF) variation, channel length variation (L), and channel thickness variation (t si ) are independent of each other. Hence, all the variation sources' summation will equal the overall threshold voltage variation (V th,Total ), which determines the device sensitivity: V th, Total = |V th, RDF | + |V th, L | + |V th, tsi |. Therefore, when considering the heavily doped channel, the variation of the threshold voltage w.r.t. channel length and channel thickness become less significant while the threshold voltage due to RDF (V th, RDF ) dominates the threshold voltage dispersion. Also, when considering the channel length (V th , L ), the ΔV th , RDF is insignificant whereas Vth, tsi becomes less significant and the overall threshold voltage dispersion is dominant by V th, L . Finally, for variation due to silicon thickness (V th , t si ), the V th, RDF is insignificant, whereas V th, L becomes less significant as shown in Fig. 10 and Fig. 11.

V. CONCLUSION AND FUTURE RECOMMENDATIONS
In this work, the analytical approach of the 2-D Poisson equation's solution has been used for the CSDG MOSFET, which have been verified with the device simulation, to analyse the sensitivity of their device structures to process variation. It has been realized that the lightly doped CSDG MOSFET has the smallest threshold voltage variation than CSG MOSFET at nanometre. So, as the MOSFET sizes are reduced, the lightly doped devices offer more immunity to process variation than the heavily doped devices. However, due to smaller threshold voltage value, lightly doped CSDG MOSFET has more immunity than CSG MOSFET. Also, CSDG MOSFET offers better immunity to channel thickness variation and channel length variation than CSG MOSFET because of its inherent internal core and external gate controllability. Since the CSG MOSFET is the promising device to succeed FinFET and other mitigates families, CSDG is the next-generation semiconductor device for CMOS technology because of its amazing features.
At long channel length, the heavy dopant effects on both CSG and CSDG MOSFETs are insignificant. However, the Random Dopant Fluctuation (RDF) determines the overall threshold voltage variation as the channel length reduces. This is because the larger surface area of CSDG MOSFET to volume ratio contributes to its larger threshold voltage variation than CSG MOSFET. Hence, RDF is an essential factor that must be considered at nanometre range when designing heavily doped CSDG MOSFET devices.
As of now the device modelling is ready, therefore, in near future, this device will be fabricated. In addition, material gate engineering of CSDG MOSFETs and various other parameters will be analysed.