Single-Switch High Step-Up Zeta Converter Based on Coat Circuit

By the negative influence of parasitic parameters from the components, the voltage step-up capacity of basic dc-dc converters is limited at extremely high duty cycle. Which makes the traditional dc-dc converters are difficult to be applied to renewable energy generation systems such as fuel cell and photovoltaic (PV) systems. In this study, a single-switch high step-up Zeta converter is proposed based on the basic Zeta converter and corresponding coat circuit. By using the coat circuit, the proposed converter not only can achieve higher voltage gain, but also acquire lower voltage stress on the semiconductor devices. Therefore, the devices with lower conduction resistances can be used to improve the efficiency. Furthermore, the coat circuit is composed of passive components, which does not change the continuous output current characteristic of the basic Zeta converter. And the proposed converter has only one active switch, the drive and control circuits are simple. The operation principle and the performance analysis of the proposed Zeta converter are described in detail, and a 300 W closed-loop experimental prototype has been developed for verification.


I. INTRODUCTION
With the exacerbation of a series of global problems such as the greenhouse effect and environmental pollution, the grid-connected generation systems of renewable energy such as PV and fuel cell systems have been rapidly developed and deployed [1]- [6]. Thus, the research interests in advanced dc-dc converters to obtain high voltage gain is everincreasing. The isolated dc-dc converters can easily obtain the capacity of high voltage step-up by changing the turn ratio of transformers [7], [8]. However, the use of transformers would increase the total cost and volume of the converters. And the isolated converters are preferred when electrical isolation is required. The voltage gain of the cascade converters is the product of the gain of each stage structure, and the ability of high voltage step-up can be easily achieved [9]- [11]. But the efficiency of the system would decrease with multistage energy transformation, and there are some problems in the stability of the multi-stage structures. The utilization of The associate editor coordinating the review of this manuscript and approving it for publication was Huai-Zhi Wang . coupled inductor is another widely used method to obtain high voltage gain in dc-dc converters [12], [13]. However, the leakage inductor would lead to high voltage stress of semiconductor devices. And some appropriate snubber circuits are needed to absorb the voltage spike caused by leakage inductor, which increases the complexity of the system. The high voltage gain converters with switched capacitor structures have some basic disadvantages such as complex driving circuit and many active switches [14]- [16]. In [17]- [19], some high voltage gain converters have been presented based on various voltage multipliers. By using the voltage multipliers, the voltage gain of these converters can be significantly increased and the voltage stress across switching devices would be effectively reduced.
Although each type of aforementioned converters has its advantages, most of them are derived from the conventional boost converter, which makes above converters can only achieve voltage step-up, without the capability of voltage step-down. Therefore, these converters are difficult to be applied in some applications with the requirement of a wide voltage gain for both step-up and step-down [20]- [22].
By introducing the voltage multipliers into the conventional buck-boost converter, the converter presented in [23] can obtain higher voltage gain and has the ability of voltage stepdown. And the voltage stress across active switch in this converter can be decreased. Similarly, a single-switch high voltage gain dc-dc Zeta-derived converter has been proposed in [24]. But the voltage gain is limited, which is only twice that of the basic buck-boost converters. In [25], a negative output high step-up buck-boost converter has been proposed. The converter can be derived a wider voltage gain than the classical buck-boost converter. And the control and drive circuits are consistent with the conventional buck-boost converter though the converter has two active switches. Analogously, A single-switch buck-boost converter with high voltage gain has been presented in [26]. In [27], a non-isolated singleswitch cascaded converter has been proposed. The converter can obtain a wider output voltage, and its voltage gain is the square of the classical buck-boost converter. However, the voltage stress across semiconductor components of the above three converters is correspondingly higher. Moreover, the aforementioned converters have the common drawback that the circuit structures are not easy to expand, which limits the capability of voltage step-up.
For further improving the voltage gain of classical buckboost converters, some expandable converters have been proposed in [28]- [30]. Compared to the classical buck-boost converter, the converter presented in [28] can improve the voltage gain with lower voltage stress on the devices by using the scalable voltage multipliers. A family of non-isolated dc-dc converters have been proposed in [29] based on the switched capacitor structures. By using different switchedcapacitor structures, the converters can achieve the capability of voltage step-up and step-down with a low duty cycle and have a low energy loss in the magnetic field. However, the efficiency of the converter will decrease, and the volume of the heatsink will increase when using many active switches. A family of coat circuits that are suitable for traditional dcdc converters is proposed in [30] to improve the voltage gain, where the Ćuk converter has been analysed in detail as an example.
In the present investigation, a Zeta converter with coat circuit is proposed and analysed in detail. The operation principle and performance analysis of the presented Zeta converter are described in the sections II and III of this study, respectively. The correctness of the mathematical analysis and the dynamic performance of the system are verified by a 300 W closed-loop experiment prototype in Section IV. And the concluding remarks are proposed in Section V.

II. OPERATION PRINCIPLE OF THE PROPOSED ZETA CONVERTER
The general structure of the proposed Zeta converter, which contains n basic cells, is shown in Fig. 1(a). According to the actual application requirements, the number of the basic cells of the presented converter can be appropriately adjusted. The topology of the presented Zeta converter with a single basic cell is illustrated Fig. 1(b). And the analysis of the operation principle in this study is adopted the topology shown in Fig. 1(b).
The results can be readily generalized to the configuration with more basic cells. To simplify the analysis process of the proposed converter, some assumptions are considered as follows: 1) The capacitances of all capacitors are supposed assumed to be large enough that the effects of voltage ripple across them are negligible. 2) All devices are assumed to be ideal, i.e. the influence of parasitic parameters is negligible. The proposed Zeta converter can be operated in the discontinuous conduction mode (DCM) and the continuous conduction mode (CCM) according to different load conditions [31]. When working in CCM, the converter has two switching modes over a single switching period T S , and the main operating waveforms are plotted in Fig. 2. The specific working modes are as follows: Stage 1[t 0 -t 1 ]: The equivalent circuit of stage 1 is presented in Fig. 3(a). In this stage, diodes D 1 and D 11 are turned off, and main switch S 1 is turned on. The voltage source constitutes three loops, which are: first, the voltage source charges the inductor L 1 through the main switch S 1 to form a loop, second, the source charges the inductor L 2 and capacitor C 2 to form a loop with the capacitor C 1 , and finally charges the inductor L 11 and capacitor C 12 through the capacitor C 1 and capacitor C 11 to form a loop and powers the load. In this interval, the inductor currents i L1 , i L2 , and i L11 all VOLUME 9, 2021 increase linearly, the capacitors C 1 and C 11 are discharged that the voltages across them are slightly decreased, and the capacitors C 2 and C 12 are charged that the voltages across them are slightly increased. Then the voltage equations of inductors L 1 , L 2 and L 11 in this stage can be expressed as: Fig. 3(b) illustrates the equivalent circuit of the stage 2. In this mode, diodes D 1 and D 11 are both turned on, and main switch S 1 is turned off. Inductor L 1 charges capacitor C 1 in part by diode D 1 and charges capacitor C 11 in part through diode D 1 and capacitor C 2 , inductors L 2 charges capacitor C 11 through diode D 11 , and capacitor C 2 supplies power to the load through diode D 11 , inductor L 11 , and capacitor C 12 . In this stage, the capacitors C 1 and C 11 are charged that the voltages across them are slightly increased, the capacitors C 2 and C 12 are discharged that the voltages across them are marginally decreased, and the inductor currents i L1 , i L2 , and i L11 all decrease linearly. The relevant voltage equations can be derived by (2). (2)

III. PERFORMANCE ANALYSIS A. VOLTAGE GAIN
Based on the above analysis of the operation principle, and applying the principle of voltage-second balance of inductors L 1 , L 2 , and L 11 , it can be derived from (1) and (2).
Rewriting (3) one obtains: Equation (4) gives the expression for the output voltage. Therefore, the voltage gain M can be calculated by: The single-cell proposed Zeta converter can be generalized to contain n basic cells, i.e.
Equation (7) states that the voltage gain M of the presented Zeta converter can be adjusted by changing the quantities of basic cells.
When considering the voltage drops and the equivalent resistances of the components, the output voltage of the proposed Zeta converter using n basic cells can be obtained (see (8)).
Where V D represents the voltage drop of diodes, R on is the main switch equivalent resistance, R is the load resistance, and R L1 , R L2 , R L11 , R L21 , . . . , R Ln1 are the equivalent resistances of the corresponding inductors.

B. STRESS ANALYSIS OF THE COMPONENTS
As presented in Fig. 2, the voltage stresses across the diodes D 1 , D 11 and the main switch S 1 are denoted as u D1 , u D11 , and u S1 , respectively. According to (4), u D1 , u D11 , and u S1 are: According to (6), the voltage stresses across the main switch and the diodes can be generalized to the case that contains n basic cells, i.e.
To simplify the analysis for the current stress, the ripple of the output current i 0 can also be ignored, and its average value is marked as I o . The inductors current ripples are ignored, and the currents i L1 , i L2 , and i L11 of the inductors L 1 , L 2 , and L 11 are denoted by I L1 , I L2 , and I L11 , respectively. The average currents i D1 and i D11 of the diodes D 1 and D 11 are denoted as I D1 and I D11 , respectively. According to the capacitor charge balance of C 1 , C 2 , C 11 , and C 12 , we have: Based on (11), the average current values of the inductors L 1 , L 2 and L 11 , and diodes D 11 , D 1 is obtained: Based on Fig. 3(a), the main switch current stress is written as: When the proposed converter is extended to the configuration with n basic cells, the average current values of the switches, the inductors, and the diodes can be calculated by (14).

C. DCM AND BOUNDARY CONDITION
As the load power decreases, the average currents of the inductors L 1 , L 2 , and L 11 decrease accordingly. However, the current ripple peak-to-peak values of the inductors do not change according to (1)-(4). Therefore, when the output current drops to a certain value, the analysis of the presented Zeta converter will enter DCM. When working in DCM, the proposed Zeta converter is divided into five stages in a single switching period. The analysis of the stage 2(t 1 -t 2 ) and stage 3(t 2 -t 3 ) in DCM is the same as that stage 1 and stage 2in CCM, respectively. And Fig. 4 and Fig. 5 show the main waveforms and the equivalent circuits in DCM, respectively. Fig. 5(a) shows the equivalent circuit of stage 1(t 0 -t 1 ). During this stage, the inductor L 1 starts to be charged and the inductors L 2 and L 11 are discharged in reverse after the main switch S 1 is turned on. In this interval, the capacitors C 1 and C 11 are charged, the capacitors C 2 and C 12 are discharged, and the diodes D 1 and D 11 are turned off. The process would finish when the currents i L1 and i L11 reach zero at the time t 1 which is plotted in Fig. 4. The equivalent circuit of stage 4(t 3t 4 ) is illustrated Fig. 5(b). During this period, the inductors L 2 and L 11 start to be charged in reverse after the currents i L1 VOLUME 9, 2021 and i L11 reach zero at the time of t 3 . At the time of t 4 , the currents between inductors L 1 , L 2 and L 11 reach a balance, and no more charging and discharging between the inductors. Therefore, the currents i L1 , i L2 , and i L11 remain a constant, and the analysis enters stage 5(t 4 -t 5 ) that the equivalent circuit is presented in Fig. 5(c). In this stage, the diodes D 1 and D 11 are turned off.
According to the voltage-second balance of the inductors L 1 , L 2 , and L 11 , one obtained: Based on (15), the expression for the voltage gain M DCM in the DCM operation is given as: In (16), the duty cycle D is a given known quantity, while D M is the unknown quantity. In order to derive the voltage gain of the proposed Zeta converter in DCM, some equations should be established to eliminate D M .
When diodes are working in the on-state, we have: Based on the capacitor charge balance of capacitors C 1 , C 11 , C 2 and C 12 , the average current values of the diodes D 1 and D 11 are calculated by: Next, the total average current I D of the diodes D 1 and D 11 are: The sum of the peak currents of diodes D 1 and D 11 is marked as i D−peak . According to Fig. 4, I D can be calculated as: The sum of peak currents of inductors L 1 , L 2 and L 11 is denoted as i L−peak . Based on (17), it can be derived that i D−peak is equal to i L−peak , and i D−peak can be written as: Based on (20) and (21), I D can be derived as: By using (16), (19), and (23), D M can be eliminated. The voltage gain M DCM thus can be derived and written as: Here, a dimensionless coefficient τ is defined as: Substitute (25) into (24), equation (24) can be rewritten as: When the proposed Zeta converter is extended to contain n basic cells, the generalized voltage gain of the presented converter working in DCM can be calculated as: where 5170 VOLUME 9, 2021   The voltage gain in CCM is identical with that in DCM, with the proposed Zeta converter operating in the boundary conduction mode. According to (5) and (26), the boundary coefficient τ B can be calculated as: The curve between boundary coefficient τ B and duty cycle of the proposed Zeta converter with one basic cell is illustrated in Fig. 7. When τ < τ B , the proposed Zeta converter operates in CCM. On the contrary, the proposed Zeta converter works in DCM if τ > τ B .
Similarly, the boundary coefficient τ B of the proposed Zeta converter contains n basic cells is expressed as:

D. COMPARISON
Based on some classical converters such as buck-boost, boost, and Zeta converters, some dc-dc converters with high voltage conversion ration have been proposed in [20]- [30]. The performance comparison between the proposed Zeta converter, some of these converters, and the traditional Zeta  converter is presented in Table 1. Fig. 8 illustrates the relationship between voltage gain and duty cycle for the proposed Zeta converter, the converters presented in [24], [27], the Zeta-derived converter proposed in [29], and traditional Zeta converter. Comparing with conventional Zeta converter, the proposed Zeta converter and the others have the advantages of lower voltage stress on the semiconductor devices and higher voltage gain. When the presented Zeta converter contains a single basic cell, the voltage gain is equal to that of the converter proposed in [24]. And the total number of devices used by the proposed converter is the same as that in [24]. Comparing with the proposed Zeta converter with two basic cells, the converter proposed in [27] can obtain a wider range of output voltage. However, in [27], the voltage stress across the devices is even higher. Furthermore, the converters presented in [24], [27] have a common disadvantage that their circuit structures are not expandable, and thus their voltage gains are difficult to be extended. Compared to the converters in [29], the presented Zeta converter can achieve higher voltage gain when using the same number of expandable cells. Moreover, the proposed Zeta converter uses only a single active switch and the voltage stress on devices is lower compared to the converters in [29]. This means the overall loss as well as the volume of the heatsink can be reduced for the presented converter.

E. SYSTEM MODEL AND CONTROL STRATEGY
As presented in Fig. 9, according to the circuit averaging method described in [32], the averaged switching model that VOLUME 9, 2021 contains two basic cells is derived to obtain the dynamic characteristics of the proposed Zeta converter. The symbol (^) in (31) and (32) represents small perturbation of the parameters in the model. In Fig. 9, T p represents the primary winding of the transformer, and T S1 , T S2 , and T S3 are the secondary windings of corresponding transformers (the transformer windings represent the dynamic ratio relationship between the active switch and the diodes in this model).
The block diagram of the double-loop control strategy based on current of inductor L 1 and output voltage is illustrated in Fig. 10. Compared to the control strategy of single voltage loop, the dual-loop control strategy with the output voltage and the inductor current has the advantages of excellent anti-noise effect, fast response speed and controllable input current, and it has been widely used for dc-dc converters.

IV. EXPERIMENTAL VERIFICATION
A closed-loop experimental prototype of the proposed Zeta converter that contains two basic cells was built to verify the correctness of the above analysis mentioned in the previous sections. Table 2 presents the experimental parameters of the prototype. And the recorded experimental waveforms are illustrated in Figs. 11-15.  The u gs , u in , u s1 and u o shown in Fig. 11 represent the waveforms of the driving voltage, the input voltage, the voltage stress across active switch, and the output voltage, respectively. When the duty cycle is about 74%, the output voltage is approximately 400 V, which is consistent with the analysis of (7).
The current waveforms for inductors L 1 , L 11 , L 2 , and L 21 are illustrated in Fig. 12, where the average current of inductor L 1 is near 6.25 A, while the average currents of inductors L 11 , L 2 and L 21 are all approximately 0.75 A, which complies with the theoretical calculation.     . 13 illustrates the voltage waveforms across diodes D 1 , D 11 , and D 21 , while the voltages u D1 , u D11 , and u D21 are all around 181 V that represent the voltage stress across diodes D 1 , D 11 and D 21 respectively. The voltage stress u S1 across active switch is also about 181 V. The above results of voltage stresses are the same as that obtained from (10).
The waveforms of voltages across the capacitors C 1 , C 11 , C 21 , C 2 , C 12 , and C 22 are shown in Fig. 14. As shown in Fig.  14(a), u C1 , u C2 , and u C11 are all approximately 133 V. In the Fig. 14(b), u C21 is about 133 V, u C12 is about 266 V, and u C22 is about 400 V. The above results of voltages across capacitors are also consistent with that obtained from (6).
Furthermore, Fig. 15 shows the waveforms of the dynamic performance testing of the prototype. Fig. 15(a) and Fig. 15(b) illustrate the experimental waveforms of the input voltage, output voltage and AC value of output voltage with the input voltage jumping from 48 V to 58 V and jumping from 58 V to 48 V, respectively. The results show that the change in power supply has a response process of approximately 9ms and the output voltage hardly changes with input voltage jumping. The experimental waveforms of the output voltage, output current, input voltage, and AC value of output voltage when the load resistor changes from 533 to 400 and changes from 400 to 533 are illustrated in Fig. 15(c) and Fig. 15(d), respectively. As presented in Fig. 15(c), the output voltage drops slightly with the increase of output power and the amplitude of the fluctuation is about 10 V. In about 4ms, it reaches the rated value. Fig.  15(d) shows that the output voltage rises slightly with the decrease of output power and the fluctuation amplitude is about 10 V. In about 4ms, it also can reach the steady state. The waveforms of dynamic testing show that the dynamic response is fast and the voltage overshoot is small based on the designed closed-loop control scheme.
The efficiency the proposed Zeta converter prototype is plotted in Fig. 16 as functions of the output voltage and the output power. Fig. 16(a) illustrates the efficiency of the prototype under different output voltage conditions with 48 V input voltage. The converter can obtain the maximum efficiency 94.3% when the output voltage is 240 V. As presented in Fig. 16(b), the efficiency curve under different output powers is obtained when the load resistor is changed. The maximum VOLUME 9, 2021 efficiency 94.2% of the converter can be reached when the output power is 240 W. Fig. 17 shows the calculated loss at rated power of the experimental prototype. The overall loss of the prototype   mainly consists of the loss of inductors, active switch and diodes, in which the loss of inductors is calculated about 7.13 W, the loss of active switch is calculated to be around 6.92 W and the loss of diodes is calculated approximately 3.38 W.
The relationship between the duty cycle (D) and the voltage gain (M ) is illustrated in Fig. 18, where the blue curve is the theoretical voltage gain and the red curve shows the measured voltage gain of the experimental prototype. Obviously, the actual voltage gain from the experiment is close to the theoretical voltage gain when D is lesser than 0.8. On the contrary, when D is greater than 0.8, the results from the prototype is greatly affected by parasitic parameters, and the actual voltage gain of the proposed Zeta converter deviates largely from the theoretical values.

V. CONCLUSION
In this study, a single-switch high step-up Zeta converter is proposed by incorporating the ''coat circuit'' into the basic Zeta converter. The experimental results for a 300 W prototype show that the maximum efficiency is about 94.2% with different load resistors. And the closed-loop system has been established to test the dynamic performance of the prototype. With the analysis and verification of the above sections, the proposed Zeta converter includes the following advantages: 1) Since the presented Zeta converter has only a single active switch, the driver and control circuit are uncomplicated to design and cost-effective to implement; 2) the number of basic cells can be adjusted based on the different applications; 3) the voltage gain of the proposed converter can be significantly improved compared to the traditional Zeta converter, which can avoid the extreme duty cycle. The characteristics thus show the proposed Zeta converter is suitable for the applications where a wide voltage conversion ratio is required. GUANGHUI LIU received bachelor's degree from China Three Gorges University, Hubei, China, in 2018, where he is currently pursuing the master's degree in electrical engineering. His research interest includes wide voltage conversion ratio dc-dc converter used in renewable energy generation systems.
YAO ZHANG was born in Hubei, China, in 1999. He is currently pursuing the bachelor's degree in electrical engineering and automation with China Three Gorges University. His research interest includes the application of dc-dc converter in renewable energy generation.
YU HUANG received the bachelor's degree from the Taiyuan University of Science and Technology, Shanxi, China, in 2018. He is currently pursuing the master's degree in electrical engineering with China Three Gorges University. His research interest includes wide voltage conversion ratio dc-dc converter used in photovoltaic power generation systems.
SHISHI HU received the bachelor's degree from Anhui Polytechnic University, Anhui, China, in 2018. He is currently pursuing the master's degree in electrical engineering with China Three Gorges University. His research interest includes high-step-up voltage conversion ratio dc-dc converter used in renewable energy generation systems.