Application Ranges of Fault-Tolerant Control for T-Type Three-Level Inverter Under Single/Multi-phase Open-Circuit Faults of Inner Switches

In recent years, T-type three-level inverter (TLI) has attracted attentions due to its advantages, such as simple structure and higher efficiency. Neutral point voltage (NPV) is very critical for its normal operation, and the necessary conditions of maintaining NPV balance respectively in a switching cycle and in a fundamental cycle are simply reviewed in this paper. With the increment of power switches, the reliability of T-type TLI becomes particularly important. When switch faults occur, fault-tolerant control strategies are usually adopted. However, in existing literatures, it is unknown whether the NPV balance can be still maintained under different fault types. Therefore, the application range of a fault-tolerant control is also unknown. In this paper, based on the necessary conditions of maintaining NPV balance, the application ranges of two representative fault-tolerant control strategies are revealed under different open-circuit (OC) fault types in inner switch. It found that the application ranges are closely related to the modulation index, load power factor (PF) and OC fault type. Finally, the correctness of the theoretical analysis is verified by the experimental results.


I. INTRODUCTION
Recently, the rapid development in renewable energy integration requires grid-connected inverters possessing high efficiency, low harmonic as well as small size [1]. And the range of the output ac voltage depends on the requirements of different types of applications. Additionally, the main design targets such as power factor (PF), total harmonic distortion (THD), and efficiency are also determined. Among these targets, efficiency is the most important factor. Three-level inverter (TLI), which exhibits outstanding performances with respect to THD and efficiency, has been used in various wide-power range applications [2]- [6].
Several TLI topologies have been proposed. In the diode neutral-point clamped (NPC) topology, four switches are The associate editor coordinating the review of this manuscript and approving it for publication was Zhiwei Gao . connected in series. Therefore, the collector-emitter voltage of switches can be reduced by half; however, when the output is connected to the bottom or top of DC-side capacitor, these inner switches must be turned on/off at the same time, which results in large conduction losses [4]. The other is T-type. Compared with the traditional two-level and NPC topology, T-type has the advantages of low switching losses and high cost-efficiency. In addition, in terms of fault-tolerance, T-type has a competitive advantage over other topologies, because the inner switches only affect the switching state [O], and the other two switching states [P and N] are unaffected [1], [7].
For multi-level inverter, the reliability is particularly important because of the increased power switches, which are relatively vulnerable and prone to failure [8,9]. Switch fault, such as IGBT, can be divided into open-circuit (OC) fault and short-circuit (SC) fault [10]- [13]. Any SC fault is usually catastrophic. It may be caused by high temperature, local VOLUME 8, 2020 This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/ thermal runaway, wrong gate drive signal, overvoltage, etc.
In the case of SC, the faulty device must be immediately isolated from the system. OC fault may occur due to the breakage of connecting wires in modules related to thermal cycling or vibration. It may be also caused by gate drive missing or solder joint fracture. Compared with SC fault, immediate shutdown of the system is usually not required under OC fault, but the system performance may be degraded [14]. For OC fault, there are many fault-tolerant control strategies [15]- [20]. However, these strategies proposed for NPC TLI [16] cannot be directly applied to T-type TLI. For T-type TLI, fault-tolerant control strategies were proposed in [17]- [24]. These strategies can be divided into two types. One is realized by adding redundant devices [17]- [19]. However, it is not cost-effective. The other is realized by changing the modulation algorithm [20]- [24], which is highly preferred. The key concern of the latter is to solve the neutral point voltage (NPV) fluctuation, which is critical for three-level operation [22], [23]. At present, the NPV fluctuation of T-type TLI in non-fault condition is mainly focused on, but in fault condition there are few literatures. In [22] and [23], by considering the neutral point (NP) current, proper zero sequence voltage (ZSV) was injected to suppress NPV oscillations for T-type TLI under OC fault. However, the application ranges of the corresponding fault-tolerant control strategies are not fully discussed. Therefore, it is difficult for readers to judge the applicability.
For T-type TLI, while an OC fault occurs in outer switch, fault-tolerant control can be applied to avoid current distortion only under reduced modulation index [23]. Besides, the adjustment of NPV is difficult, since there are no substitute voltage vectors. Therefore, fault-tolerant control based on improving modulation algorithm is very limited to handle OC fault in outer switch. But while OC fault occurs in inner switch, for the worst case, the T-type TLI can be degenerated into two-level inverter. This is the reason why fault-tolerant control is mainly focused on OC fault in inner switch. While OC fault occurs in inner switch, it results in not only output current and voltage distortion, but also NPV unbalance [22], [23].
In [23], two fault-tolerant control strategies were proposed to solve a single-phase inner switch OC fault considering NPV fluctuation. However, the effectiveness under two-phase or three-phase inner switch fault was not discussed. Moreover, in some conditions, it cannot guarantee NPV balance with injectable ZSV, which had been revealed in [25]. For three-phase T-type TLI, there are totally six inner switchers, and many fault types may exist. For a fault-tolerant control strategy, the application ranges should be pointed out under different fault types in which the NPV balance can be well maintained. However, in the existing literatures, it found that there is no report of the relevant studies about that at present.
In this paper, based on the point view of NPV balance, the application ranges of the two representative fault-tolerant control strategies proposed in [23] are revealed under different fault types, which can be used to determine whether the fault-tolerant method is able to deal with the specific fault under certain modulation index and load PF, which is the main contribution of this paper. Then, the applicability can be easily found by readers.
The rest of the paper is organized as follows. Section II reviews T-type TLI, and the necessary conditions of maintaining NPV balance in a switching cycle and in a fundamental cycle are respectively given. In Section III, the two fault-tolerant control strategies are simply reviewed, and a ZSV calculation algorithm is used to minimize NPV fluctuation. In Section IV, the application ranges of the two fault-tolerant control strategies under different fault types are revealed. The corresponding experimental results are given to verify the theoretical analysis in Section V. Finally, Section VI concludes the paper.

A. T-TYPE TLI AND ITS NPV CONTROL
The topology of T-type TLI is shown in Fig. 1. Each phase consists of four switches with anti-paralleled diodes, where S x1 and S x4 (x = A, B or C) are the outer switches respectively connecting to the positive bus (PB) and the negative bus (NB), and S x2 and S x3 are the inner switches connecting between NP and load. C 1 and C 2 are the DC-side capacitors. When the capacitor voltage reaches equilibrium, u C1 = u C2 = u dc , and the DC-link voltage is 2u dc . Taking NP as the reference point, when S x1 and S x2 are gated on, the output voltage is u C1 , remarked as 2 level; when S x2 and S x3 are gated on, the output voltage is 0, remarked as 1 level; when S x3 and S x4 are gated on, the output voltage is -u C2 , remarked as 0 level. The phase current flowing from the inverter to the load is defined as the positive direction.
To simplify the analysis, assuming u C1 = u C2 = 1, then the three-phase voltages can be expressed as: where, ωt ∈[0, 2π] is the phase angle of phase A and m ∈[0, 1.1547] is the modulation index. The three-phase 207600 VOLUME 8, 2020 currents can be expressed as: where I m is the peak value of the phase current and ϕ is the load PF angle.
Rearrange three-phase voltages for simplifying analysis: And the corresponding phase currents are redefined as i max , i min , i mid .
In order to effectively control NPV or achieve other control objectives, the ZSV u ZSV is usually injected into modulation voltage. After injecting u ZSV , the modulation voltage u x (x = max, mid, min) can be expressed as: To avoid over-modulation, the range of u ZSV is: The notation γ is used to indicate the range of u ZSV . Then, the duty ratio d x1 of 1 level of phase x can be expressed as: When 1 level is outputted by one phase, its phase current flows into or out from NP, which causes NPV variation. The NP current i NPx introduced by the phase x in a switching cycle is: Then, the average NP current i NP introduced by the three phases in a switching cycle is: (8) It can be seen from (8) that i NP is related to m, I m , ωt, ϕ and u ZSV , where m and ωt are determined by operating point, I m and ϕ are determined by load, and u ZSV is determined by modulation strategy. The NPV variation u NP caused by the NP current in a switching cycle can be expressed as: where C is the capacitance of C 1 and C 2 , and T s is the switching period. From (9), it can be seen that positive NP current will cause NPV decrease and negative value will cause it increase. To facilitate the analysis, i * x , i * NP and u * NP are used to represent the normalized phase current, NP current and NPV variation in a switching cycle respectively by assuming I m = 1.

B. THE NECESSARY CONDITION OF MAINTAINING NPV BALANCE IN A SWITCHING CYCLE
In [26], the necessary condition of maintaining NPV balance in a switching cycle is discussed. To achieve that, i * NP should equal to zero to make u * NP = 0 in a switching cycle. Under a certain condition of m, ωt and ϕ, i * NP can be only adjusted by u ZSV . Assuming i * NPmax and i * NPmin respectively denote the maximum and minimum NP current in a switching cycle. In γ , the relationship between i * NP and u ZSV is linear or piecewise linear. Thus, if i * NP min ≤ 0 ≤ i * NP max , there must be at least one u ZSV satisfying i * NP = 0; otherwise, NPV balance in a switching cycle is impossible.

C. THE NECESSARY CONDITION OF MAINTAINING NPV BALANCE IN A FUNDAMENTAL CYCLE
Generally, NPV balance in a switching cycle is usually not satisfied. Then, NPV balance in a fundamental cycle is at least required to ensure normal operation.
In a fundamental cycle, the NPV variation u NPf can be expressed as: where u * NPf = 2π 0 i * NP dωt is related to m, ϕ and u ZSV , which represents the NPV variation characteristic in a fundamental cycle.
To effectively control NPV, particularly to avoid gradually increased DC offset, attention should be paid to u * NPf . If i * NP min or i * NP max is always selected in each switching cycle, two extreme variations in a fundamental cycle are respectively obtained as: To ensure NPV balance in a fundamental cycle, u * NPf = 0 should be satisfied, and it is available while u * NPf max and u * NPf min have opposite signs. Otherwise, the gradually increased DC offset on NPV is caused. Therefore, u * NPf max and u * NPf min can be finally used to determine whether the TLI can operate normally from the point view of NPV balance.

III. TWO REPRESENTATIVE FAULT-TOLERANT CONTROL STRATEGIES
When OC fault occurs in an inner switch of one phase, the following two representative fault-tolerant control strategies were proposed in [23]. (1) The fault phase always operates in two-level mode, which is called as 2L/FTC. (2) The fault phase operates in three-level mode in the normal half fundamental cycle, and operates in two-level mode in the fault half fundamental cycle, which is called as 2L +3L/FTC.

A. 2L/FTC
If OC fault occurs in one inner switch of phase X, it always operates in two-level mode and only 0 and 2 level are outputted. After injecting u ZSV , the modulation voltage is u X , VOLUME 8, 2020 and the duty ratio of the corresponding level is: For normal phase Y, it still operates in three-level mode. After injecting u ZSV , the modulation voltage is u Y , and the duty ratio of the corresponding level is: If OC fault occurs in an inner switch of phase X, it operates in two-level mode in fault half fundamental cycle and operates in three-level mode in normal half fundamental cycle. After injecting u ZSV , the modulation voltage is u X , and the duty ratio of the corresponding level is calculated as follows: For normal phase, the duty ratio of the corresponding level can be referred to (13).

C. THE VARIATION OF NP CURRENT WITH RESPECT TO ZSV
In a switching cycle, the polarity of the modulation voltage may be changed after injecting u ZSV . So, i * NP may be not linear with u ZSV .
If the voltage of phase X satisfies with -u X ∈ γ , the duty ratio of 1 level of this phase will gradually increase while u ZSV increasing from -1-u min to -u X . When u ZSV = −u X , the duty ratio of 1 level of this phase is 100% and it will gradually decrease while u ZSV increasing from -u X to 1u max . Since u ZSV = −u X is the demarcation point, the NP current introduced by this phase is different on both sides of this point. There are at most three demarcation points in γ . Since the variation of i * NP with respect to u ZSV exhibits a linear relationship in each segment, i * NPmax and i * NPmin will be acquired at the boundary points or demarcation points.
It should be noted that while 2L/FTC is adopted under OC fault of S A2 or S A3 , the NP current will not be affected by phase A. Thus, u ZSV = −u A is not the demarcation point.
However, when 2L+3L/FTC is adopted, u ZSV = −u A is the demarcation point in the normal half fundamental cycle and it is not the demarcation point in the fault half fundamental cycle.
Combining with the above analysis, when OC fault occurs in S A2 , the classification and criterion of the boundary points and demarcation points are given in Table 1 Fig. 2, where u ZSV1 , u ZSV2 and u ZSV3 are the demarcation points; u ZSV4 = −1 − u min and u ZSV5 = 1-u max are the boundary points.

D. THE NPV CONTROL METHOD
For NPV control, not only the NPV variation in a switching cycle should be taken into account, but also the DC offset on NPV should be not produced. The NPV control is achieved by extracting or injecting current from NP. Since the NP current is related to u ZSV , the NPV control method based on ZSV planning proposed in [26] is adopted.
Assuming u NP,init = u dc − u C2 is the initial offset on NPV in a switching cycle. To maintain NPV balance, the NPV variation u NP in this switching cycle should be satisfied as: Substituting (15) into (9), the NP current reference value i * NPref can be obtained: The NPV control method based on ZSV planning is to solve the linear equation according to i * NPref calculated by (16) and then determine the injected ZSV reference value u ZSVref to achieve NPV balance.
Finally, the rule of NPV control method based on ZSV planning is summarized as: where i * NPref is located in [i * NPg , i * NPh ] for the third case, and u ZSVg and u ZSVh are the corresponding ZSVs of i * NPg and i * NPh . In eq. (17), NPV can not be adjusted to u dc within a switching cycle for the former two cases, and it can be achieved for the third case.

IV. APPLICATION RANGES OF FAULT-TOLERANT CONTROL STRATEGIES UNDER DIFFERENT FAULT TYPES
According to Section II, in order to ensure long-term reliable operation of T-type TLI with OC fault of inner switches, the possible control of NPV under different fault types  should be revealed for 2L/FTC and 2L+3L/FTC. Based on the analysis given in Section II, the distributions of i * NPmax , i * NPmin and u * NPmin , u * NPmax should be paid attentions. The former and the latter can be used to determine whether the NPV balance is maintained in a switching cycle or in a fundamental cycle, respectively. Especially, the application ranges of a fault-tolerant control strategy are determined by the latter, which should be paid more attentions.

A. INNER SWITCH WITHOUT OC FAULT
While ϕ = 0 and π/2, the distributions of i * NPmax and i * NPmin with respect to m and ωt without OC fault of inner switch can be referred to Fig. 2 in [26]. It found that i * NP min ≤ 0 ≤ i * NP max is satisfied almost in the entire operating regions while ϕ = 0, which indicates that the NPV balance can be achieved in a switching cycle. However, while ϕ = π/2, i * NP min ≤ 0 ≤ i * NP max is only satisfied at lower modulation  index (m <0.577). This is the reason why obvious NPV variation appears under condition of high modulation index and low PF in practice.
Moreover, the distributions of u * NP min and u * NP max with respect to m and ϕ can be referred to Fig. 4 in [26]. It found that u * NP min and u * NP max always have opposite signs to ensure NPV balance in a fundamental cycle. The analysis is well consistent with the general cognition of NPV variation for TLI in normal operation, which indirectly indicates that the theoretical analysis is feasible.
In the subsequent analysis, the distributions of i * NPmax and i * NPmin are no longer given because the NPV balance is not necessary in a switching cycle, but it is necessary in a fundamental cycle. So, only u * NP min and u * NP max are presented to determine the application ranges.

B. THE APPLICATION RANGES OF 2L/FTC
When 2L/FTC is adopted for different m and ϕ, the distributions of u * NPmin and u * NPmax under OC fault of single-phase inner switches can be referred to Fig. 1(b) in [25]. Under OC fault of two-phase inner switches, the distributions are shown in Fig. 3. It can be seen that u * NP max is always higher than zero, and u * NP min is always lower than zero. So, the necessary condition of maintaining NPV balance in a fundamental cycle is always satisfied. That makes sense because the NPV can be adjusted by the normal phase.
When OC fault occurs in inner switches of all phases, T-type TLI is completely degraded into two-level inverter under 2L/FTC, and the NPV control ability is thus lost. In this case, the DC offset on NPV cannot be eliminated only by injecting u ZSV . Other methods should be used to solve this problem, such as resistance equalization. However, it is noted that the two-level operation is unaffected by NPV.
Therefore, 2L/FTC is always competent for fault-tolerant operation under arbitrary OC fault in inner switch.

C. THE APPLICATION RANGES OF 2L+3L/FTC
When single or multiple phase inner switches OC fault occurs, there are many cases under 2L +3L/FTC, which are divided into five fault types: (1) single-phase inner switch fault (S A3 ); (2) two-phase inner switches fault with the same  direction (S A3 and S B3 ); (3) two-phase inner switches fault with the opposite direction (S A3 and S B2 ); (4) three-phase inner switches fault with two phases in the same direction (S A3 , S B3 and S C2 ); (5) three-phase inner switches fault with the same direction (S A3 , S B3 and S C3 ). Although not all the OC fault types in inner switches are listed, the other types can be obtained by duality. For example, OC fault in S A2 , S B2 and in S A3 , S B3 are dual. Thus, only the above five fault types are discussed.   For 2L+3L/FTC, the distributions of u * NPmin and u * NPmax under the first fault type can be referred to Fig. 1(c) in [25], and the distributions are respectively shown in Figs. 4-7 under the latter four fault types. It can be seen that the necessary condition of maintaining NPV balance in a fundamental cycle is always satisfied in the whole regions of m and ϕ only in Fig. 5. For the first fault type, u * NPmin and u * NPmax are both higher than zero around ϕ = π/2 and 3π/2 with high m, which indicates that NPV is not controllable in these regions, and gradually increased DC offset on NPV is caused. There are similar phenomena in Figs. 4 and 6. Especially for Fig. 7, u * NPmin and u * NPmax are always higher than zero in the whole regions, which makes NPV decrease continuously. Thus, in these regions, NPV is out of control, and three-level operation is no longer allowed.
From these figures, it can be seen that 2L+3L/FTC can be adopted unconditionally only under fault type 3, and the application ranges should be taken into account for the other fault types. Especially for the fault condition 5 shown in Fig. 7, 2L+3L/FTC cannot be adopted because that NPV is varied monotonically. In these cases, the inverter will stop working because of unbalance protection. Therefore, in fact, 2L+3L/FTC is not always competent for fault-tolerant operation under arbitrary fault type.
To better reveal the availability of 2L+3L/FTC, the application ranges under the five fault types are presented in Fig. 8. In Fig. 8, 0 < u * NPmin < u * NPmax is satisfied in the red area, in which NPV is out of control, and u * NPmin < 0 < u * NPmax is satisfied in the green area, in which NPV is controllable. From Fig. 8 Fig. 8 can be utilized to easily determine whether 2L+3L/FTC is able to deal with the specific fault types under given conditions of m and ϕ. Finally, the possibility of suppressing the DC offset on NPV under different m and ϕ is given in Table 2 for 2L/FTC and 2L+3L/FTC under different fault types and conditions of m and ϕ.

V. EXPERIMENTS
In order to verify the theoretical analysis, the prototype of T-type TLI with key parameters listed in Table 3 was established in the laboratory, which is shown in Fig. 9. The main controller is Freescale's DSP MC56F84789 and the switching device is SEMiX-205TMLI12E4B. Because the application ranges of the fault-tolerant control strategies are mainly focused on, open-loop control is applied in the experiments    for fair comparison to avoid the potential effect by the control loop.
In the experiments, the adopted fault diagnosis method can be referred to [24]. After detecting fault type, 2L/FTC or 2L+3L/FTC is applied, and the PWM sequences are generated according to eqs. (12)- (14). Moreover, the injected ZSV is determined by eq. (17).
Figs. 10-17 shows the corresponding experimental results with different fault types respectively under 2L/FTC and 2L+3L/FTC, where u C1 and u C2 denote the upper and lower capacitor voltage, u A , u B and u AB represent the voltage of phase A, B and phase A to B, i A , i B and i C denote the three phase currents, respectively.
As shown in Fig. 10, with OC fault in S A3 , gradually increased DC offset on NPV is caused and the phase current is distorted. However, while 2L/FTC is involved, either way, the DC offset emerged in fault stage is always effectively eliminated. It can be also seen that the NPV fluctuation in fault-tolerant operation is obviously larger than that in normal operation, and its fluctuation frequency is mainly varied from three to one times of fundamental frequency.
With OC fault in S A3 and S B3 as shown in Fig. 11, similar conclusions as that in Fig. 10 can be drawn. As obviously shown in Fig. 11(c), the three phase currents seem unbalanced. In fact, it finally gets into steady state, but a relatively long time is needed. That's due to the load condition of small resistance and large inductance.
With OC fault in S A3 , S B3 and S C3 as shown in Fig. 12, the T-type TLI is completely degraded into two-level inverter under 2L/FTC. Thus, NPV is no more adjustable, and the DC offset on NPV always exists. Although NPV is always unbalanced, the inverter can work normally in two-level operation. However, the NPV unbalance protection may be triggered during the fault diagnosis process.
The experimental results shown in Figs. 10-12 indicate that 2L/FTC is always effective for fault-tolerant operation under arbitrary OC fault in inner switch, which are consistent with the theoretical analysis in Section IV. And the NPV balance   can be ensured as long as not all the phases have OC fault in inner switch.
As shown in Fig. 13 under 2L+3L/FTC, with OC fault in S A3 , the suppression of emerged DC offset on NPV is related to the load, and it is effective while m = 0.9, ϕ = π/12 and m = 0.3, ϕ = 5π/12, but invalid while m = 0.9, ϕ = 5π/12. Only in Fig. 13(b), the DC offset on NPV can not be eliminated, which increases gradually, and the NPV unbalance protection is finally triggered. Thus, in the case of S A3 OC fault, 2L+3L/FTC can not be applied under the condition of high modulation index and low PF, but it is competent for the other conditions.
With OC fault in S A3 and S B3 under 2L+3L/FTC as shown in Fig. 14, the suppression of emerged DC offset on NPV is mainly related to the load PF, which is a little different from that presented in Fig. 13. In this case, the emerged DC offset on NPV can not be eliminated under low PF (ϕ = 5π/12) condition, but it is eliminated under high PF (ϕ = π/12) condition.
With OC fault in S A3 and S B2 as shown in Fig. 15, either way, the DC offset on NPV emerged in faulty stage is always effectively suppressed by applying 2L+3L/FTC. That's because the NP current can be compensated by each other for the two faulty phases. Under this fault type, NPV balance is always ensured, and 2L+3L/FTC can be effectively used in the whole operating regions.
As shown in Fig. 16, with OC fault in S A3 , S B3 and S C2 , very similar conclusions as that of Fig. 13 can be drawn.
With OC fault in S A3 , S B3 and S C3 as shown in Fig. 17, either way, it can be seen that the DC offset on NPV is always gradually increased after applying 2L+3L/FTC. That's because the NP current can only flow out from NP in this fault type, which makes NPV continuously decrease. In practice, it will finally trigger the NPV unbalance protection.
All the experimental results of Figs. 13-17 are well consistent with the theoretical analysis in Section IV C, and the correctness of Fig. 8 is verified.
From the above experimental results, it also found that 2L/FTC can be applied unconditionally, but the application ranges of 2L+3L/FTC must be considered in terms of fault type and operation condition of m and ϕ in practice.

VI. CONCLUSION
For T-type TLI, the necessary conditions of maintaining NPV balance respectively in a switching cycle and in a fundamental cycle are simply reviewed in this paper. Two representative fault-tolerant control strategies are adopted when OC fault VOLUME 8, 2020 occurs in inner switches, and an NPV control method is used based on planned ZSV injection. According to the necessary conditions, the application ranges of the two fault-tolerant control strategies under different fault types and operation condition of m and ϕ are respectively revealed.
As discussed, for 2L/FTC, regardless of OC fault in inner switches of single or multiple phases, there is no gradually increased DC offset on NPV. But for 2L+3L/FTC, the NPV balance cannot be maintained in some operation conditions. Therefore, when 2L+3L/FTC is adopted, operating conditions must be taken into account under different fault types. If necessary, it can switch to 2L/FTC to extend the fault-tolerant operation range, even though the performance is degraded to some degree.