Three-Phase Interleaved LLC Asymmetric Resonant Converter With Capacitive Current Balancing and Reduced Switch Voltage Stress

Interleaved converters are a typical solution to enhance a current capacity and to reduce current ripples of an input or output port. Conventional interleaved LLC resonant converters need additional switches and passive components with a feedback control loop for active current balancing, increasing the circuit complexity and cost. This paper proposes a novel three-phase interleaved LLC resonant converter with an automatic capacitive current balancing capability. Two flying capacitors are added to a conventional interleaved LLC resonant converter in order to realize not only the automatic capacitive current balancing but also the reduced switch voltage stresses and asymmetric resonant operations that contribute to reducing rms currents as well as copper losses of transformers. The detailed operation analysis, including the capacitive current balancing mechanism and gain characteristics derivation, are performed. The experimental verification using a 1-kW prototype demonstrated that the automatic capacitive current balancing could be achieved despite the significant mismatch in transformers’ parameters.


I. INTRODUCTION
Interleaved converters consisting of parallel-connected multiple converters operating out of phase at the same frequency are widely used to enhance a current capacity and to reduce current ripples of an input or output port. Gain characteristics of parallel-connected phases are naturally mismatched to a certain degree due to component tolerance. Currents flowing through each phase (hereafter call 'phase currents') are imbalanced due to the gain characteristic mismatch, causing a current concentration and increased current stresses. To balance phase currents in the interleaved PWM converters, all phase currents are measured, and a duty cycle of each phase is individually adjusted so that the gain characteristics of parallel-connected phases are matched [1]. This active current balancing technique, however, requires not only multiple current sensors but also an additional current balancing feedback The associate editor coordinating the review of this manuscript and approving it for publication was Sze Sing Lee . control loops, resulting in increased circuit complexity and cost.
A previous work [2] has proposed an automatic current balancing technique based on a magnetic coupling. Topologies employing a magnetic coupling for the current balancing are prone to be bulky due to a large number of magnetic components. An interleaved PWM buck and boost converters presented in [3], [4] realize an automatic capacitive current balancing thanks to the charge conservation of dc blocking capacitors. In this interleaved buck converter, the number of phases can be extended without impairing the automatic current balancing capability.
Meanwhile, LLC resonant converters offer prominent features of galvanic isolation, high efficiency, high-power density, and reduced switching loss and EMI thanks to zero voltage switching (ZVS) operations. In general, gain characteristics of LLC resonant converters are dependent on their frequency-dependent impedance characteristics, suggesting that switching frequencies of parallel-connected LLC resonant converters need to be individually adjusted to balance phase currents. Alternatively phrased, parallelconnected LLC resonant converters eventually operate at different switching frequencies [5], [6], and therefore, interleaving operations cannot be simply applied to LLC resonant converters.
Several interleaved LLC resonant converters with active current balancing techniques have been proposed [7]- [9]. The interleaved LLC resonant converter presented in [7] adds variable inductors in order to compensate gain characteristic mismatches. Topologies proposed in [8] and [9] adjust parasitic capacitances of MOSFETs by controlling their switching frequencies, but the slight mismatch in a resonant capacitance (e.g., 5%) reportedly results in the existence of phases no longer contributing to power conversion. In general, interleaved LLC resonant converters with an active current balancing are prone to be complex and costly due to additional feedback control loops and current sensors for the active current balancing.
The multi-phase LLC resonant converters presented in [10]- [13], on the other hand, achieve a passive current balancing without additional feedback control loops nor current sensors, but there are still challenges to be addressed. Topology reported in [10] cannot achieve adequate current balancing if the transformers' parameters are mismatched. The interleaved LLC resonant converter employing common inductors tends to suffer from a current imbalance under light load conditions [11]. The three-phase interleaved LLC resonant converter developed in [12] automatically balances three-phase currents by utilizing an integrated transformer and current balancing transformer. However, the existence of the integrated transformer not only increases its design difficulty but also impairs the LLC resonant converters' advantage of the simple structure. Meanwhile, the two-phase interleaved LLC resonant converter [13] achieves an automatic capacitive current balancing thanks to the charge conservation of a capacitor even under light load conditions, but output current ripples cannot be reduced even with the interleaving structure. In addition, a three-phase LLC resonant converter topology with capacitive current balancing has not been proposed yet.
This paper proposes a novel three-phase interleaved LLC resonant converter with an automatic capacitive current balancing capability. Two flying capacitors are added to a conventional three-phase LLC resonant converter to realize not only the automatic capacitive current balancing but also reduced switch voltage stresses. In addition, the added flying capacitors achieve asymmetric resonant operations, by which rms currents of resonant tanks in the case of asymmetric duty cycles d = 0.5 can be reduced. This paper is organized as follows. Section II introduces the proposed three-phase interleaved LLC asymmetric resonant converter and its major features. Section III explains the mechanisms of the automatic capacitive current balancing and asymmetric resonant operation. The operation analysis, switch voltage stress, and gain characteristics will be discussed in detail in Section IV. The experimental verification using a 1-kW prototype will be presented in Section V.

II. PROPOSED THREE-PHASE INTERLEAVED LLC ASYMMETRIC RESONANT CONVERTER
A. CIRCUIT DESCRIPTION Figure 1 illustrates the proposed three-phase interleaved LLC resonant converter. The circuit on the transformers' primary side consists of three LLC resonant tanks, three switching legs, and two flying capacitors C 1 and C 2 -subscript symbols of A-C correspond to Phases A-C. C 1 and C 2 are inserted between high-and low-side switches of Phases A and B (i.e., Q AH and Q AL , and Q BH and Q BL ), respectively. On the transformers' secondary side, full-wave rectifiers, each containing a dc blocking capacitor C bA -C bC to prevent dc bias currents of transformers, are connected in parallel.
Three pairs of high-and low-side switches (Q jH and Q jL , where j is A, B, or C) are driven in a complementary mode, and these three switching legs operate in an interleaving manner of 120 • out of phase. Duty cycles d of high-side switches (Q jH ) are fixed to be 0.33 for the interleaving operations and automatic current balancing. C 1 and C 2 realize not only an automatic capacitive current balancing but also reduced voltage stresses of switches. Furthermore, C 1 and C 2 also take part in the asymmetric LLC resonant operations that are suitable operation modes for resonant converters operating with asymmetric duty cycles (i.e., d = 0.5), as will be detailed in Section III-B.

B. BENEFITS AND DRAWBACKS
Even if component parameters among three phases are mismatched, the phase currents i j are automatically balanced without feedback control loops nor current sensors thanks to the charge conservation of C 1 and C 2 , as will be discussed in Section III-A. Therefore, the proposed interleaved LLC resonant converter can reduce circuit complexity and cost compared with conventional topologies relying on active current balancing techniques [5]- [9].
Switches in traditional LLC resonant converters must be rated for a full input voltage V in . In the proposed interleaved LLC converter, on the other hand, flying capacitors, C 1 and C 2 , contribute to reducing the switches' voltage stresses lower than two-third of the input voltage, as will be detailed in Section IV-B. The reduced voltage stresses translate to lower on-resistances, eventually reducing conduction losses. VOLUME 8, 2020 The proposed interleaved LLC converter adopts the asymmetric resonant operation by employing C 1 and C 2 for resonance. The asymmetric resonant operation reduces rms current as well as Joule losses of components and copper losses of the transformers compared with those in the conventional interleaved LLC converter operating with the symmetric resonance.
The number of phases in the proposed interleaved converter can be extended to increase the current capacity of the converter. However, capacitances of flying capacitors need to be properly designed to achieve the asymmetric resonant operations, resulting in increased design difficulty of the resonant tanks compared with the ordinary LLC resonant converters, as will be detailed in Section III-B. Given the design difficulty of the asymmetric resonant tanks in extended topologies, three-or four-phase topologies would be the practical implementation of the proposed interleaved LLC converter.
Similar to the ordinary LLC resonant converters, the output voltage of the proposed converter is regulated by pulse frequency modulation (PFM) control. All switches in the proposed converter achieve ZVS turn-on and -off by utilizing magnetizing inductances of transformers, L mgj , and parasitic capacitances of MOSFETs, C OSS . All the diodes on the transformers' secondary side achieve zero current switching (ZCS) turn-on and -off.
Since the proposed converter operates with the asymmetric duty cycle of d = 0.5, dc blocking capacitors of C bj are necessary to prevent magnetic saturation of the transformer.

C. EXTENSION TO MULTIPLE PHASE
The concept of the proposed interleaved LLC converter can be extended to arbitrary numbers of phases. The generalized concept of the proposed multi-phase interleaved converter is shown in Fig. 2. The transformers' secondary sides are not illustrated for the sake of clarity. The number of phases can be arbitrarily increased by adding the circuit consisting of a resonant tank, two switches, and a flying capacitor. Extended topologies of the multi-phase interleaved LLC converter also achieves an automatic current balancing, reduced switches' voltage stresses, and asymmetric resonant operations thanks to the flying capacitors.
Resonant frequencies need to be properly designed with considering asymmetric duty cycles, as will be explained in the next section. Let n be the number of phases, duty cycles d of high-side switches are 1/n. Therefore, the larger the number of phases, the smaller will be the duty cycles, resulting in increased design difficulties of asymmetric resonant frequencies. Accordingly, three-or four-phase topologies would be practical from the viewpoint of design difficulty.

III. AUTOMATIC CAPACITIVE CURRENT BALANCING AND ASYMMETRIC RESONANT OPERATION A. AUTOMATIC CAPACITIVE CURRENT BALANCING
The proposed converter offers an automatic current balancing owing to the charge conservation of flying capacitors of C 1 and C 2 . The current flows in each phase are highlighted in Fig. 3. As shown in Fig. 3(a), during the period when i A is positive, C 1 and C rA in the resonant tank of Phase A are charged in series. In the period when C 1 is discharging, C 2 and C rB in the resonant tank of Phase B are charged in series by C 1 , as shown in Fig. 3(b). In summary, C 1 is charged together with C rA of Phase A, and C 1 discharges to C 2 and C rB of Phase B. Therefore, the phase currents of i A and i B are automatically balanced by the charge conservation of C 1 . After C 2 is charged with C rB in the resonant tank of Phase B, C 2 discharges to C rC in the resonant tank of Phase C, as illustrated in Fig. 3(c). Hence, the phase currents of i B and i C are naturally balanced by C 2 . Consequently, all phase currents are automatically balanced thanks to C 1 and C 2 even if component parameters are mismatched.

B. ASYMMETRIC RESONANT OPERATION
In general, to improve the power conversion efficiency of traditional LLC converters operating with a symmetric duty cycle of d = 0.5, rms currents at a given output power need to be minimized with ensuring ZVS operations. To this end, the resonant period 1/f r is set to be slightly shorter than the switching period T S . The proposed interleaved LLC converter, on the other hand, operates with an asymmetric duty cycle of d = 0.33 for high-side switches, and hence, positive and negative half resonant periods, 1/2f rP and 1/2f rN , must be shorter than T S /3 and 2T S /3, respectively.  In the negative half cycle, the negative peak current of the asymmetric resonance is reduced compared with that of the symmetric resonance. Thus, the asymmetric resonant operations can lower negative peak currents, reducing rms currents as well as conduction losses.
As shown in Fig. 3, in the positive half cycle of resonance, not only the resonant tanks but also the flying capacitors of C 1 and C 2 take part in the resonant operations. The resonant frequencies of positive and negative half cycles of Phases A-C, f rAP − f rCP and f rAN − f rCN , are expressed as f rAN − f rCN are written in the identical form as that of traditional LLC converters. f rAP -f rCP , on the other hand, are dependent on not only parameters of the resonant tanks but also C 1 and C 2 . Properly designing C 1 and C 2 can reduce rms currents as well as conduction losses.
Assume L kgA = L kgB = L kgC = L kg and C rA = C rB = C rC = C r , the resonant frequency of negative half cycle, f rN , is expressed as where T rN is the resonant period of the negative half cycle. Let C 1 = C 2 = C f , the resonant frequency of positive half cycles, f rP , and f rBP are represented as where T rP is the resonant period of the positive half cycle.
f rAP and f rCP are expressed in the identical form, whereas f rBP is slightly higher. C 1 and C 2 should desirably be determined so that f rAP ≈ f rBP to equalize peak currents of Phases A-C. Meanwhile, because the proposed interleaved LLC converter operates with the asymmetric duty cycle of d = 0.33, f rP and f rN are preferably designed to be f rP : f rN = 2 :1.

IV. OPERATION ANALYSIS
As discussed in Section II-A, duty cycles d of high-side switches (Q jH ) are fixed to be 0.33. Theoretical operational waveforms and current flows are shown in Figs. 5 and 6, respectively. To simplify the analysis, all the circuit elements are assumed ideal, and the voltages across C 1 and C 2 , V C1 and V C2 , are assumed constant, though C 1 and C 2 are designed to take part in the resonant operations. Similar to traditional LLC converters, all switches and diodes achieve ZVS and ZCS, respectively. In this paper, operations during dead-time periods are omitted to save page length, and the detailed ZVS and ZCS principles are not described. The operations on the transformers' secondary sides are also omitted.

A. MODE ANALYSIS
The operation is roughly divided into three modes based on switching states.
Mode 1 [ Fig. 6(a)]: This mode corresponds to the positive half cycle of Phase A, while Phases B and C are in the negative half cycles of resonant operations. C 1 and the resonant VOLUME 8, 2020 tank of Phase A are charged in series with C rA . The charge stored in C 1 and C rA in this mode is designated as q A (see Fig. 5). The voltages across Q AL , Q BH , and Q CH are yielded as Mode 2 [ Fig. 6(b)]: Phases A and C operate in negative half cycles, while Phase B in the positive half cycles. In Phase B, both C 1 and C 2 take part in the resonant operation. The amount of charge stored in C 2 and C rB designated as q B (see Fig. 5) must be equal to q A because of the charge conservation of C 1 . Consequently, currents of Phases A and B, i A and i B , are automatically balanced. The voltage stresses of Q AH , Q BL , and Q CH are expressed as Mode 3 [ Fig. 6(c)]: Phases A and B are in negative half cycles, while Phase C is in a positive half cycle. C 2 participates in the resonant operation of Phase C. The released charge amount of C 2 , q C , must be equal to q B , resulting in an automatic current balancing between Phases B and C. The voltages across Q AH , Q BH , and Q CL can be expressed as

B. VOLTAGE STRESSES OF FLYING CAPACITORS AND SWITCHES
The resonant tanks of Phases A-C are assumed identical, and they operate with the same duty cycles of d = 0.33. The voltages applied to resonant tanks of Phases A-C are equivalent to the low-side switch voltages obtained in (10), (14), and (18), respectively. Hence, average voltages of the resonant tank (or resonant capacitor) of each phase, V rA −V rC , are expressed as V rA -V rC can be assumed to be identical when resonant tanks' parameters are ideally matched. Thereby, applying V rA = V rB = V rC to (19), (20), and (21) yields switch voltage stresses as Switch voltage stresses in the proposed interleaved LLC resonant converter are one-third or two-third of V in , whereas those in traditional LLC resonant converters are V in . The reduced voltage stresses translate to lowered on-resistances of MOSFETs as well as reduced conduction losses.

C. GAIN CHARACTERISTICS
First harmonic approximation (FHA) is a widely used method to briefly analyze the gain characteristics of LLC resonant converters [14], [15]. However, FHA cannot be applied to the proposed interleaved LLC converter due to asymmetric duty cycles and asymmetric resonant operations. This section reveals the gain characteristics of the proposed converter by applying the time-domain analysis [16], [17]. As discussed in Section III-B, f rP and f rN are preferably designed to be f rP : f rN = 2 : 1 because the proposed converter operates with the asymmetric duty cycle d = 0.33. However, to derive the universal gain characteristics, the time-domain analysis under the condition of f rAP : f rAN = 2 : 1 is performed in this section.
The time-domain analysis is performed based on the following premises in order to simplify the analysis. All the circuit elements are ideal. V C1 , V C2 , and voltages across the dc blocking capacitors on the transformers' secondary sides, V CbA -V CbC , are constant. In this paper, the time-domain analysis for Phase A only is performed to save the page length, but Phases B and C can be analyzed in the same manner.
The voltage of C rA , v CrA , i A , i LmgA , and the current flowing through the secondary winding, i SA , are highlighted in Fig. 7.  One switching cycle is subdivided into four periods, and equivalent circuits of Phase A in each period are illustrated in Fig. 8. Before detailing the gain characteristic analysis, V CbA is derived. The voltage across L mgA in Periods 1-4 is yielded as where V CrA.ave2 and V CrA.ave4 are the average voltages of C rA in Periods 2 and 4, respectively. Equation (25), as shown at the bottom of this page, is derived from the volt-second balance on L mgA , and V CbA can be obtained as (26), as shown at the bottom of this page.
The characteristic impedance, Z r , is defined as Fig. 8(a)]: C 1 , C rA , and L kgA resonate. i A sinusoidally changes, whereas i LmgA linearly increases. v CrA , i A , and i LmgA are yielded as where Fig. 8 where m = L mgA /L kgA , and ω mAP = ω rAP / Fig. 8 where ω rAN = 2π f rAN (26) VOLUME 8, 2020  Fig. 8(d)]: L mgA participates in the resonance. Similar to Period 2, i A sinusoidally changes together with i LmgA . v CrA , i A , and i LmgA are given by where ω mAN = ω rAN / √ 1 + m. As discussed in Section III-B, the resonant frequency of the positive half cycle of Phase B (i.e., f rBP ) differs from those of Phases A and C (f rP = f rAP = f rCP ). The time-domain equations for Phase B can be obtained and expressed in a similar way as (24)−(39).
Assuming Phases A and C have the identical characteristics, the gain G of the proposed three-phase interleaved LLC converter is derived as where R out is the load resistance, and T S (= 1/f S ) is the switching period. Theoretical and simulated characteristics of G are compared in Fig. 9, and component values used for the analysis are listed in Table 1. The normalized frequency F and quality factor Q are defined as In general, G of conventional half-bridge LLC converters converges to 0.5 at normalized frequency F = 1.0. Meanwhile, G of the proposed interleaved converter ideally converges to 0.167 when C 1 and C 2 are designed to be f rAP : f rAN = 2 : 1 because V C1 is 2V in /3, as discussed in Section IV-B. However, G in Fig. 9 converged to 0.17 at F = 0.9 because C 1 and C 2 were chosen so that f rAP /f rAN < 2 in this analysis.
Theoretical and simulated characteristics agreed satisfactorily, but there were slight mismatches observed in the lowfrequency region. These mismatches were due to the discrepancy between the ideal analysis and reality. The analysis was performed assuming that V C1 and V C2 are constant. In reality, however, V C1 and V C2 fluctuate to some extent due to the resonant operations. Thus, the theoretical gain characteristics slightly differed from the simulated ones. Hence, the simulation-based analysis is recommended to reinforce the theoretical analysis if precise gain characteristics in the entire frequency region are required.
The resonant tanks must be designed to ensure the gain requirement even if the input voltage fluctuates. An ordinary PFM feedback control system, similar to that for ordinary LLC converters, can regulate the output voltage

A. PROTOTYPE
A 1-kW prototype was designed and built for V in = 400 V and V out = 48 V, as shown in Fig. 10, and its component values are listed in Table 2. The resistances of primary and secondary windings, r primary.j and r secondary.j , were measured by the frequency response analyzer (FRA5087, NF Corporation, Japan), and measured resistances at 106 kHz are shown in Table 2. As discussed in Section III-B, the three transformers Tr A -Tr C are preferably designed so that their parameters are matched to equalize peak currents of Phases A-C and to achieve high efficiency power conversion. In this paper, however, to verify the automatic capacitive current balancing capability, Tr A -Tr C were designed so that their key parameters of L mgj , L kgj , and n j were intentionally severely mismatched.
Experiments with symmetric resonant operations were also performed to demonstrate the reduced conduction losses by the asymmetric resonant operations. C 1 and C 2 were replaced with ceramic capacitors with a capacitance of 4.4 µF so that these capacitors did not take part in resonant operations.

B. MEASURED WAVEFORMS
Measured currents of the primary windings, secondary windings, and an output port under the asymmetric resonant  operations at 1 kW and f S = 106 kHz are shown in Figs. 11(a), (b), and (c), respectively. Despite the severely mismatched transformer parameters, the primary phase currents were automatically balanced, as shown in Fig. 11(a). The secondary phase currents, on the other hand, were slightly imbalanced due to the mismatch of each transformer's turn ratio, as shown in Fig. 11(b). Figure 12 shows the measured current waveforms under the symmetric resonant operations at 1 kW and f S = 145 kHz. The peak currents of the positive and negative half cycles of resonant tanks were nearly identical in the symmetric resonance, as shown in Figs. 12(a) and (b). With the asymmetric  resonance [see Figs. 11(a) and (b)], on the other hand, the peak currents of the negative half-cycles were lower than those of the positive half cycles, reducing rms currents at a given output power.  Measured voltage waveforms of the high-and low-sides switches at a full load of 1 kW under the asymmetric resonant operations are shown in Figs. 13(a) and (b), respectively. v QBH and v QCH were suppressed to around two-third of the input voltage, thanks to C 1 and C 2 , as discussed in Section IV-B. Peak values of v QAH , v QAL , v QBL , and v QCL were suppressed to approximately one-third of V in , though they slightly exceeded the theoretical values due to the resonances of C 1 and C 2 .
Drain-source and gate-source voltages of the switches, v ds and v gs , at a full load of 1 kW under the asymmetric resonant operations are shown in Fig. 14. v gs was applied after v ds declined to zero, verifying ZVS turn-on for all switches. ZVS turn-off operations for all switches were also confirmed as v ds rose with moderate dv/dt slope after v gs dropped to zero.

C. AUTOMATIC CAPACITIVE CURRENT BALANCING
From the measured phase currents of the primary windings i A -i C , the averaged phase currents I A -I C were calculated from the following equation where j is A, B, or C. The calculated I A -I C are shown in Fig. 15. Despite the severe mismatch in the transformers' parameters, I A -I C were automatically balanced with errors less than 2% over the entire output power range.

D. POWER CONVERSION EFFICIENCY
The measured and calculated power conversion efficiencies of the asymmetric and symmetric resonance are compared in Fig. 16. The peak efficiency of the symmetric resonance was as high as 92.4% at 700 W, and the full-load efficiency at 1 kW was 91.6%. With the asymmetric resonance, the efficiencies increased because of the lower rms values of i Ai C as well as reduced Joule losses. The full-load efficiency at  1 kW increased to as high as 93.1%, and the peak efficiency was 94.0% at 600 W.
The calculated power conversion efficiencies agreed very well with the measured ones, verifying the estimated loss breakdowns that will be shown in the next subsection.

E. LOSS ANALYSIS
Detailed loss breakdowns of the proposed interleaved LLC converter with the asymmetric or symmetric resonant operations were theoretically calculated. Figures 17(a) and (b) compare the estimated loss breakdowns at 500 W and 1 kW, respectively. Switching losses were assumed to be negligibly small due to ZVS operations over the entire output power range. Gate driving losses were excluded from these loss  breakdowns since an auxiliary power supply drove the gate drivers. Iron losses of the transformers were experimentally measured and were obtained from no-load losses of the prototype.
It should be noted that there were slight differences in iron losses of the asymmetric and symmetric resonance because the switching frequency f S slightly differed even at the same output power. To be specific, f S of asymmetric resonant operations at 500 W and 1 kW were 123 and 106 kHz, respectively, whereas that of the symmetric resonant operations were 165 and 145 kHz.
The asymmetric resonant operation significantly reduced the Joule losses, especially the primary and secondary windings of the transformers (i.e., copper losses). Under both resonant operations, power losses in C 1 and C 2 were negligibly small-the total loss in C 1 and C 2 was merely around 0.1 W at 1 kW.
Diode conduction losses were the dominant factors in both conditions of 500 W and 1 kW. Therefore, reducing the diode count by employing center-tapped transformers or synchronous rectifiers would effectively improve the efficiencies over the entire power range.

VI. CONCLUSION
This paper has proposed the three-phase interleaved LLC resonant converter with an automatic capacitive current balancing capability. Phase currents are automatically balanced by the flying capacitors without using current sensors nor feedback control loops, achieving the reduced circuit complexity and cost. The flying capacitors also contribute to lowering switches' voltage stresses. Furthermore, the proposed asymmetric resonant operations utilizing flying capacitors can reduce Joule losses of circuit components and copper losses of transformers.
The experimental verification using the 1-kW prototype demonstrated the automatic capacitive current balancing capability even with the severe mismatch in the transformers' parameters. The power conversion efficiency was improved thanks to the proposed asymmetric resonant operations compared to that of the symmetric ones.