Abstract
Typical circuit implementations of Shor’s algorithm involve controlled rotation gates of magnitude where is the binary length of the integer to be factored. Such gates cannot be implemented exactly using existing fault-tolerant techniques. Approximating a given controlled rotation gate to within currently requires both a number of qubits and a number of fault-tolerant gates that grows polynomially with . In this paper we show that this additional growth in space and time complexity would severely limit the applicability of Shor’s algorithm to large integers. Consequently, we study in detail the effect of using only controlled rotation gates with less than or equal to some . It is found that integers up to length can be factored without significant performance penalty implying that the cumbersome techniques of fault-tolerant computation only need to be used to create controlled rotation gates of magnitude if integers thousands of bits long are desired factored. Explicit fault-tolerant constructions of such gates are also discussed.
- Received 15 December 2003
DOI:https://doi.org/10.1103/PhysRevA.70.032329
©2004 American Physical Society