Back and front contacts in kesterite solar cells: state-of-the-art and open questions

We review the present state-of-the-art within back and front contacts in kesterite thin film solar cells, as well as the current challenges. At the back contact, molybdenum (Mo) is generally used, and thick Mo(S, Se)2 films of up to several hundred nanometers are seen in record devices, in particular for selenium-rich kesterite. The electrical properties of Mo(S, Se)2 can vary strongly depending on orientation and indiffusion of elements from the device stack, and there are indications that the back contact properties are less ideal in the sulfide as compared to the selenide case. However, the electronic interface structure of this contact is generally not well-studied and thus poorly understood, and more measurements are needed for a conclusive statement. Transparent back contacts is a relatively new topic attracting attention as crucial component in bifacial and multijunction solar cells. Front illuminated efficiencies of up to 6% have so far been achieved by adding interlayers that are not always fully transparent. For the front contact, a favorable energy level alignment at the kesterite/CdS interface can be confirmed for kesterite absorbers with an intermediate [S]/([S]+[Se]) composition. This agrees with the fact that kesterite absorbers of this composition reach highest efficiencies when CdS buffer layers are employed, while alternative buffer materials with larger band gap, such as Cd1−xZnxS or Zn1−xSnxOy, result in higher efficiencies than devices with CdS buffers when sulfur-rich kesterite absorbers are used. Etching of the kesterite absorber surface, and annealing in air or inert atmosphere before or after buffer layer deposition, has shown strong impact on device performance. Heterojunction annealing to promote interdiffusion was used for the highest performing sulfide kesterite device and air-annealing was reported important for selenium-rich record solar cells.


Introduction
Kesterite solar cells, i.e. thin film solar cells (TFSCs) based on Cu 2 ZnSn(S, Se) 4 (CZTSSe) are interesting since they combine the benefits of thin film technology with the use of earth-abundant and non-toxic elements (or low toxic in the case of Se) in photovoltaics. The high absorption coefficient and ideal band gap energy of Se-free reviewed, for which the efficiency of corresponding CZTS solar cells is now approaching that of the record devices with CdS buffer, while for CZTSSe and CZTSe, Cd-free buffer layers so far lead to lower efficiencies.

The back contact
An overview of device results for some of the different back contacts that have been studied for kesterite TFSCs is given in table 1. The table includes highest reported efficiencies for CZTSSe, CZTSe, and CZTS devices and their reported Mo(S, Se) 2 thicknesses, if applicable/reported. Furthermore, the device performance of cells with alternative back contact stacks is presented together with that of their corresponding Mo back contact reference devices, if reported. The sections below address the electronic structure and chemical properties of these contacts. In addition, the results on transparent back contacts are discussed.

Mechanical properties
A necessary role of the back contact is ensuring adhesion between the CZTSSe absorber and the substrate. Pinhole formation, buckling, bubbling, cracking, or delamination of the overlayer (i.e. the CZTSSe) are some of the various failure mechanisms that can result when mechanical stresses overcome weak physicochemical bonding at an interface [29]. Mechanical stresses can arise for several reasons. First, they can be induced by the deposition methods used for the Mo and CZTSSe layers-techniques such as sputtering, evaporation and electrodeposition, for example, often result in residual stresses in thin films (see [30] for a detailed overview on this topic). Second, a mismatch exists in the thermal expansion coefficients of the absorber and substrate: the linear thermal expansion coefficient of bulk CZTS calculated from data in [31] is about 12 ppm°C −1 at 25°C, compared to about 9 ppm°C −1 for the soda-lime glass (SLG) substrate. This will result in development of a certain stress during heating and cooling (for CuInSe 2 the same value is about 8-9 ppm°C −1 [32], suggesting a less favorable situation for CZTS compared to CI(G)Se). Third, CZTSSe films can exchange material with the gas phase during heating, gaining or losing S(e) and SnS(e). The resulting volume change of the film may induce or relieve stresses depending on the situation. Generalizations cannot be made, but if adhesion problems are experienced, they can potentially be remedied by tuning the stress in the CZTSSe layer via sputter parameters (primarily gas pressure and substrate temperature) [33,34] or via composition control and if possible, reducing the thickness of the CZTSSe layer [30]. To promote adhesion further, the physicochemical strength of interfaces in general can be improved by enhanced surface roughness and ensuring cleanliness of surfaces prior to deposition [29]. For the CZTSSe back contact in particular, if Mo(S, Se) 2 growth occurs with the c-axis perpendicular to the Mo plane, see figure 2, then adhesion is reliant upon the weak van der Waals forces that hold the Mo(S,Se) 2 sheets together. Thus, this preferred orientation ought to be avoided if interfacial stresses are a problem.

Chemical properties of the back contact
The back contact is responsible for mediating chemical processes that can have both positive and negative effects on the quality of the solar cell. In this section, we briefly review the ongoing research topics in this area, highlight some relevant materials chemistry aspects, and identify, where possible, gaps in our knowledge that could hold the key to further progress.

Diffusion in thin polycrystalline films
The important chemical processes at the back contact are mediated by diffusion of material into or through the back contact layer(s). Diffusion is the net flux of atoms or ions i through a given medium h, in response to a gradient in the concentration c i with distance, x (or 'depth' in our case). The flux J i,h is expressed in the 1D case by the law J i,h =−D i,h [∂c i /∂x]. The diffusion coefficient or 'diffusivity' D i,h describes the rate of hopping of atoms between sites in the crystal, which is thermally activated and thus exponentially dependent on temperature. In perfect solids, the values of D i,h are often very low. However, they become strongly enhanced by the presence of point and extended defects of all kinds. In thin films, grain boundaries (GB) tend to provide the most rapid means of diffusive transport into and through a layer [35]. Given the typical microstructure of magnetronsputtered Mo back contacts (see figure 1), the relevance of this is obvious.

Diffusion from the substrate
The beneficial diffusion of alkalis (primarily Na) from the SLG substrate through the standard Mo back contact has been well-studied, initially in the case of the related CIGSe materials (e.g. [36,37]), and there is no reason to suspect any difference for the CZTSSe case. Rapid Na diffusion is observed through Mo thin films, due to the presence of many GB [37]. For Na in particular, Mo-oxides at GB are thought to provide an especially effective diffusion channel (see [36] and references therein), explaining why the diffusion rate of Na is increased with the , if data is available. Data is given for CZTSSe, CZTSe, and CZTS based devices with or without anti reflective coating (ARC). The stated band gap energies (E g ) are derived from quantum efficiency measurements reported in the respective references. In cases in which not all information was given in the cited sources, the cells in the table are intentionally left blank. O content in the Mo layer. Therefore, it is possible to tune the diffusivity of Na in the back contact to increase the delivered 'dose' to the absorber layer under the conditions of the chosen thermal process. Apart from the total dose, the lateral distribution of Na, both at large and small scales, should ideally be uniform [38]. This puts high demands on the chemical and microstructural uniformity of the back contact layer(s) from nm to mm length scales. If other substrates besides SLG are used, alkalis must be provided from a separate source [39,40]. The same is true in the case diffusion barriers on the Mo are used to control the Mo(S, Se) 2 thickness. In contrast, any diffusion of detrimental impurities, such as e.g. Fe from a steel substrate, must be avoided. In the case of CIGSe on steel substrates, it has been shown that an additional metal or metal-oxide barrier layer beneath the Mo can have the desired result-see [41] and references therein-and similar results have been reported for CZTSSe [39,41].

Mo(S, Se) 2 growth
Unlike CIGSe, CZTSSe is most often prepared with a large excess of chalcogens in the thermal process, typically 1-1000 mbar in a two stage growth process compared to ≈10 −5 mbar for co-evaporation of CIGSe. The formation of a layer of Mo(S, Se) 2 is inevitable under such conditions. As discussed in section 2.3 below, factors like the orientation, thickness, and doping of the Mo(S, Se) 2 layer can all have significant electrical effects on the solar cell. Here we focus on the effect of the growth environment on the layer properties. The growth rate of the Mo(S, Se) 2 layer, assuming a steady supply of chalcogen from the gas phase, ought to be dependent on the rate of diffusion of S(e) through the growing Mo(S, Se) 2 layer to reach unreacted Mo [42]. The diffusion rate J S,MoS e 2 ( ) should increase for higher chalcogen partial pressure, due to the enhanced concentration gradient ∂c S /∂x, and higher temperature via an enhanced diffusivity of S(e) in Mo. However, different groups obtain very thin or thick Mo(S, Se) 2 layers for ostensibly similar thermal process conditions, see for e.g. table 1. Part of the explanation may lie in the highly anisotropic nature of Mo(S, Se) 2 (see figure 2). Significantly different diffusion coefficients for S(e) can be observed depending on whether the covalently bonded Mo(S, Se) 2 sheets are oriented perpendicular to the plane of the back contact (high diffusivity), parallel to it (low diffusivity), with some intermediate orientation, or with no preferred orientation at all. The angle and degree of orientation obtained in a given process seems to depend on the Mo sputter parameters [43,44], oxygen content [45,46], the presence of Na [44], and the conditions of the heat treatment [44]. These factors can all vary from group to group, possibly resulting in a variation of orientations and thus of S(e) diffusivity values and ultimately Mo(S, Se) 2 layer thicknesses. Naturally, the diffusivity of Na will be influenced in a similar way, which couples the Mo(S, Se) 2 formation process to the CZTSSe absorber properties, and means that if modifications to the back contact are made, other variables may need to be altered to keep the alkali dose in the optimum range. Since the complexity of these interrelated effects could result in trade-offs for device performance, a more attractive approach may be to deposit the Mo(S, Se) 2 layer deliberately, instead of allowing it to form in the thermal step. Indeed, it has been shown that MoS 2 can be prepared with controlled orientation using sputtering techniques [47].
As an aside, a direct reaction between CZTS and Mo can be observed when the back contact interface is heated in absence of S, resulting in the decomposition of the CZTS and the formation of MoS 2 [48]. The impact of this process is reduced when high S(e) partial pressures are provided in the thermal step, because the excess S(e) provided can compensate for the chalcogen loss from the absorber layer. Nevertheless, it could become relevant if thermal processes are developed in the future that use lower S(e) partial pressures.

Protective interlayers at the back contact
To protect the back contact from excessive Mo(S, Se) 2 formation, the use of interlayers with thicknesses in the sub-100 nm range, placed between the Mo and the CZTSSe, has been tested repeatedly. As reviewed recently by Englund et al, interlayers of pure metals as well as various metal borides, carbides, nitrides, and oxides have been deposited between the Mo and CZTS(e) layers for this purpose [49]. In two cases (TiN [16,50]) the final device efficiency was not improved, but generally an improvement was obtained (TiN [51], Bi [52], Ag [53], C [54], TiB 2 [55], ZnO [56][57][58], a-SiC [59] , MoO x [23,60]). The reported improvements, however, did not result in devices with PCEs higher than 10%, suggesting that to date the Mo/Mo(S, Se) 2 layer stack is still the best back contact for CZTSSe solar cells. One exemption might be the application of a 3 nm thick Al 2 O 3 interface layer [26]. It reduces the MoS 2 thickness as well as the voids and ZnS segregation at the MoS 2 /CZTS interface. This results in an improved time resolved photoluminescence lifetime and in CZTS device performances up to 9.26% (table 1). The same interfacial layer is used in the 11% CZTS record device [25]. Many of these interlayers, especially the metals and oxides, react with S(e) or the CZTSSe layer during processing (e.g. [15,22]). In some cases, a final top layer of Mo or Mo(S, Se) 2 is deposited on top of the interlayer, intended to promote good electrical contact.
Inhibition of Mo(S, Se) 2 growth requires blocking of S(e) diffusion to the Mo layer. Thus, the interlayer must have a low bulk diffusion coefficient for S(e), including grain boundary contributions. Metal layers (unless monocrystalline or excessively thick) tend to be poor diffusion barriers due to fast grain boundary transport [61]. Inert compounds such as transition metal nitrides, borides, carbides, and silicides offer greatly improved barrier performance and chemical stability [61]. However, for extremely thin layers of such materials (in the order of 10 s of nm), large performance variations can be observed depending on the deposition method, which is ascribed to effects of grain boundary orientation, degree of oxidation, ability of complete coverage, and other process variables [62]. Importantly, any mechanical defects such as cracks or pinholes in the interlayer will reduce diffusion barrier performance. Such imperfections can be hard to avoid in very thin layers deposited on moderately rough surfaces, especially if thermal or mechanical stresses occur in subsequent processing steps [61].
For CZTS(e), it seems relatively easy to suppress Mo(S, Se) 2 formation by use of standard Ti-nitride or -boride interlayers [55,63,64], presumably due to reduced S(e) diffusivity in these materials. In this respect, the interlayers appear to act as effective diffusion barriers. In terms of Na transport, however, the picture is more complex. In several cases, Na transport was unaffected or even enhanced in the presence of interlayers [26,50,65]. There are several possible explanations for this. One is that the Mo(S, Se) 2 layer limits Na transport under normal conditions, with the result that if Mo(S, Se) 2 is avoided, Na diffusion is promoted. This interpretation supposes that the bulk diffusivity of Na in the interlayer is still large, while that for S(e) is small, which if true would be a fortunate coincidence! (We note that diffusivities can be highly element specific, although values for the relevant materials could not be found in literature). An alternative explanation is based on the aforementioned likelihood of defects such as pinholes in thin interlayers. Such features have indeed been observed for sputtered TiN [63] and Al 2 O 3 [26] interlayers used for CZTS(e) back contacts. Thus, it is also possible that while the interlayer prevents S(e) from diffusing to most of the back contact, Na is able to diffuse via pinholes/cracks in the interlayer and spread into the CZTS(e) layer from there. In this situation, Na transport would be non-uniform, which could have detrimental effects for the electrical properties of the CZTS(e) layer. Since the Na content in the CZTS(e) is usually characterized by large-area/integral methods such as secondary ion mass spectroscopy (SIMS) [65] or x-ray photoelectron spectroscopy (XPS) profiling [26], it is not possible to distinguish between uniform transport via the interlayer itself and a non-uniform transport via mechanical defects. As noted by Englund et al [49], it may be preferable to prepare interlayers using techniques that deliver better conformal coverage than sputtering, such as atomic layer deposition (ALD) or plasma enhanced chemical vapor deposition. Some authors, however, have claimed a positive effect of densely distributed openings in the interlayer, realizing a point contact scenario [26]. In any case, further attention should be paid to this matter to ensure that blocking of the Mo(S, Se) 2 formation does not come at the expense of a uniform Na incorporation.

Electrical properties of the back contact
In most kesterite devices, Mo is used as a back contact and as discussed above, due to the interaction with the chalcogens during the absorber formation process at elevated temperature, a relatively thick Mo(S, Se) 2 layer (>100 nm) is formed at the Mo/kesterite interface [6,[18][19][20][21]25]. The impact of this layer on the photovoltaic properties (mainly reduction of the fill factor (FF) due to an increased series resistance (R S ) and an increase of the open circuit voltage (V OC ) deficit, and more generally the role of the back contact, is still under debate [66].
The Mo/Mo(S, Se) 2 /CZTSSe contact has been suggested to be either ohmic [67,68], to present a potential barrier [69,70], or to form a reverse (n-p) diode [71]. The large variability in these models can be explained by the complexity of the Mo(S, Se) 2 material and of its interfaces with Mo and CZTSSe along with the lack of direct experimental measurements of the energy level alignment for this structure.
The anisotropy and layered structure of Mo(S, Se) 2 was mentioned in section 2.2 and figure 2. The orientation of the c-axis with respect to the layer plane has a very strong impact on the back contact properties. In undoped MoSe 2 , the conductivity perpendicular to the c-axis (i.e. within the MoSe 2 layers) is 1500 times larger than parallel to the c-axis [72] (i.e. crossing from layer to layer). This anisotropy is, however, lowered in doped MoSe 2 [72,73] which may be the most relevant case due to the inherent cationic diffusion during CZTSSe synthesis as discussed above. The 1.09 eV (1.23 eV) indirect bandgap energy of MoSe 2 (MoS 2 ) [74] can also be slightly varied depending on the orientation [72]. From theory, the Mo/MoSe 2 band alignment has been studied depending on the c-axis orientation [75]. A (0.2±0.1) eV hole barrier is found when the c-axis is perpendicular to the substrate, while the Mo Fermi level is aligned with the valence band maximum (E V ) of MoSe 2 when the caxis is parallel. Interestingly, this barrier is lowered in the presence of Na [75]. The effect of MoSe 2 orientation on the Mo/MoSe 2 /absorber junction has been experimentally studied in the case of CIGSe technology [76,77]. It was found that while the back contact/ absorber contact resistance is twice as low for the MoSe 2 c-axis parallel orientation, the influence of Na plays a more important role on the contact resistance than the MoSe 2 orientation. The impact of the Mo(S, Se) 2 orientation on the Mo(S, Se 2 )/CZTSSe energy level alignment has not been studied, either theoretically or experimentally.
The Mo(S, Se) 2 conductivity is also under debate. The presence of an n-type or slightly p-doped semiconductor at the back contact may explain the reverse diode sometimes observed in the device characteristics [71,78]. Mo(S, Se) 2 can indeed exhibit both p-type [79,80] and n-type [72,73,81,82] conductivity. The latter case was generally attributed to chalcogen deficiencies [79] even if the n-type behavior of MoS 2 due to S vacancies has been recently revised [83]. The different doping results found for Mo(S, Se) 2 films are probably due to impurities incorporated in the layer. Intercalation of atoms or molecules in the interlayer space of Mo(S, Se) 2 is one possibility for getting n-type conductivity [84], while substitution of Mo or S(e) inside the layer structure can give both n-type and p-type doping [85]. Experimentally it has been found that Re [86] and Cs [87] give n-type doping while oxygen [88], zinc [89], phosphorous [90], and niobium [91] give p-type doping. This extrinsic doping could be exploited to deliberately optimize the electronic structure of Mo(S, Se) 2 to improve the back contact properties.
Schematic band diagrams of the Mo/MoS 2 /CZTS and Mo/MoSe 2 /CZTSe back junctions proposed based on literature data are depicted in figures 3(a) and (b). Since energy level alignments derived from employing the simple electron affinity rule are in general not reliable [92], both band diagrams have been constructed using the best available estimates for the potential barrier at the Mo/Mo(S, Se) 2 interface and for the valence band offsets (VBO) at the Mo(S, Se) 2 /kesterite interface. Lacking any direct measurements of the energy level alignment at the back contact/kesterite interface, the estimates are derived using the fact that, according to ab initio calculations, E V (CZTSe)−E V (CIGSe)=0.08 eV [93], where E v is the energy of the valence band maximum. In the absence of the corresponding calculated value for the sulfide counterpart, we use the same 0.08 eV offset in that case. Direct UPS measurements of the VBO at the Mo(S 0.6 Se 0.4 ) 2 /CIG(S 0.9 Se 0.1 ) 2 and MoSe 2 /CIGSe interfaces reveal that E v (CIGSe)−E v (MoSe 2 )=−0.03 eV and E v (CIG(S 0.6 Se 0.4 ) 2 )−E v (Mo(S 0.9 Se 0.1 ) 2 )= 0.12 eV, respectively [82]. Combining these numbers, the estimates for the desired VBO are: 20 eV. Note that this approach does not consider effects caused by interface formation. Furthermore, it is assumed that the VBO for the MoSe 2 /CIGSe interface [82] is measured with a parallel MoSe 2 orientation; VBO for the perpendicular orientation has been shifted corresponding to [75]. In real devices, intermediate orientations and randomly distributed orientations for different Mo(S, Se) 2 grains is also possible.
For the Mo/MoS 2 interface a rather large hole barrier of 0.84 eV is used in figure 3(a) according to the results of a XPS/UPS study [81]. The last parameter needed to construct the band diagram is the Fermi level position (E F ) in Mo(S, Se) 2 . To show the relevance of this parameter, we report in figure 3(a) the band diagrams for two different scenarios: low p-doped MoS 2 (E F −E V =0.55 eV, blue curves) and high p-doped MoS 2 (E F −E V =0.15 eV, red curves). The figure clearly shows that a high p-type doping of MoS 2 leads to a band bending that is able to reflect the photogenerated minority carriers (i.e. electrons) from the MoS 2 /CZTS interface and to induce a hole accumulation layer, which would allow a good Ohmic contact if the Mo/MoS 2 barrier is sufficiently narrow to allow for efficient charger carrier tunneling. In contrast, a poorly doped MoS 2 can increase the minority carrier recombination velocity and introduce a barrier for the hole transport across the heterojunction, which could be the reason for anomalous current-voltage (J-V ) curves (i.e. roll-over or S-shaped curve) [78].
For the Mo/MoSe 2 interface, the theoretical values from [75] have been used for both extreme MoSe 2 orientations to derive the respective energy level alignment. MoSe 2 is assumed to be slightly p-doped without Fermi level pinning. Within this configuration, a small (0.2 eV) barrier for holes exists at the Mo/MoSe 2 interface for perpendicular c-axis orientation, while no barrier is present in the parallel orientation case. This result is quite different from the one just reported for the sulfide case and from simulations based on electron affinity values [68], emphasizing that direct measurements of the energy level alignment at the kesterite back interface are crucially needed to better understand limitations arising from the back contact.
Some experiments have been made trying to replace the back contact metal (Au, W, Pt, Pd, Ni) [15]. However, these efforts did not lead to device improvement as seen in table 1. Finally, recent works [13,80] show that for reduced absorber thicknesses, replacing the Mo/Mo(S, Se) 2 back contact with a high work function material (MoO 3 ) can significantly improve the device performance (table 1), but necessitates an exfoliation step of the absorber.

Transparent back contacts
As discussed above, Mo is still the most common back contact material for kesterites. For applications where a transparent back contact is required, such as bifacial or multijunction solar cells, Mo has to be replaced by another material that combines good electrical conductivity with optical transparency and withstands kesterite processing conditions. Despite the intense research effort on alternative materials, conventional TCOs remain the most common transparent conductors [94].
Present TCOs are based on three binary oxides, SnO 2 , In 2 O 3 , or ZnO [95]. Because undoped binary oxides suffer from limited temperature stability and difficulties with accurate compositional control, impurity doped variants are commonly employed. Indium tin oxide (ITO) is the most effective TCO that combines excellent electrical properties with good chemical stability. The price of indium and concerns over its availability, however, spurred a search for In-free alternatives. Aluminum doped zinc oxide (ZnO:Al) is a common replacement with conductivity reaching that of ITO. The chemical stability of ZnO:Al is, however, generally lower than that of In 2 O 3 [96]. ZnO is also more reactive towards oxygen than In 2 O 3 and therefore requires a more strict control of the oxygen supply during deposition [97]. F doped SnO 2 (FTO) offers exceptional chemical stability, high hardness, and excellent thermal stability although the minimum resistivity of 5 × 10 −4 Ω cm is higher than the best values achieved for ZnO:Al and ITO (10 −4 Ω cm) [98].
Kesterite solar cells using FTO and ITO as transparent back contacts have been reported. Sarswat [99,100] studied CZTS on FTO back contacts and showed that in the presence of S the FTO degraded at temperatures above 500°C. The conductivity decrease, however, was less pronounced for FTO coated with CZTS precursors compared to bare FTO. Furthermore, the S pressure had a strong influence as demonstrated in an experiment where FTO samples were placed at different distances from a S source during annealing. The highest resistivity increase was observed for FTO closest to the S source with a clear relation between the distance and resistivity increase. The FTO was stable when annealed in vacuum or Ar up to 600°C, [100] indicating the presence of free S as the main cause of FTO degradation.
In a study comparing FTO and ITO, Kim et al [24] demonstrated CZTSe bifacial solar cells and reported better stability of the FTO contact than of the ITO contact at selenization temperatures up to 500°C. However, both FTO and ITO provided a non-Ohmic contact that led to a V OC loss. There was a pronounced difference in the interfaces between CZTSe and the two back contacts. FTO resulted in a voided interface and low adhesion of the absorber. ITO, in contrast, provided a smooth interface with good adhesion. Mechanically strong interfaces are, however, often a sign of a chemical interaction between the adjacent layers. Ge et al [101] analyzed interfacial reactions between CZTSe and ITO, and indeed, confirmed indium incorporation in CZTSe and the formation of a SnO 2 layer at the interface. The use of ITO is therefore limited by indium diffusion into CZTSe. Interestingly, bare ITO was stable in Se atmosphere up to at least 550°C.
Limited temperature stability of the TCO in chalcogen atmospheres requires reduction of the annealing temperature. This, however, has a negative impact on the absorber quality. Therefore, the use of a more stable barrier layer to prevent the interface reactions has been investigated [50]. A thin, high work-function MoO x interface layer can improve contacts in solar cells [102]. Espindola-Rodriguez et al [8] utilized thin Mo interlayers on FTO for CZTSSe. While the sheet resistance of a bare FTO increased from 10 to 700 Ω sq −1 . upon annealing in S+Se+Sn at 550°C, the resistance of FTO films with a 20 nm thick Mo interlayer decreased. The interlayer led to an efficiency improvement from 3.1% to 7.6% for a bifacial solar cell. The use of Mo, however, reduces the back contact overall transparency and the performance of thinner layers needs to be investigated.
In summary, surprisingly little research has been published on transparent back contacts for kesterite solar cells and even for the more mature chalcopyrite absorbers this area is not very much explored [96,103]. In addition to the use of different passivation layers, the question of Na supply needs to be addressed. TCO layers have often much lower permeability for Na than the standard Mo back contact [104] and differences in the Na concentration further complicate comparison of the device performance.

Front contact
An overview of device results for some of the different front contacts that have been studied for kesterite solar cells is given in table 2. The table includes highest reported device efficiencies for CZTSSe, CZTSe, and CZTS with their reported buffer layer and TCO stacks as well as alternative buffer layers with their corresponding CdS buffer reference devices, if reported. In the sections below, the results on (alternative) buffer materials, the energy level alignment at the CZTSSe/CdS interface, and interface treatments are discussed.

TCO contacts
TCO layers on top of buffer/CZTSSe heterostructures (as shown in figure 1) are needed to enable efficient collection of photogenerated electrons. Generally, these consist of resistive/undoped ZnO (≈50-80 nm) covered with either ZnO:Al or ITO. As seen in table 2, for the best small cells with metallic grids, the highly conductive TCO (i.e. ZnO:Al or ITO) layer thickness is between 50 and 200 nm, thereby fulfilling transparency and conductivity requirements. These two TCOs, although showing rather similar band gaps (≈3.5 eV), differ in their transparency within the range of the exploited solar spectrum (300-1300 nm) and their work function values. This latter parameter is critical for the device operation since it is related to the electronic structure in the CZTSSe/emitter interface region. According to Klein et al [119], the Fermi level relative to the vacuum level of ZnO:Al films ranges from ≈2.4 eV to as high as ≈3.8 eV, and those of ITO films range from ≈2.0 to ≈3.5 eV. These values are strongly dependent on crystal orientation, thus on deposition technique and growth conditions, as well as on post deposition treatments (e.g. annealing). While direct comparisons of ZnO:Al and ITO contacts for otherwise identical device stacks show only minor differences in performance [78], the higher thermal stability of ITO could be advantageous in certain circumstances (see section 2.4). ) for different buffer layer materials, produced by chemical bath deposition (CBD), successive ionic layer adsorption and reaction (SILAR), spray pyrolysis or atomic layer deposition (ALD) methods. The table includes record and high efficiency devices with standard CdS buffer layer and alternative buffer layers compared to CdS ('CdS ref'), if data is available. Data is given for CZTSSe, CZTSe, and CZTS-based devices with or without anti reflective coating (ARC). The stated band gap energies (E g ) are derived from quantum efficiency measurements reported in the respective references. In cases in which not all information was given in the cited sources, the cells in the table are intentionally left blank.

Window layer
Buffer deposition method Buffer material

CdS buffer layers by chemical bath deposition (CBD)
A CdS layer prepared by CBD is still the standard buffer used in the record devices for all compositions of CZTSSe as seen in table 2. In the 12.6% device [6] and 11.6% CZTSe device [20] the CdS thickness was optimized to 25 nm, which is thinner than commonly used. For the CZTS record of 11% [25], a 50-60 nm thick CdS was used followed by an annealing step in N 2 . In all three cases, a ZnO/ITO contact stack was used on top of the CdS.  [120][121][122][123][124] (see [128] for more details on the methodology). The red symbols represent alignment data based on the direct determination of the VBO (by UPS or XPS) and an estimated CBO derived by adding the difference of the optical band gaps (ΔE g ) of CdS and CZTSSe to the VBO [125][126][127]. Note that the accuracy of this estimation strongly depends on the assumption that the optical bulk band gaps of the involved junction partners is the same as the electronic band gaps at the surface/interface. At least for CZTS kesterites [120,129], it has been shown that this assumption is legitimate (which is in contrast to that which has been reported for high-efficiency chalcopyrite absorbers [130]). Finally, the blue symbols indicate the energy level alignment according to density functional theory calculations [93].

Energy level alignment at the kesterite/CdS interface
Note that there is quite some energy level alignment data reported for the interface between CdS and S-free CZTSe as well as Se-free CZTS absorbers, but only one data point for the kesterite/CdS junction with an intermediate Thus, either the CdS material properties were completely different (p-type instead of n-type) or the thin (5 nm) CdS layer was not sufficiently thick for the fs-UPS measurements to prevent the VB edge of the underlying CZTS absorber to impact the E V determination. Another explanation could be that the pump-probe approach might result in an overestimation of CBO if the surface/interface is particularly defect-rich causing a Fermi level pinning [132]. Indeed, while the interface-induced band bending (iibb, see [128]) is found to be>+0.4 eV [122,124] for the CZTSe/CdS heterojunction, iibb seems to be limited to (0.0±0.1) eV [120] for the CZTS/ CdS interface. This indicates that, while the Fermi level can to some extent move freely upon the deposition of CdS at the interface to the S-free kesterite absorber, it seems to be pinned at the CZTS/CdS interface. This explains the observed VBO and CBO agreement for the CZTSe/CdS and the disagreement for the CZTS/ CdS case.

The large negative VBO found for all CZTSSe/CdS interfaces independent of the absorber [S]/([S]+[Se]
) composition is beneficial for the solar cell performance as it acts as hole mirror preventing holes migrating into the emitter (where they would recombine). In contrast, the CBO changes from being positive for low S contents (i.e. the E C of CdS is above that of the absorber, also known as a 'spike-like' CBO) to be negative for high [S]/([S] +[Se]) ratios (i.e. the E C of CdS is below that of the absorber, also known as a 'cliff-like' CBO). According to device simulation for chalcopyrite TFSCs [133][134][135], the CBO range that is compatible with high-efficiency devices is (−0.1 to +0.3) eV, indicated as green hatched area in figure 4. If the CBO is lower than −0.1 eV, the probability to form a high-rate charge carrier recombination path across the cliff-like interface increases. Similarly, a large spike-like CBO of >+0.3 eV will increasingly limit device performance due to becoming an energetic barrier for electron transport. As can be seen in figure 4, most of the CBO data points are outside of the acceptable CBO range, especially for the CZTS/CdS heterojunction. However, it seems that for CZTSSe absorbers with low/intermediate

Chemical interface treatments of the heterojunction
Even if the champion kesterite solar cells reported until now use CdS as standard buffer layer, there are several studies showing large effects on device performance upon different interface treatments such as absorber etching or annealing of the absorber/buffer heterojunction or the whole device stack. Selective etching of secondary phases from the kesterite surface is commonly used. For example, potassium cyanide (KCN) is used to remove Cu 2−x S-phases; KMnO 4 , H 2 SO 4 and Na 2 S have been used to remove ZnSe [136]; and aqueous ammonia can be employed to remove surface oxides [137]. Most of these treatments can also remove Na-compounds from the kesterite surface. For CZTS, a correlation between effective removal of Na 2 S by KCN etching or oxidation followed by rinsing, and more uniform CdS growth was shown [138]. Etching could also influence the CZTS surface properties, and an increased surface band gap was for example reported for Cu-poor CZTS after KCN etching [139].

Annealing of the heterojunction
Annealing at temperatures around 100°C-400°C before or after buffer layer deposition has shown strong impact on device performances as seen in table 3. While certain effects from such annealing could be linked to the order-disorder transition in bulk CZTSSe with critical temperature at around 260°C or 200°C for the pure sulfide (CZTS) or selenide (CZTSe) compound, respectively [140,141], this needs to be monitored and decoupled from other annealing induced effects for better understanding. For example, V OC and J SC variations can be related to order-disorder induced variations in the band gap energy of the absorber, which can reach 200 meV in CZTS [142] and 110 meV in CZTSe [141]. However, since this is a bulk effect, covered in other contributions of this special issue, it will not be discussed in depth here. Annealing of the absorber layer in air prior to buffer layer deposition has been shown to improve device performance by several groups [137,[145][146][147][148]. Sardashti et al [137] performed annealing in air at 300°C-400°C, followed by etching in NH 4 OH to achieve high performance devices (note that the performance of reference cells without air anneal was not given). The benefit of the air anneal was ascribed to the passivation of GB by SnO x and a reduced Cu content. In a comparison of air annealing treatments of bare CZTS and CZTSe absorbers, Zn-enrichment was seen after NH 4 OH etching in both cases, while removal of elemental selenium was only observed for CZTSe [146]. Higher annealing temperatures were beneficial for the selenide absorber and the efficiency improvements were also larger for CZTSe cells.
Annealing in N 2 at different temperatures has also been used to improve device performance. An optimum temperature of 200°C was found for the annealing of CZTSSe. The improved device performance was ascribed to an increased photoluminescence intensity and an increased carrier concentration, i.e. probably related to improved bulk properties [145]. In other studies using N 2 annealing of bare absorbers, degradation of device performance was seen for low temperature and improvement seen above 200°C [148] or 125°C [147]. Changes in Na distribution and carrier concentration were reported, again suggesting that at least part of the improvement is related to bulk properties.
Annealing after buffer layer deposition, or of the full device stack, has also shown improvements. Tajima et al have studied annealing and the compositional distributions at CZTS cell interfaces by using atom-probe tomography [149] suggesting annealing-induced Cd diffusion into the CZTS layer. A segregation of Zn at the CZTS/CdS interface, and a change of oxygen and hydrogen concentrations in the CdS layer depending on the annealing temperature were also observed. Another study reported that annealing after the CdS deposition at 573 K improved the photovoltaic properties of CZTS cells (table 3), presumed to be due to the formation of a heterophase epitaxial junction between a solid-solution of Cd 1−x Zn x S and CZTS and the elimination of Cd(S, O, OH) [149]. The same group has investigated the effects of the CdS buffer layer thickness and annealing conditions on photovoltaic properties of CZTS cells. They showed that for 40 nm thick CdS layers that were post-annealed at 603 K, the J SC of respective cells improved significantly. The best-performing cell exhibited a PCE of 9.4% as seen in table 3 [144]. The authors discussed that Cd diffusion from CdS into CZTS and Zn diffusion from CZTS into CdS during the annealing could improve the energy level alignment at the CZTS/CdS interface (see section 3.2). The main improvement was in J SC and FF, while V OC was slightly reduced as compared to the non-annealed case. Annealing of the full CZTS device stack at 160°C in N 2 to induce ordering of the CZTS resulted in severe FF loss and S-shaped J-V characteristics in addition to the expected reduction in J SC and increase in V OC due to increased band gap energy of the absorber [78]. The effect was reversible upon disordering of the devices and was tentatively ascribed to a blocking back contact barrier due to poor p-type doping of MoS 2 (see section 2.3).
Huang et al [143] have reported a novel diode laser annealing method as a post-sulfurization heat treatment on pure-sulfide CZTS, fabricated by sputtering deposition, with a CdS capping layer. After receiving an ultra-fast laser scan treatment, the crystallinity of the CZTS film was improved and the PCE of the laser-annealed device was increased from 4.6% to 5.6%. A J SC increase from 14.8 to 17.4 mA cm −2 after laser treatment was the main reason for this improvement [143]. The increase was connected to improved long wavelength collection as seen from quantum efficiency, i.e. probably related to improvements of the CZTS bulk properties. Laser annealing prior to CdS buffer deposition could also improve device performance, again mainly due to increased current and long wavelength collection. Lower laser doses had to be applied to samples with CdS capping layers since degradation of the CdS was observed for high doses (table 3).
Yan et al [25] have employed a post deposition heat treatment of the CZTS/CdS heterojunction aiming to reduce the heterojunction non-radiative recombination. They obtained sulfide CZTS solar cells with record efficiency of 11% for small area cells (0.23 cm 2 ) and 10% for a standard sized cell (1.11 cm 2 ) [25], see table 2. This Table 3. Influence of different post-deposition annealing treatments on device parameters. V OC , FF, J SC , and PCE values are reported for as deposited (in parentheses) and annealed devices. The results shown in the last row of the table indicate the performance after an ordering anneal compared to that after a disordering anneal (in parenthesis) at 300°C on a hot plate for 15 min.

Stack annealed
Annealing para-meters approach enables elemental inter-diffusion, leading to a Zn gradient within CdS and a Cd gradient within CZTS, as well as a Na accumulation and local Cu-depletion at the heterojunction. The approach also leads to the formation of new phases: Cd diffusion into the lattice of CZTS surface forms a thin layer of Cu 2 Cd x Zn 1-x SnS 4 while Zn diffusion into the CdS is suggested to form ultrathin Zn x Cd 1-x S. The authors also report the possible formation of a new phase of Cu 2-x Na x ZnSnS 4 (average x≈0.07) nanoclusters.
In the case of CZTSe, Neuchitzer et al [136] studied the strong influence of surface etching combined with post deposition low-temperature annealing of CZTSe absorbers, CdS buffer layers, and the CZTSe/CdS interface. A change in surface composition was seen together with an improvement in device efficiency from below 3% to up to 8.3% (table 3). In addition to changes in the Cu surface concentration, transmission electron microscope electron energy loss spectroscopy mapping showed a reduction of Cu in the GB after the annealing treatment. This annealing induced change towards a more benign composition of the GB could possibly explain the gain in V OC compared to non-annealed devices.
In summary, annealing of the kesterite absorber or heterojunction can significantly improve device performance, but the underlying reasons are in general not clear, and may be very specific for certain preparation routes. Effects like redistribution of alkalis (such as Na), oxidation, Cu-removal from GB, removal of secondary phases by combined annealing and etching, and intermixing at the heterojunction have all been discussed and could all have a significant impact on the electronic structure of the device stack and thus the device performance. Further dedicated studies to separate these effects and establish clear structure function relationships are crucially required.

Absorber doping as part of the interface formation process
Doping of the kesterite absorber by extrinsic elements such as alkali metals and indium have been employed and in some cases led to improved device performance. While this is not directly part of the properties of the contacts, the doping elements have in some cases been introduced as part of the buffer layer deposition process. One example is the demonstration of improved performance by an ultrathin layer of In 2 S 3 deposited on top of the standard CdS buffer layer, followed by brief annealing (seconds to minutes) at 250°C-300°C [106]. Significant diffusion of indium into the CdS buffer layer and the hydrazine-processed CZTSSe absorber was evident. This indium doping was claimed to be one reason for the observed increase of the carrier concentration in both, the buffer and absorber layer. This doping relieved the typically observed collapse of efficiency for temperatures below 200 K and V OC saturation with increasing illumination intensity, caused by the low conductivity of pristine CZTSSe [106].
In case of doping by alkalis, it is worth noting that if the kesterite absorber is synthesized via a wet-chemical route, the doping process can be relatively easy, because the alkaline element can be dissolved into the precursor solution using the desired quantity. On the contrary, when the kesterite absorber is synthesized by physical means, the alkaline doping process requires additional steps (pre or post deposition treatments), and the accurate control of the alkaline concentration is rather difficult [17]. Comparison of the pre deposition application of NaF, followed by high temperature selenisation, with post deposition application of NaF, followed by annealing at 300°C, showed a V OC and carrier concentration increase in both cases as compared to Na-free reference cells [150]. This is similar to CIGSe devices, where the beneficial effect from Na on crystallization at high temperature was decoupled from the beneficial effect on optoelectronic properties by using post deposition application routes of Na [151]. Sánchez et al have proposed an innovative alkali doping strategy for CZTSe. Different concentrations of alkali dopants Li, Na, and K were introduced into the CdS buffer layer during the CBD process that then diffused into the kesterite during a low-temperature annealing process. A complete composition analysis was carried out by combining XPS and SIMS that showed a clear incorporation of the alkaline elements into the CdS thin films, and their diffusion into the kesterite absorber. The diffusion of the alkaline elements depends on their atomic weight (Li<Na<K) and has a strong impact on the CdS morphology (coverage and bump-like defects) as well as its optical (transmission and bandgap energy) and structural properties. In addition, a large impact on the electronic properties of the devices was observed, including a strong modification of the charge-carrier density (from capacitance-voltage-measurements) which increased with increasing the concentration of the doping agent, confirming the effectiveness of this doping method, and resulting in a significant PCE enhancement reaching values up to 10.1% [18].

Cd-free alternative buffer layers
As discussed above, chemical bath deposited (CBD) CdS buffer layers have resulted, so far, in the highest device performance for kesterite-based TFSCs. This is similar to the case for CIGSe TFSCs even if the latest record of 23.35% is Cd-free [152]. There are several issues associated with the CBD-CdS buffer layer in terms of environmental impact. Additionally, it has a narrow bandgap of ≈2.4-2.5 eV that results in parasitic absorption of the incident UV photons, limiting device performance. In the case of S-rich absorbers, it also limits the device performance owing to the cliff-like CBO at the absorber/buffer interface as discussed above (section 3.2 and figure 4). Therefore, significant efforts have been devoted toward the investigation of Cd-free alternative buffer layers for kesterite-based TFSCs. In this regard, as seen in table 2, several research groups have already shown an enhanced device performance in the case of S-rich absorbers by replacing the CdS layer with larger band-gap Zn 1−x Sn x O y buffer layers.

ZnS-based buffer layers
The application of a CBD-ZnS buffer layer was reported by Nguyen et al [153] for CZTSSe-based monograin TFSCs reaching PCEs of 4.5% for a single layer of 10-25 nm ZnS buffer, which was very close to the performance of the reference cell with single layer CdS buffer (≈4.8%). However, a similar study with CBD-ZnS for CZTSSe TFSCs showed lower PCE of 3.84% as compared to the CdS-reference device (5.25%) [154]. The lower performance was possibly due to the difference in microstructure and compositions of the absorbers and/or the buffers. However, a sputter-deposited ZnS buffer layer showed an even lower PCE of 2.11% for CZTS-based TFSC [155].
A few ternary materials have shown potential as alternative buffer candidate material for kesterite-based TFSCs. They have the advantage of having (optoelectronic) properties that can easily be tuned by controlling their stoichiometry [156][157][158][159][160][161]. For Zn(O, S) buffer layers prepared by ALD, e.g. the S/O ratio can easily be varied. However, kesterite devices with ALD Zn(O, S) buffer layers have not yet shown high PCEs [156,159,160]. Recently, Zhang et al [157] fabricated CZTS-based TFSCs with ozone assisted photochemical deposited Zn(O, S) buffer layers having a band gap ranging between 3.3-3.7 eV, tuned by a variable ozone flow rate. A significant improvement in V OC was observed compared to that of reference devices with ZnS and CdS buffer layers, but the overall efficiency was low. Li et al [158] reported a large improvement in the performance of CZTSe-based TFSCs with CBD-Zn(O, S) buffer layers when they were treated with concentrated aqueous ammonia and subject to subsequent low-temperature annealing. A maximum PCE of 6.57% was achieved for the respective device (8.04% for the CdS reference device). These post-deposition treatments were performed to reduce ZnO and Zn(OH) 2 phases in the CBD-Zn(O, S) buffer layer. Successful demonstration of a Zn-based buffer layer by CBD was also reported by Hiroi et al for a CZTS submodule [114] and by Grenet et al for CZTSSe [105] as shown in table 2. Neuschitzer et al [162] demonstrated the application of CBD-ZnS(O, OH) for CZTSe TFSCs, which revealed a promising device performance due to higher J SC as compared to that of a cell with the standard CdS buffer layer.

Zn 1−x Sn x O y buffer layers
Improved device performances compared to CdS reference devices were observed for kesterite-based TFSCs with Zn 1−x Sn x O y buffer layers deposited by ALD. Primarily, an improved V OC resulting in higher PCE compared to CdS-based devices was achieved [53,108,147,163]. The precise tuning of the band gap and (thus presumably) CB position by varying stoichiometry and deposition temperature during the ALD process of Zn 1−x Sn x O y [164,165] was the key factor for excellent device performance. A reduction in interface recombination is ascribed to a favorable CB alignment with the optimized Zn 1−x Sn x O y buffer layer [166]. Recently, Cui et al [53] reported a PCE of 9.3% for CZTS-based TFSCs with ALD-Zn 1−x Sn x O y buffer layer with an improved V OC (720 mV) as compared to that of the CdS reference cell (PCE=6.9%, V OC =652 mV). Similar improvement was also obtained by Li et al [108] for CZTSSe-based TFSCs with a PCE of 8.6% as compared to 8.14% PCE for the CdS-buffer device. The highest efficiency using ALD Zn 1−x Sn x O y buffers for CZTS of 9.7% was reported by Larsen et al [118]. In that study, solar cells based on ordered CZTS were compared to devices made from non-ordered CZTS. For non-ordered CZTS the record PCE of 9.7% using ALD-Zn 1−x Sn x O y was achieved (with ARC). As shown in table 2, the improved PCE originates from improvements in V OC , J SC , and FF. For the cell based on ordered CZTS, a V OC of 809 mV was achieved with the CdS buffer as compared to 778 mV using Zn 1−x Sn x O y . The reason why the use of Zn 1−x Sn x O y did not result in improved V OC in the ordered case is not clear, but re-optimization of the Zn 1−x Sn x O y band gap might be needed due to the expected changes in the CZTS absorber upon ordering. The historical PCEs achieved for different kesterite-based TFSCs with Cd-free alternative buffer layers are plotted in figure 5(a), while the J-V characteristics in figure 5(b) show the Cd-free record device with a PCE of 9.7% using a Zn 1−x Sn x O y buffer layer.

In 2 S 3 -based buffer layers
In 2 S 3 is one of the most studied alternative buffer layers for different kesterite-based TFSCs [167,168,170,171]. Among various crystalline forms, the β-In 2 S 3 phase has a defective spinel structure that leads to a better stability and optoelectronic properties, in addition to a suitable interface formation with several emerging absorber materials [167,172]. CBD-In 2 S 3 was applied as buffer in CZTSSe-based devices giving efficiencies very close to that of the CdS [107] as seen in table 2. Other successful examples of CBD-In 2 S 3 were reported by Jiang et al [116] and Hirio et al [114], where annealing after buffer deposition was used to improve cell and submodule performance, respectively. Furthermore, a CZTSe device with In 2 S 3 buffer layer deposited by spray pyrolysis reaching a maximum PCE of 5.7% was reported [113], but no CdS reference cell performance was stated.

Metastability related to the front contact
The characteristics of the window layer and the interface it forms with the buffer is also of high importance for the optoelectronic behavior of the device. Indeed, at the buffer/window heterointerface crystalline defects are unavoidably formed that vary in density, charge, and energy position relative to band edges of the buffer material and are likely to induce so-called electro-optical metastabilities. These metastabilities are due to light-dependent (wavelength/intensity) electronic transport, which results in J-V curve distortions compared to theoretically expected characteristics. According to Neuschitzer et al [173], the electro-optical metastabilities observed in CZTSe/CBD-CdS based devices are caused by negatively charged Cd-vacancies in the CBD-CdS buffer layer. In darkness, these compensating defects are assumed to induce an additional barrier for carriers at the CZTSe/CdS interface, which results in increased R S values. When such a device is illuminated with low energy photons (i.e. not enough to photo-excite CdS), the observed distortion in the J-V curve is called a 'red-kink', and results from blocking of the photo-generated electrons from the absorber. One should notice that this phenomenon was first observed in chalcopyrite/CdS-based devices and ascribed to be due to a too low doped buffer layer [174]. This electron blocking phenomenon is strongly reduced when the CZTSe/CdS device is illuminated with white light (i.e. containing photons of energy higher than 2.4 eV): then, the J-V curve appears to be much closer to what is theoretically expected. A possible explanation is that most of the acceptor-like Cd vacancies are neutralized by the photo-generated holes in the buffer. Such wavelength-dependent electronic transport is reversible, meaning that when the device remains in darkness for some time, Cd vacancies turn into negatively charged defects again. Since such metastable defects are strongly influencing the device operation, and thereby the photovoltaic parameters of the solar cells, the community has defined parameters enabling a qualitative estimation of these defects; the most commonly used is the so-called J-V cross over. To minimize these metastabilities, many studies are devoted to the formation of interfaces and/or buffer layers free of compensating defects. The CdS buffer  [53, 114-118, 147, 167, 155-157, 166], CZTSe [112,113,168,158,169], and CZTSSe [105-108, 158, 153, 154, 159]. (b) J-V characteristics of the champion Cd-free CZTS/Zn 1−x Sn x O y TFSC with ARC. layer is generally prepared by CBD, resulting in a very defective material including significant amounts of O, OH, and other impurities such as C, or N [175]. The actual composition, crystal structure, and morphology and hence the optoelectronic properties of the buffer that ultimately result in the metastabilities described above depend on many experimental parameters (e.g. bath temperature, choice of chemical precursor, K). In order to optimize cell performances and control those metastabilities, Neuschitzer et al [173] compared CdS prepared from different Cd precursors. The use of Cd nitrate instead of Cd sulfate results in slower growth kinetics, S-rich composition and suppressed metastabilities. Choubrac et al [176] studied the impact of bath temperature and deposition duration on CdS growth mechanism on Ge-kesterite absorbers. The main observation is thatconsistent with studies performed on different substrates [177,178]-after an initial induction/coalescence step, two different growth mechanisms are in competition, namely the ion-ion growth and the cluster deposition. While ion-ion growth results in stable (or non-metastable) solar cells, significant red-kink and crossover phenomena are observed concomitantly in the J-V curves of cells for which the buffer was grown in the cluster deposition regime.
Electro-optical metastabilities are not observed exclusively in kesterite cells buffered with CBD-CdS. Indeed, when applying Zn(O, S, OH) buffer layers, Grenet et al [105] observed almost no photovoltaic effect before light soaking (LS) but final efficiencies of 5.8% after LS of tens of hours were reached (compared to a PCE of 7.0% for the CBD-CdS buffer reference). They attributed this strong metastability to the presence of an electron barrier at the CZTSSe/Zn(O, S, OH) interface. They further proposed that the LS lowers but does not completely suppress this barrier, which explains the limited performance compared to the CdS reference. Following those observations, Neuschitzer et al [173] tuned the anionic content of the Zn(O, S, OH) buffer and showed that a reduction of the S-content in the buffer suppresses metastabilites after LS. Interestingly, they nonetheless achieved the highest efficiencies after LS for cells (based on absorbers with high S-content) exhibiting significant metastabilities. This points to the presence of photoactive defects (likely negatively charged acceptor-like states related to S) in the Zn(O, S, OH) buffer.

Summary and conclusions
The contacts used in state-of-the-art kesterite solar cells are still very similar to those used for the more mature CIGSe TFSC technology; Mo back contact and CdS/ZnO/ITO or ZnO:Al front window layer stack. Looking in detail, however, several unique features can be observed for kesterite-based devices. One is the high chalcogen pressure needed during the formation of CZTSSe, causing extensive formation of Mo(S, Se) 2 unless barrier (inter)layers are employed. Nevertheless, cells exhibiting thick Mo(S, Se) 2 layers do reach the highest efficiencies reported for kesterite-based TFSCs. While alternative back contact stacks have shown improved performance in separate studies, these contacts have not yet resulted in record PCE devices. From a chemical point of view, the back contact also influences diffusion of, e.g. sodium from the SLG substrate into the kesterite absorber. The use of interlayers has in some cases resulted in an increased Na transport into CZTSSe, but we note that if this is due to mechanical defects, poorly controlled non-uniformities might arise. In any case, further attention should be paid to this matter to ensure that blocking of the Mo(S, Se) 2 formation does not come at the expense of a uniform Na incorporation.
A relatively new topic for kesterite solar cells is transparent back contacts. ITO and FTO as back contacts have been employed and studied and while indium in-diffusion into CZTS was seen for ITO, FTO showed higher stability. Barrier layers such as thin Mo on FTO further improved stability and gave good front illuminated solar cells.
For the front contact, we have pointed out that record devices for CZTSSe, CZTSe, and CZTS employed a CdS/ZnO/ITO emitter with reduced thickness as compared to most reports. For CZTS, a heterojunction anneal after CdS deposition is important in achieving the highest efficiency, promoting interdiffusion across the heterojunction and apparently transforming the CdS buffer into a Cd 1−x Zn x S-based layer in some cases. A review of published data on energy-level alignment at the CZTSSe/CdS interface shows that a beneficial alignment is expected for intermediate and low S contents of the absorber, while for higher S contents, a limiting cliff-like alignment is expected. This result indicates that CdS is a suitable buffer layer if employed on CZTSSe absorbers of that composition range, while other buffer layer materials might be required for S-rich absorbers.
Regarding alternative buffer layer materials, In 2 S 3 , ZnS-based, and Zn 1−x Sn x O y -based materials are the most studied. Only for Zn 1−x Sn x O y has superior CZTS-based device performance compared to CdS been reported. For In 2 S 3 -and ZnS-based buffer layers, relatively high device efficiencies have been shown, but only approaching and not exceeding the PCE of respective CdS reference cells.
Etching and annealing treatments are often an important part of front contact formation. Several different etchants such as KCN and aqueous ammonia are used to remove secondary phases, oxides, and/or sodium compounds from the kesterite surface. A combination of etching and annealing treatments are used in several cases to reach highest device performance. The annealing can have several roles such as oxidation of GB (if performed in air), redistribution of alkali elements and inducing interdiffusion across the heterojunction, if performed after buffer layer deposition.
Finally, while CZTSSe devices in general are stable, metastable behavior is seen in particular for certain buffer layer materials or processes. Tuning of buffer layer deposition process parameters was shown to minimize this behavior in some cases.
Within the area of front and back contacts for kesterite TFSCs, several open questions remain. At the back contact, the energy level alignment is to a large extent unexplored. Since electrical properties of the Mo(S, Se) 2 layer depends strongly on orientation and possible extrinsic dopants that could arise from interdiffusion during absorber formation, studies of the energy level alignment of 'real-world' back contact/kesterite interfaces are crucially required for a detailed understanding and knowledge-based optimization.
Transparent back contacts are another area for which few studies have been reported so far. For this, and the application of barrier (inter)layers on the Mo back contact (to control the Mo(S, Se) 2 thickness), the development of methods that guarantee a uniform supply of sodium also needs further attention. For the front contact, a better understanding of the interface formation after heterojunction annealing treatments is needed, including their impact on energy level alignment. Comparative studies of different front contact stacks such as ITO, ZnO:Al, and combinations with or without i-ZnO, Zn 1−x Mg x O or other highly resistive layers are also scarce. For Cd-free buffer layers, Zn 1−x Sn x O y appears to be most promising, at least for CZTS. More studies are needed to clarify what the optimal Zn 1−x Sn x O y properties are for a given kesterite absorber deposition process, composition, or degree of order.
In general, as we have shown throughout this review, S-and Se-rich CZTSSe kesterites differ substantially in relation to optimal back-and front contacts. Despite the limited information available about actual Mo(S, Se) 2 properties in real devices, the Mo/MoS 2 /CZTS contact appears less favorable than for the Se-rich case. For the front contact, different interface annealing treatments are used to optimize CZTS and CZTSe based devices. Furthermore, the energy level alignment at the CZTSSe/CdS interface is only compatible with high PCEs for CZTSSe absorbers with a low to intermediate S-content. Future studies are required to gain further insight into the limiting factors related to the contacts of kesterite TFSC absorbers, in order to pave the way towards further insight-driven advancements.