Impact of crystalline defects in 4H-SiC epitaxial layers on the electrical characteristics and blocking capability of SiC power devices

In this study, we report the impact of structural 4H-SiC epitaxial defects on the electrical characteristics and blocking capabilities of SiC power devices. The detection and classification of the various crystal defects existing in 4H-SiC epitaxial layers and substrates was carried out with a commercial inspection tool using an optical microscope with a photoluminescence channel (PL). After the fabrication of dedicated test structures, devices that contain a single crystal defect were selected and electrically tested in reverse bias mode. Photon emission microscopy was performed to enable the localization of the leakage current spots within the devices. Thus, a direct correlation of the various crystal defects with the reduced blocking capability mechanism was made. This evaluation helps to set directions and build a strategy towards the reduction of critical defects in order to improve the performance of SiC devices for high power applications.


Introduction
In recent times, SiC technology gained great market attraction, due to its excellent performance in high power applications. It offers superior properties like a wide band gap, high thermal conductivity and a high breakdown electric field, compared to the well-established Silicon technology. Hence a benefit for lower power dissipation, smaller sizes and simplified cooling units of power converters can be achieved. All these properties highlight silicon carbide as suitable material for high-power, high-frequency and high-temperature applications [1][2][3][4][5]. Despite the rapid development, there is still a variety of crystal defects present in the SiC bulk substrate and epitaxial layers, as reported by several studies [1,2]. Even if some defects are known to be detrimental for the device performance and are considered as 'killer defects' (like particles, downfall and micropipes), the impact of many other crystal defects is still not completely understood. This needs to be overcome in order to assure device performance close to its theoretical limits. There exist several studies already, which report on the effect of SiC structural defects on the reverse characteristics of SiC power devices, however, the level of impact was found to be quite application specific and strongly dependent on the operating requirements [5][6][7][8][9].
We can distinguish SiC crystalline defects into two categories. Substrate defects, which propagate into the epitaxially grown layer, and defects formed during epitaxial growth. Among the first, threading dislocations (defects that propagate along the c-axis in [0001] crystallographic direction) like micropipes, threading screw and edge dislocations have been reported to impact the blocking capability of SiC devices. The majority of reports investigate the impact of those substrate defects mainly on Schottky barrier diodes (SBD) and p-n junction diodes (PNDs) [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19]. Micropipes were shown to cause pre-avalanche reverse-bias point failures in p-n junction devices, in already early studies [12]. Zimmermann et al, reported a 40% lower breakdown voltage for diodes with micropipes compared to defect free devices [13]. Despite the clear influence of micropipes, controversial results are reported for threading screw (TSDs) and edge (TEDs) dislocations, which dislocation Burger vector is smaller compared to micropipes. TSDs can reduce the breakdown voltage in p-n diodes of around 10%-30% as well as cause high reverse leakage current [9,14]. However, in some studies, no negative impact of TSDs on the diode performance was observed [1,[15][16][17]. It is known that surface pits can be formed at the location of TEDs and TSDs during epitaxial growth that are typically 3-20 nm in depth and can lead to a local electric field crowding [19]. However, Fujiwara proposed no negative effect of TDs when the formation of those macro-pits is suppressed [18].
Among defects that are formed during epitaxial growth, it is reported that triangular defects with a cubic 3C-SiC inclusion or 3-C like laminar region of several Si-C bilayers, affect the reverse characteristics and reduce the blocking voltage of SiC devices, because the bandgap is locally reduced [17]. A similar behavior was found for carrot-like defects [17]. However, other reports on diodes containing the same defect show no further degradation of the reverse current with time [20]. Controversial results were also found for in-grown stacking faults, where only one of the 4H stacking sequence is replaced by a deviating sequence. While Das et al and Konishi et al reported no deterioration of Schottky barrier diodes (SBD), Fujiwara et al showed that stacking faults of 8H-SiC type reduce breakdown voltage and increase leakage current near breakdown in diode structures [3,7,18].
In this work, we aim to make a direct correlation of the different defect types in 4H-SiC epitaxial layers and substrates on the blocking capability of electrical device. We selected devices which contain only a single type of crystalline defect and clustered them in two distinct groups with respect to the leakage current level: devices which show intrinsic and extrinsic behavior. Crystal defects were automatically detected using a commercial tool and we used photon emission microscopy (PEM) to exactly localize the position of the leakage current spot within the device and verify its correlation to the defect location. By combining these results with the observed reverse characteristics, we were able to exclude the impact of multiple defects per device and front-end device fabrication and study the impact of each defect type on 4H-SiC power devices.

Method
Commercial (0001)-oriented Si-face n-type 4H-SiC wafers with a 4°off-orientation towards the <11-20 > direction were used as substrates with grown epitaxial layers. The thickness of the epitaxial layer was in a range between 10-20 μm and the doping concentration, measured by C-V measurements was found to be in the range of 1 * 10 15 -1 * 10 16 cm 3 . Defects present in the bulk or epitaxial layer were localized and classified algorithmically by using an optical microscope along with a photoluminescence (PL) channel with a 660 nm long pass filter. The excitation wavelength is around 313 nm. The inspected wafers were analyzed with respect to defect classification. Using a virtual grid after the defect inspection step, enabled the assignment of the defects according to their coordinates to the specific chips. Afterwards they were used for the fabrication of dedicated test structures including an active area (p-n junction) and an edge termination extension. Therefore, p-wells were fabricated on the n-type drift layers, by the means of the ion implantation process with the doping concentration of 1 * 10 18 cm 3 . In order to allow current flow through the device with negligible voltage drop, the front-side and back-side ohmic contacts have been formed by physical vapor deposition (PVD) method followed by thermal anneal step. For a better understanding on the processing steps which were used for the fabrication of the test structures, a reference to already introduced devices is given [21][22][23]. The fabrication process was followed by electrical characterization in reverse mode (blocking characteristics). Based on the characterization results, the test devices were clustered on two distinctive groups: devices which show increased leakage currents and devices which show intrinsic behavior. In the next step, the reverse characteristics of all devices were recorded. In order to study the impact of the particular defect type to the reverse characteristics, devices with only a single defect type were selected. Only leakage currents exceeding the μA range were considered as significantly increased (at total electric field over the epi up to 1.4e6 V cm) −1 . Furthermore, backside Photon Emission Microscopy (PEM) after wafer thinning was carried out in order to localize the exact position of the leakage current spots within the devices. With PEM, photonic radiation from a defective site can be detected within the devices due to excessive heat generation. Thereby, the emission is detected by using highly sensitive cameras and obtain accurate information on potential failure positions.
In addition, surface defects were analyzed by Atomic Force Microscopy (AFM) after electrical testing and repreparation (delayering) of the device structure. After the PEM analysis, Confocal RAMAN spectroscopy was performed on triangular defects in order to define the SiC polytype at the area of the defect, using a laser that operates at 532 nm and a CCD-detector.

Results and discussion
The reverse characteristics of the selected devices containing only one single defect type are recorded, together with the reference device (defect-free) which shows intrinsic reverse behavior. The reverse leakage current was plotted as a function of the electrical field over the epitaxial layer (figure 1). We are referring to the average value of the junction depletion region. As known for silicon carbide power devices, the breakdown voltage of a device is given by the epitaxial thickness. By normalizing the voltage to the electric field, the results do not depend on a specific voltage class but a general statement can be given.
Six devices that contain a triangular defect similar to the one illustrated in figure 2 were evaluated. All triangular defects exhibit a similar surface optical appearance in visible channel (a) and a dark contrast when measuring with PL channel (b). The reverse characteristics of the six devices were measured at room temperature. It was found that all of them show early breakdown with clear ohmic behavior of the reverse current starting at very low voltages already. The leakage current was over an order of magnitude higher than that of the reference device, showing intrinsic behavior. The recorded I-V curve of one of the devices containing a triangular defect is plotted in figure 1.  All triangular defects are located in the active area (p-n junction) of the devices that have been investigated and only parts of some triangular defects were found to extend into the edge termination region. Similar I-V characteristics were found for those devices, indicating no dependency of the defect location within the device on the failure occurrence. By using photon emission microscopy in all samples, the position of triangular defects is found to match with the leakage spot position. While in some devices the spot was located at the apex of the triangular defect (nucleation point of the defect), some show the emission spots along the sides of the defect as shown in figure 3(a). The emission spot in figure 3(a) was detected at a reverse voltage of 200 mV already. Furthermore, emission spots were also found on devices with triangular defects located in the edge termination region of the device.
RAMAN spectroscopy was used to identify the crystal structure of three triangular defects under investigation. In figure 4, the RAMAN spectrum of the triangular defect presented in figure 2 is shown. A Raman peak appears at a wavenumber (Raman shift) of approximately 972 cm −1 . The spatial map of the Raman intensity at 972 cm −1 is also illustrated in figure 4. Since 972 cm −1 is the characteristic peak for the 3C-SiC polytype [24], this map confirms that the triangular defect has a 3C nature. The finding of a 3C crystal structure in triangular defects is in agreement to previous reported studies [25].
Twelve devices containing a micropipe defect were analyzed. An image of a micropipe defect is shown in figure 5. Only seven devices showed increased leakage current when applying very low voltages, one order of magnitude higher compared to the reference device showing intrinsic behavior. These devices show a similar behavior, compared to the devices containing a triangular defect. In the remaining five devices the micropipe was located in the edge termination region of the device. Thus, only micropipes located in the active p-n junction area lead to an early breakdown, as plotted in figure 6. Devices with a micropipe located in the edge termination showed no change of their reverse characteristics, also no leakage current spots could be detected with PEM.  While a clear trend of the reverse characteristics was observed for chips that contain triangular defects and micropipes, chips with stacking faults and carrot-like defects (figures 7(a) and (b)) showed high device-to-device variations. In contrast to the in-grown stacking faults (Shockley type) that can only be detected with photoluminescence, carrot-like defects exhibit a typical feature on the surface extending towards growth direction [11][12][13][14][15][16][17][18][19][20]. Carrot-like defect consists of either two stacking faults-one lying in the prismatic plane and the other extending towards the basal plane as illustrated in figure 7(d) or only of the prismatic plane SF [26,27]. The surface feature arises during epitaxial growth as signature of the stacking fault that lies in the prismatic plane. The shape and depth of the surface feature strongly varies in its optical appearance among the carrot-like defects. While in some defects a shallow groove is observed, others exhibit much deeper grooves on the surface. Threading screw dislocations (TSDs) can act as nucleation points for this type of defects [27].
Ten devices containing a carrot-like defect were analyzed. It was found that some devices containing a carrot-like defect show intrinsic behavior, while others show a significant reduction of the blocking capability. A large spread of leakage starting from a few nanoampere (nA) towards several microampere (μA) were recorded, as shown in figure 8.
Using PEM, leakage current spots could be detected in eight of the investigated devices. The emission spot was detected along the position of the surface feature in all of the samples as shown in figure 7(c). However, spots could only be found if located within the active p-n junction region of the device. In edge termination regions, no leakage spots could be observed. To investigate the impact of the surface feature depth in four carrot-like defects, Atomic Force Microscopy (AFM) was carried out after re-preparation of the device structure. It was found that the depth of the surface feature was in a range of 10 to 90 nm in all of the samples. In figure 9 the AFM measurement of the carrot-like defect presented in figure 7 is shown. The measurement was carried out on two different positions of the defects surface feature. A depth of 10 nm to 31.3 nm was found for position 1 and position 2, respectively. By correlating the depths of the defect's surface features with its electrical behavior in reverse mode, no correlation could be found for devices that show increased leakage currents compared to  devices that show intrinsic behavior. Thus, it is mainly the volume of the defect within the epi layer that contributes to the leakage current and not the defect´s surface feature.
The reverse-bias characteristics of twelve devices containing an in-grown stacking fault (Shockley type) were measured. While ten devices showed reverse characteristics similar to the reference device and no emission spots observed at the area of the defects with PEM, two devices showed low leakage current and a matching of the detected emission spots with the defect position. However, an increase in the leakage current was only observed at electric field level above 1 * 10 6 V cm −1 . In both devices, the stacking fault was found in the active p-n junction region. No emission was observed on those stacking faults, which were located in the edge termination region. Thus, stacking faults are not electrically active if located in the edge termination area. The measurements were repeated on a device with a higher stacking fault density in the active area, as shown in figure 10. Ten stacking faults within the device were detected by PL inspection. Two of the stacking faults matched with the leakage current emission spots within the sample, as marked with red circles. A slightly earlier breakdown at a high electric field applied was observed compared to the devices with a single stacking fault and the reference device, containing no defects. The above findings indicate that specific types of carrot-like defects and SFs might cause leakage current fails. However, further investigations are required in order to validate this assumption.
For all the above-mentioned defect types a correlation, in some cases more pronounced, could be found. The topography of a nano-scale pit in the optical microscope and in the PL channel is shown in figure 11. However, no clear correlation was observed for single nano-scale pits, which are associated with substrate threading dislocations. Even though, it has already been shown that the topology of this defect type influences the breakdown voltage and leakage current in SiC Schottky and p-n diodes [14,19,28].

Summary and conclusion
In this work, we studied the influence of five main crystal defect types that are present in 4H-SiC substrate and epitaxial layers on the reverse characteristics of high power SiC devices. By using Photon Emission Microscopy (PEM) the position of the leakage current spot within the device could be directly correlated with the defect location. It was observed that triangular defects that contain a 3C-SiC polytype inclusion lead to reduced blocking voltage and increased leakage currents, if located in the active p-n junction or in the edge termination area of the device. A similar behavior was found for micropipes, but only if located within the active p-n junction area. For carrot-like defects, high device-to-device deviations in the leakage current levels were found, not necessarily leading to a device breakdown. For devices containing stacking faults only few devices showed increase of leakage currents at voltage level close to the maximum for a given voltage class. Both carrot-like defects and stacking faults show only a correlation, in the case the defect is located within the active p-n junction area. Because of the inconsistent findings for carrot-like defects and stacking faults, a possible dependence on the difference in the microstructure among the underlying crystal defects was proposed. However, impurities might also play a role and should be investigated in future works. Furthermore, no influence of single nano-scale pits that are associated with substrate threading dislocations on the reverse characteristics of the devices were found.

Data availability statement
The data generated and/or analysed during the current study are not publicly available for legal/ethical reasons but are available from the corresponding author on reasonable request.