Selectively dry etched of p-GaN/InAlN heterostructures using BCI3-based plasma for normally-off HEMT technology

In this paper, an alternative selective dry etching of p-GaN over InAlN was studied as a function of the ICP source powers, RF chuck powers and process pressures by using inductively coupled plasma reactive ion etching (ICP RIE) system. A recipe using only BCI3-based plasma with a resulting selectivity 13.5 for p-GaN in respect to InAlN was demonstrated. Surface roughness measurements depending on the etching time was performed by atomic force microscope (AFM) measurement and showed that a smooth etched surface with the root-mean-square roughness of 0.45 nm for p-GaN and 0.37 nm for InAlN were achieved. Normally-off p-GaN/InAlN HEMT devices were fabricated and tested by using the BCI3-based plasma we developed.


Introduction
InAlN is a lattice-matched and strain free barier layer in InAlN/GaN high electron mobility transistors (HEMTs) that is enhanced the polarization and makes InAlN/GaN HEMTs more attractive than AlGaN/GaN devices in high frequency and high power applications [1][2][3].
InAlN/GaN HEMTs are normally depletion mode (D-mode) or 'normally-on' devices due to the nature of polarization charges. But p-GaN/InAlN/GaN heterostructure system are also used in HEMTs technology for enhancement-mode (E-mode) or 'normally-off' operation. E-mode devices are mostly preferred for safety in power electronics and simple RF and Microwave circuits architecture in power switch applications [4][5][6][7]. In p-GaN/InAlN/GaN normally-off HEMTs devices, all the p-GaN layer must be etched except the area under the gate without etching 1-8 nm thick InAlN layer. III-N materials have high bond energies that makes wet chamical etching too diffucult. So that dry etching technique is mostly preferred for selective etching of GaN over InAlN.
Previously in the literature, various gases such as CCl 2 F 2 [8], SiCl 4 :Ar:SF 6 [9] and SiCl 4 :SF 6 [10] are used for selective etching of GaN over InAlN. Sometimes depending on plasma conditions F ions formed by these gases are caused Al and AlF 3 non-volatile residuals on the InAlN surface. These by-products cannot be cleaned from the surface and cause a decrease in device performance by changing the structure of the surface. In this study, both to prevent this problem and to provide an alternative gas to the literature, BCI 3 -based plasma was used for selective etching of p-GaN over InAlN with a good surface roughness. According to our research in the literature, as far as we know, this is the first time to used and characterized BCI 3 -based plasma for selective etching of p-GaN over InAlN.
In this work, etch rate of p-GaN and InAlN were studied as a function of the ICP source powers, RF chuck powers and process pressures by using inductively coupled plasma reactive ion etching (ICP RIE) system. Surface roughness of p-GaN and InAlN depending the etching by the recipe obtained with the highest selectivity were performed by using atomic force microscope (AFM). Another group within NANOTAM tested the etching recipe by fabricating and DC characterizing of p-GaN/InAlN normally-off HEMT devices [11]. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.

Experimental procedure
The p-GaN, InAlN and p-GaN/InAlN HEMT structure were grown on a 2′ Si substrate in a low-pressure metalorganic chemical vapor deposition reactor (Aixtron 200/4 RF-S). Trimethylgallium (TMGa), trimethylaluminum (TMAl), trimethylindium (TMIn), and ammonia (NH 3 ) were used as Ga, Al, In, and N precursors, respectively [12,13]. The growth of the all samples were initiated with a AlN nucleation layer and then an AlGaN buffer layer on it. After that, 60 nm Mg-doped GaN layer with the hole concentration of approximately 3.0×10 17 cm −3 was grown for p-GaN etching rate studies. Consecutively 4 μm u-GaN and 60 nm In 0.17 Al 0.83 N were grown for InAlN etching rate studies. p-GaN/InAlN HEMT structure was grown to consist of the following layers, consecutively AlGaN back-barrier, GaN channel, AlN spacer, 8 nm In 0.17 Al 0.83 N barrier and 20 nm p-GaN cap. The cross-section of the three grown samples are shown in figure 1. All 2″ samples were cut into the 12×12 mm 2 pieces for etching studies.
Previous to the fabrication process the samples were prepared by an organic cleaning procedure, using acetone, isopropanol and deionized water. Suss Microtec MA6 mask aligner was used for optical lithography and AZ5214E photoresist was used for masking. Dry etching processes were performed in SI-500 Sentech ICP RIE system and etching depth measurements were performed in Veeco Dektak 150 surface profilometer. Both InAlN and p-GaN samples were etched at the same time with various ICP source powers, RF chuck powers and process pressures under BCI 3 -based plasma in order to maximize the selective etching of p-GaN over InAlN. It was tried to reach the maximum etching rate for p-GaN and the minimum etching rate for InAlN. In all etching processes, the BCI 3 gas flow was kept constant at 20 sccm. Surface roughness measurements of p-GaN and InAlN sample surfaces were performed in atomic force microscope (AFM) after the surfaces etching with the BCI 3 -based plasma-etching recipe with the maximum selectivity (Selectivity=etch rate of p-GaN/etch rate of InAlN). After finding the etching recipe with the maximum selectivity, p-GaN/InAlN normally-off HEMT devices were fabricated and DC characterized to test this recipe by another group within NANOTAM [11].
The fabrication process for p-GaN/InAlN normally-off HEMT devices started with ohmic contact formation. At first all the p-GaN cap layer was etched until the top of the InAlN layer in the drain-source regions by using the BCI 3 -based plasma-etching recipe and then a Ti/Al/Ni/Au metal stack was deposited. The metal stack was annealed in a nitrogen atmosphere at 875°C for 30 s. Mesa etching was performed with the Sentech ICP RIE system by using Cl 2 /BCl 3 plasma-based dry etch. Suss Microtec MA6 mask aligner and AZ5214E photoresist were used for optical patterning the gate foot region of the devices. The gate length, L G , is 1.5 μm, and the gate width, W G , is 100 μm. The source-to-gate, L SG , and the gate-to-drain, L DG , spacings are 1.75 μm. Gate feet regions were deposited with an Ni/Au metal stack by using using an electron beam evaporator system (EBE) with thicknesses of 50 and 300 nm, respectively. Then, a Ti/Au metal stack with a total thickness of 1.1 μm was deposited as an electrical contact pads. After this step, except for the p-GaN layer under the gate contact, all the p-GaN layer between drain-source was etched until the top of the InAlN layer with the BCI 3 -based plasmaetching recipe. The use of a p-GaN layer under the gate contact causes the raising the conduction band and enables normally-off operation [11]. However, if the p-GaN layer between the drain-source is not etched, it also causes a decrease in the current and power density for the normally-off HEMT devices due to the same effect. To prevent this, except for the p-GaN layer under the gate contact, all the p-GaN layer between the drain and the source was etched. Finally, a 200 nm SiN layer was deposited as a surface passivation layer using the plasma enhanced chemical vapor deposition (PECVD), and the fabrication process was completed with this last step. Figure 2 shows cross sectional representation and optical microscope image of the fabrication completed normally-off p-GaN/InAlN HEMT devices [11].

Results
p-GaN, and InAlN etch rates and selectivities are shown in figure 3 as a function of process pressure in a BCI 3 -based plasma. The process pressure was changed between 0.5-10 Pa while the other parameters were fixed to constant values. ICP source power and RF chuck power were fixed to 50W and 30W, respectively. The etching rate and selectivity were changed randomly due to the change in the types of radical species produced in the plasma depending on the different levels of applied pressure. The maximum selectivity value was obtained as 6.1±1 at 7.5 Pa of process pressure value. At this pressure, the etching rate was found 4.7±0.5 nm min −1 for p-GaN and 0.77±0.08 nm min −1 for InAlN.
After obtaining the maximum selectivity value at 7.5 Pa, the process pressure and the RF chuck power values were fixed to 7.5 Pa and 30W, respectively, and the effect of the change in ICP source power value on the p-GaN, and InAlN etching rates and selectivity were investigated. The ICP source power was changed between 0-200 W. Figure 4 illustrates this situation.
As the ICP source power increases, the amount of ions produced increases. However, an increase in the amount of ions will affect the amount of collision of ions with each other and the physical and chemical  interaction of these ions with the material surface. As seen in figure 4, the etch rates of GaN and InAlN materials at different ICP source power values varied depending on the number of ions produced at different ICP source power values and the interactions of these ions with the surface. The selectivity increased with the increasing of the ICP source power and reached a maximum with a value of 13.5±3 at 100 W but then decreased again after this power value. At this value, the etching rate was found 5±0.5 nm min −1 for p-GaN and 0.37±0.04 nm min −1 for InAlN.
Thereafter, the process pressure and the ICP source power values were fixed to 7.5 Pa and 100W, respectively, and the effect of the change in RF chuck power value on the p-GaN, and InAlN etching rates and selectivity were investigated. RF chuck power was changed between 30-200 W. This is seen in figure 5. As the RF chuck power increases, the energy of the ions increases and types of radical species generated change. Chemical  and physical response of p-GaN and InAlN materials to these radicals generated at different applied RF chuck power varies, which causes the etch rates of p-GaN and InAlN materials to change at different RF chuck power values. As seen from figure 5, the selectivity decreased with the increasing of the RF chuck power. The maximum selectivity value was obtained as 13.5±3 at 30 W of the RF chuck power value.
As can be seen from the figures above, the maximum selectivity with a value of 13.5±3 while the p-GaN etching rate was 5±0.5 nm min −1 and InAlN etching rate was 0.37±0.04 nm min −1 could be obtained at the values where the process pressure, the ICP source power, the RF chuck power, and the flow of BCI 3 gase were 7.5 Pa, 100W, 30W, and 20 sccm, respectively. After obtaining the maximum selectivity value, the surface roughness variation of the p-GaN and InAlN layers depending on the etching time was investigated in the mentioned plasma parameters. Figure 6 shows the change in surface roughness depending on the etching time for p-GaN and InAlN surfaces was examined using tapping mode AFM for an area of 3.0×3.0 μm 2 . Figure 7 shows the AFM images of the p-GaN surface for 5 min etched time and the InAlN surface for 1 min etched time.
Within the scope of p-GaN/InAlN normally-off HEMT device fabrication, the etching time for the 20 nm thick p-GaN layer is 5 min with the over etch time (4 min for etched 20 nm p-GaN and 1 min for over etched). During this period, the surface roughness value for the p-GaN layer etched with the mentioned process parameters was obtained 0.45 nm. For the InAlN layer, which is not required to be etched within the scope of normally-off HEMT fabrication, the surface roughness value was obtained 0.37 nm for 1 min etching time (this time is over-etching time for the etching p-GaN layer over InAlN layer in the process) . When figure 6 is examined, it is seen that the surface roughness decreases depending on the etching time. We think that this is due to induce the surface modification and also changed the particle size on the surface with respect to the etching time increases in our recipe, which is mostly chemical etching [14][15][16][17][18][19][20][21][22][23][24][25][26][27].
The use of a p-GaN layer under the gate contact causes the raising the conduction band and enables normally-off operation in p-GaN/InAlN HEMT devices. However, if the p-GaN layer between the drain-source is not etched, it also causes a decrease in the current and power density for the normally-off HEMT devices due to the same effect. To prevent this, except for the p-GaN layer under the gate contact, all the p-GaN layer between the drain and the source must be etched without etching the very thin InAlN layer and without damaging the surface. p-GaN/InAlN normally-off HEMT device fabrication and DC characterization were done by another group within NANOTAM and showed that the developed BCI 3 -based plasma etching recipe was worked well [11]. DC measurements were performed using a parametric semiconductor device analyzer. Figure 8 shows the I d -V g characteristics for HEMT devices before and after the etching of p-GaN between the drain-source and after the SiN passivation coating. The pinch off-voltage (V th ), using the extrapolation of the current at the maximum linear slope, increased from 1.3 V to 2 V after the p-GaN layer etching.
Drain current-voltage (I d -V d ) characteristics of HEMT devices before and after the etching of p-GaN between the drain-source and after the SiN passivation coating of the devices are shown in figure 9. The gate bias (V g ) was swept from 1 to 4 V in a step of 1 V and drain current-voltage (I d -V d ) characteristics were measured. As seen from figure 9, the drain current (I d ) increases from 0.4 mA mm −1 to 1.0 mA mm −1 after the etching of p-GaN between the drain-source, and to 1.3 mA mm −1 after the SiN passivation coating. Figure 9 also shows that the selective etching of p-GaN over InAlN were done successfully with developed recipe.
Using the developed recipe, the change in surface roughness depending on the etching time was investigated for p-GaN and InAlN surfaces depending on the etching time. The surface roughness values were measured as 0.45 nm and 0.37 nm, respectively, for p-GaN etched for 5 min and InAlN etched for 1 min It has been shown that normally-off p-GaN gate HEMTs based on the p-GaN/InAlN heterostructure fabrication can be performed successfully using the BCI 3 -based plasma recipe we developed [11].