CLIC vertex detector R&D

In order to achieve its primary objectives of heavy-flavour tagging and tau lepton identification, the CLIC vertex detector must precisely reconstruct displaced vertices. This requires accurate determination of the impact parameter and charge of tracks originating from the secondary vertex. Excellent spatial resolution must therefore be provided down to low polar angles, whilst maintaining low occupancy, low mass and low power dissipation. These requirements challenge current technological limits, and demand a broad programme of R&D. A detector concept is currently under development, comprising a hybrid pixel detector of small-pitch readout ASICs implemented in 65nm CMOS technology (CLICpix) combined with ultra-thin sensors. The readout chips are low-power, and power-pulsing is used to reduce further their power dissipation. This enables a forced gas cooling system in the vertex detector region. In this paper, the CLIC vertex detector requirements are reviewed and the current status of R&D on sensors, readout, powering, cooling and supports is presented.


Introduction
The Compact Linear Collider (CLIC) is a possible future electron-positron collider, which would employ two-beam acceleration to achieve a centre-of-mass energy up to 3 TeV [1]. This high energy, coupled with a luminosity of the order of 10 34 cm −2 s −1 , would enable a varied programme of precision measurements of top, electroweak, Higgs and possible New Physics beyond the Standard Model [2].
The linear nature of the collider dictates short, intense trains of colliding bunches. Trains of 312 bunches are foreseen with 0.5 ns between each bunch, resulting in a train duration of 156 ns. Trains are separated by 20 ms. To achieve the desired luminosity, bunches of σ (x,y,z) = (40 nm, 1 nm, 44 µm) are envisaged.

Detector environment and design
The dense bunches of electrons and positrons will radiate strongly in each other's presence, producing beamstrahlung photons which can interact and create beam-induced backgrounds such as electron-positron pairs. These backgrounds exist predominantly at low angle and have low transverse momentum, and are therefore mostly contained within the beam-pipe. However, their presence affects the inner region of the vertex detector. In order to maintain a manageable occupancy of -1 -less than 3% (including a safety factor of 5) in the innermost silicon sensors, the minimum radius is restricted to ≈ 30 mm from the beam-axis [3].
A second beam related process, γγ → hadrons, causes significant backgrounds in the central part of the detector, with 3.2 events of this kind occurring on average per bunch-crossing at 3 TeV centre-of-mass energy. The desire to perform precision physics in this challenging environment has inspired a varied programme of detector R&D.
Reconstructing events using the particle flow technique [4,5] is central to the design of the detector. This leads to highly granular electromagnetic and hadronic calorimeters, both of which are inside a 4 T-5 T superconducting solenoid. To minimise the radius of the magnet coil and cryostat, tungsten is used as an absorber in the electomagnetic and hadronic calorimeter barrels. Tracking is performed by a fully silicon-based system of pixels (in the vertex detector) and strips (in the outer tracker). Penetrating particles are tracked outside of the magnet by the instrumented steel return yoke. The forward regions of the detector are a complex arrangement of low-angle calorimeters, the beam-pipe and supports, and the final beam focusing elements.

Vertex detector requirements
The vertex detector is designed to provide efficient tagging of heavy quarks by precisely measuring the positions of displaced vertices. To achieve this, a multi-layer barrel and endcap pixel detector is planned. Ladders will form barrel layers at radii between 30 mm and 80 mm. Endcap discs mounted around the beam-pipe will extend to ±830 mm in length. The pixel sensors should provide a singlepoint resolution of 3 µm.
As the innermost sub-system, the vertex detector has the most strict requirements on the material budget: 0.2% of a radiation length (X 0 ) per layer is the target (equivalent to around 200 µm of silicon). This means that a forced-air cooling system is favoured over active cooling elements. For this to be feasible, power-pulsing of the vertex detector electronics will be necessary to limit the amount of heat dissipated in the sensor region to 50 mW/cm 2 .
In order to mitigate the effects of the beam-induced backgrounds, time slicing of the data should be available to a granularity of 10 ns. This allows events of interest to be pin-pointed within the bunch-trains, which are recorded in their entirety via a triggerless readout.

Vertex detector geometry optimisation
The geometry of the vertex detector has been studied using flavour-tagging performance as a benchmark [6]. Two models were compared; the first comprised 5 single-sided layers in the barrel region and 4 single-sided spiral endcap layers, each layer contributing 0.11% X 0 . The second model comprised 3 double-sided layers in the barrel and 3 double-sided layers in the endcap, each double-sided layer contributing 0.18% X 0 . These two models showed a very similar flavour-tagging performance (see figure 1a). A second comparison was made, between the double-sided model and the same model in which each double-sided layer contributed 0.4% X 0 . This showed a clear degradation of performance for the heavier model (see figure 1b) which justifies the strict material budget goals of the design.

Thin sensor assemblies
Hybrid planar pixel technology is foreseen for the vertex detector, requiring that silicon sensors and readout chips are bonded together. The goal for the CLIC vertex detector is to use 50 µm thick sensors and 50 µm thick ASICs. In total this accounts for around 50% of the material budget.
The pixel size is foreseen to be 25 µm × 25 µm. This should enable charge sharing, which in combination with analog readout will improve the single-hit resolution. In order to reduce dead space and improve tiling, sensors will have thin edges and will make use of Through-Silicon-Via (TSV) technology. This provides a vertical electrical connection through the chip, therefore removing the need for wire bonds. The feasibility of silicon assemblies including TSVs has been demonstrated by the Medipix and CEA-LETI collaborations [8].
The properties and performance of thin sensor assemblies have been investigated with testbeam measurements. A series of silicon sensors, with thickness between 50 µm and 300 µm, were bonded to standard 750 µm thick Timepix chips. One additional assembly comprises a 100 µm thick sensor bonded to a thinned 100 µm Timepix chip. The pixel size of the assemblies was 55 µm × 55 µm. Data were recorded at DESY, using a 5.6 GeV electron beam and the EUDET telescope [9].
The testbeam analysis allows measurement of the detection efficiency of the thin sensor assemblies, as a function of the energy threshold of the chip. It was found that a 50 µm thick sensor was over 99% efficient at an operating energy threshold of 405 DAC counts (see figure 2a). Efficiencies are not corrected for inactive regions. Uncertainties are statistical only and do not take into account possible effects from random telegraph signal noise [10], which could affect the efficiency by altering the effective threshold per pixel.
Two-hit clusters are formed when the charge induced by a track is shared between two neighbouring pixels. Figure 2b shows the positions within the pixel of those tracks which form two-hit clusters, showing that two-hit cluster tracks are located close to the border between two pixels. The resolution of two-hit clusters was measured using a charge-weighted position reconstruction method taking into account non-linear charge-sharing between pixels. The residual distribution, found from taking the difference in cluster centroid and the expected track position extrapolated from the telescope, has a width of approximately 4.8 µm (see figure 2c). The tracking resolution of the telescope was calculated to be 3.2 µm, meaning the resolution of two-hit clusters is approximately 3.6 µm. The results presented in this section are work in progress.

CLICpix readout ASIC
A bespoke CLICpix ASIC has been designed to better suit the requirements of the CLIC vertex detector [11]. This is a fast, low-power chip with a pixel size of 25 µm ×25 µm. It is implemented in 65 nm CMOS technology and provides simultaneous 4-bit time and energy measurements. Powerpulsing and data compression are supported, and it allows for time slicing at the 10 ns level.
A small 64 × 64 pixel CLICpix ASIC has been produced, and is under test at CERN [12]. Thus far, the characterisation of the chip has shown that measurements agree with expectations and simulations. The time over threshold gain has been shown to be uniform to within 4.2% RMS across the whole pixel matrix. Pixel-to-pixel threshold mismatch can be compensated by a perpixel 4-bit Digital-to-Analog Converter (DAC). A calibration algorithm measures the threshold value for the lowest and highest DAC values per pixel, allowing the threshold to be interpolated for the DAC range. From this, a DAC value is chosen for each individual pixel in order to equalise the effective threshold across the matrix. The results of the measurement can be seen in figure 3, before and after calibration. The calibrated spread across the matrix is 0.89 mV. This is equivalent to 22 -4 -  electrons, in comparison to an expected signal strength of about 3700 electrons from a minimum ionising particle in a 50 µm thick sensor.

Powering
To facilitate air-flow cooling, the CLICpix chips will be power-pulsed [13]. This will ensure a dissipation less than 50 mW/cm 2 in the sensor area.
Power-pulsing is enabled by the bunch-train structure of the colliding beams. Due to this, the detector only needs to be 'on' a fraction of the time. In the space between bunch-trains, the analog electronics can be turned off completely. Digital electronics are set to idle, except when the data is read out. This happens sequentially for the 12 chips per half-ladder (see figure 4).
Power will be delivered to the ladders from either end of the barrel. Controlled current sources will be located outside of the vertex detector region. Silicon capacitors mounted on each chip pro- vide local energy storage and low dropout regulators control the supplied voltage. Using silicon capacitors and thin aluminium flex cables helps to reduce the material inside the vertex detector region. With current technology, powering infrastructure would contribute 0.1% X 0 per layer. This is expected to reduce by a factor of two with projected improvements in silicon capacitor technology. Power-pulsing following the above scheme has been tested in a laboratory setup, using a constant current source, low-mass cables and a dummy load to simulate the half-ladder. It was found that the measured average power dissipation of the analog components was less than 10 mW/cm 2 , and of the digital components was less than 35 mW/cm 2 . This results in a total dissipation of less than 50 mW/cm 2 , in line with requirements.

Cooling
Despite power-pulsing the vertex detector to minimise the amount of heat dissipated in the inner region, the total heat load which must be removed by the cooling system is around 470 W. It is foreseen to extract this heat using forced air-flow cooling. A spiral endcap geometry at either side of the barrel will allow dry air at 0 • C to be blown through the detector. This has an advantage in terms of material budget, as this cooling system requires no pipes or cooling liquid.
Simulations have been performed in order to characterise the air-flow necessary to extract this amount of heat [14]. It was found that a mass flow of 20 g/s, with an average velocity of 6.3 m/s in the barrel, would keep the silicon temperatures below 40 • C (see figure 5). Validation of this simulation is under development using a thermo-mechanical test bench. This comprises an airtight channel of variable cross-section through which air is pulled by a fan at one end. A stave with a heating element is mounted on a turntable, to allow the angle to the air-flow to be adjusted.
With this set up, wind speeds, stave temperatures and stave vibrations can be measured to allow validation of simulations. Preliminary measurements show that stave temperature decreases asymptotically for increased air-flow. Air-flow perpendicular to the stave results in the most homogeneous temperature distribution, but the difference between this situation and air-flow at 45 • to the stave is small. These results are in good agreement with simulation.

Supports
The barrel ladders will be formed from carbon-fibre staves which are required to be less than 0.05% X 0 per layer. Using double-sided layers, comprising one support between two detection layers, would allow for 0.1% X 0 per support. Low-mass support structures are under development, to characterise their mechanical properties. This is of particular interest due to the expected vibrations induced in the supports by the air-flow cooling.
Prototypes of a variety of staves of dimension 1.8 mm × 26 mm × 280 mm have been produced, including sandwich staves filled with homogeneous or honeycomb foam cores and cross-braced staves. The staves range in mass from 3.74 g (0.121% X 0 ) for the full sandwich stave, to 1.76 g (0.051% X 0 ) for the stave with the least amount of cross-bracing. The flexural stiffness of the staves was measured across an 18 cm span. The stiffness was found to be roughly proportional to mass, and measurements agree well with simulation. To better understand the mechanical requirements of the staves, vibration measurements are planned using the thermo-mechanical test-bench. This will allow characterisation of the necessary stiffness of the staves.

Summary
The CLIC machine environment and physics requirements make challenging demands on the vertex detector, which must make precision measurements whilst complying with strict material limits. The layout of the detector is being refined, to optimise flavour-tagging and enable an air-flow cooling system. R&D is being performed into thin sensor assemblies. Recent testbeam measurements indicate that a single-hit resolution of ≈ 3 µm is achievable for two-hit clusters. Powering, cooling and support structures are all under design and test, with nothing thus far to suggest that a total material budget of 0.2% X 0 per layer is not achievable. Further research is planned in order to progress toward a detector design capable of making high precision measurements in the challenging environment of a future linear collider.