Performance and operation experience of the ATLAS SemiConductor Tracker

We report on the operation and performance of the ATLAS Semi-Conductor Tracker (SCT), which has been functioning for 3 years in a high luminosity, high radiation environment. The SCT is constructed of 4088 silicon detector modules, for a total of 6.3 million strips. Each module operates as a stand-alone unit, mechanically, electrically, optically and thermally. The modules are mounted into two types of structures: one barrel, made of 4 cylinders, and two end-cap systems made of 9 disks. The SCT silicon micro-strip sensors are processed in the planar p-in-n technology. The signals are processed in the front-end ABCD3TA ASICs, which use a binary readout architecture. Data is transferred to the off-detector readout electronics via optical fibres. We find 99.3% of the SCT modules are operational, the noise occupancy and hit efficiency exceed the design specifications; the alignment is very close to the ideal to allow on-line track reconstruction and invariant mass determination. We will report on the operation and performance of the detector including an overview of the issues encountered. We observe a significant increase in leakage currents from bulk damage due to non-ionizing radiation and make comparisons with the predictions. We will also cover the time evolution of the key parameters of the strip tracker, including the evolution of noise and gain, the measurement of the Lorentz angle and the tracking efficiency in the harsh LHC environment. Valuable lessons for future silicon strip detector projects will be presented.


Introduction
The ATLAS detector [1] is a general purpose detector at the LHC. It collects data from protonproton collisions at a rate of up to 40 million times a second. The inner detector tracks particles from the collision, recording their position at various distances from the interaction point. The inner detector is placed inside a solenoid providing a 2 T magnetic field, which allows calculation of particle momenta as their paths bend in the field.
The inner detector can be divided into three sub-detectors. The SCT (SemiConductor Tracker) is a silicon strip detector, and lies between the Pixel detector and the TRT (Transition Radiation Tracker) on the outside, together making up the inner detector. The SCT is described in more detail in section 2.
At the beginning of 2013 the SCT was shutdown at the end of the first LHC run. Section 3 describes the performance of the SCT during this first run period, including the early effects of radiation damage from the accumulation of over 30 fb −1 of integrated luminosity, particularly on leakage current. Also described are measurements of performance including the noise and tracking efficiency.
In section 4, operational parameters of the SCT are described in addition to some of the challenges faced. Finally, some of the upgrades in preparation for the next run period, starting in 2015 are described.
The SCT consists of 4088 detector modules, which are the smallest stand-alone unit of readout. These are arranged into 4 barrel cylinders and 2 end-caps each with 9 disks. Together they provide coverage up to a pseudorapidity of 2.5. The barrels are arranged in rows of twelve identical modules. The endcaps modules are arranged in three rings on each disk, and are known as the outer, middle and inner modules.
The detector wafers [2] are n-type silicon 285 µm thick. The strips are built up as p-type implants with 768 aluminium strips connecting the silicon to the readout. All of the barrel and the majority of the endcap wafers were manufactured by Hamamatsu [3], with 17.2% of the endcap wafers made by CiS [4]. A further source of variation is in the crystal alignment of the silicon. Most wafers are based on a ¡111¿ substrate but a small proportion in the barrel are ¡100¿.
In the barrel the strips are parallel and have a pitch of 80 µm. In the endcap the wafers are tapered, and come in 5 flavours. They have a pitch between 56.9 and 90.4 µm. For the barrel modules and the majoirty of the modules on the endcaps, four detector wafers are connected in pairs on each side of a module. In the endcaps, all of the inner modules and the modules in the middle ring of disk 8 have a single detector on each side, and so have shorter strips. Each side is offset by a stereo angle of 40mrad to provide greater resolution in the direction along the strip. Each module provides 1536 channels of readout for a total of 6.3 million strips.
The readout is provided by custom ASICs [5]. Each module has 12, each ASIC collecting charge from 128 strips. The charge is filtered and amplified and compared to a discriminator threshold. Binary hit information is then stored at the bunch crossing rate of 40 MHz into a pipeline for 3.3 µs. On reception of a level-1 trigger signal, the chip initiates readout of the data from the end of the pipeline. This involves compressing the data by reading out only the positions of the hit channels, suppressing the zeros.
Data collected by the chips is sent in 2 streams, one from each side of a module. The data is then sent over optical fibres to the counting room. Clock and command information is encoded on a single optical fibre to each module. In the counting room the back of crate cards (BOCs) handle the optical encoding and decoding to electrical signals which are sent to/from the detector readout drivers (RODs). These RODs aggregate the data from up to 48 modules and send it to ATLAS over high-speed serial optical fibres.

Alignment
The alignment of the SCT involves discovering precisely where the modules are in relation to each other and to the collision point.
The FSI (frequency scanning interferometer) system was built to watch for large-scale movements over time which can then be fed into the detector alignment. During operation, it has shown that the detector is stable at the sub-micron level over long periods, see figure 1. Excursions from the stable position are seen when temperature changes due to the cooling turning off and also when the magnetic field of the solenoid is turned off.  As the detector has been found to be stable, the detector alignment can be carried out using a large number of tracks. A global fit is run to minimise track residuals by introducing changes in geometry down to the module level.

Leakage current
The leakage current through the silicon wafers is measured by the high-voltage cards which provide the detector bias from the counting room. This has increased substantially over the run period. The Hamburg/Dortmund model [6,7] has been used to predict the changes expected as a result of the non-ionizing radiation dose from the integrated luminosity, and corrections to the annealing by changes in temperature. Figure 2 shows very good agreement between the the currents recorded in the barrel and the model, see ref. [8] for details. This indicates that the observed current is mostly generated in the silicon bulk. Leakage currents are higher when the beam is present. This is a small effect in the Hamamatsu detectors, see figure 3. In some of the CiS sensors the currents rise significantly during beam, an effect which is attributed to small differences in sensor geometry between the two manufacturers. Though not fully understood, the effect has been mitigated by reducing the sensor bias, both in stable fills, while still remaining depleted, and in between fills, when the detector is at stand-by voltage.

Noise
The detector noise and the gain of the front-end amplifiers are measured in calibration scans between physics runs. A charge pulse is generated on the front-end chip and injected into the amplifiers. The discriminator threshold is varied and the resulting hit occupancy recorded. This threshold scan results in an S-curve from which can be extracted the threshold at 50% and the output noise. Three injection charges are used, and a linear fit is made to find the gain. This is then used to find the noise at the input to the amplifier.
The variation in the resulting noise is shown in figure 4. The barrel layer 6 is at a higher temperature and hence has greater thermal noise. In figure 5, a comparison of the noise at the beginning and end of the run is shown. Most categories have similar noise. An increase of about 15% is seen in the end-cap middle ring detectors for the CiS detectors. An increase of about 5% is seen in the inner modules.

Lorentz angle
When the holes produced by a charged particle in the silicon detector drift towards the strip, they are under the influence of both the electric field produced by the bias voltage and the magnetic field generated by the solenoid around the inner detector. The effective angle by which the resulting track is deflected is known as the Lorentz angle, and used as input to the Monte Carlo simulations. This is measured by plotting the size of clusters seen as part of a track against the angle of the incident track. The Lorentz angle is the track angle at which this is a minimum, shown in figure 6.

Tracking efficiency
The intrinsic hit efficiency is the fraction of hits found when one is expected. In order to find this, tracks are found looking in only 3 out of 4 layers of the SCT. In order to be efficient, a hit should be found on the track in the other layer. Figure 7 shows the hit efficiency for each layer of the detector. Known bad modules and chips are removed from the calculation, but bad strips remain. This accounts for some of the variation between layers.

Pileup and occupancies
ATLAS is designed in anticipation of a mean pileup, µ, of around 25, which corresponds to an occupancy in the SCT of 1% with a factor 2 for safety. This expectation led to a design which determines the time taken to read out data serially from the modules.
-5 - In figure 8 are the recorded occupancies as the number of interactions (pileup) changes. The LHC has regularly generated data with a pileup of significantly over 30. In trial runs, the pileup was increased and this shows a linear increase in the occupancy.

Operations
In addition to the hit efficiency of the modules themselves, the other input to the overall SCT efficiency is from disabled modules and strips. This has been stable, with a few excursions, throughout the run, at just over 1% of the total number of strips.   Figure 9 shows the number of strips active during the run period. For most of the period, the 1% efficiency loss is dominated by disabled modules, which include 13 modules on one cooling loop which has been permanently disabled due to a leak. The number of disabled chips and of strips amount to, respectively, under 0.12% and 0.19% of the total strips. Transient excursions from this level include the loss of a cooling loop in the barrel (48 modules) and once in the end-cap (33 modules), and also a Tx plugin (12 modules).

Tx plugins
The Tx plugins are daughter cards of the BOC cards in the counting room. They generate the optical signals containing the clock and command data, which is sent to the modules. Each sends signals to 12 modules. There is redundancy in that the signal received by one module can also be used by its neighbour, under external control.
Since early in the life of the SCT, there have been failures in individual fibres of the Tx plugins. The rate of failure peaked at the end of 2010, around a few per week. As this is an off-detector part it can be replaced relatively easily, and this is practical in the longer periods between LHC fills.
Concern was raised about the precautions against electrostatic discharge (ESD) during production and a new series of Tx plugins were produced. However, the units continued to fail and after a series of investigations the ingress of moisture was identified as the most probable cause of the mass failures. All plugins were replaced at the end of 2010 with laser arrays from a new vendor. Since then the rate of replacements has been lower, around one or two per month.
Throughout this period, the effect on detector operation has been minimised by the use of a redundant connection to the module.
In order to reduce the continuing regular interventions, work has continued in order to understand the problem and during the present shutdown, a further upgrade will take place based on this understanding.

Expansion of off-detector DAQ
As described in section 3.6, the pileup in the LHC is higher than for the original design. In the next run period the pileup is planned to rise routinely above 50, with a possibility of 80 events per bunch crossing.
The bandwidth used to readout the SCT is proportional to the hit occupancy and to the level-1 trigger rate. By linear interpolation from lower pileup runs, it has been found that the limit for the links from the modules to the RODs at a 100 kHz trigger rate is around 87 pileup events at 7 TeV beam energies. Similar calculations for the link from the ROD put the limit around 35.
The opportunity has been taken in this shutdown to increase the number of RODs which are used to readout the detector, in doing so reducing the amount of data sent out from each ROD. In addition to a change in the scheme to encode hit clusters on the ROD, this means that the effective bandwidth into and out of the ROD will be similar.

Conclusion
The ATLAS SCT has performed very well in the first run period of LHC. Detector parameters such as the leakage current have been measured and found to be within predictions for the current integrated luminosity. Other measurements have been made and are used in simulations.
The conditions expected for Run 2 of the LHC, in particular the higher than expected pileup, have been considered. This leads us to be confident in the continued performance into the future.