A 50 ps resolution monolithic active pixel sensor without internal gain in SiGe BiCMOS technology

A monolithic pixelated silicon detector designed for high time resolution has been produced in the SG13G2 130 nm SiGe BiCMOS technology of IHP Mikroelektronik. This proof-of-concept chip contains hexagonal pixels of 65 {\mu}m and 130 {\mu}m side. The SiGe front-end electronics implemented provides an equivalent noise charge of 90 and 160 electrons for a pixel capacitance of 70 and 220 fF, respectively, and a total time walk of less than 1 ns. Lab measurements with a 90Sr source show a time resolution of the order of 50 ps. This result is competitive with silicon technologies that integrate an avalanche gain mechanism.

1 Fast, low noise SiGe electronics and sensor design for sub-100ps timing 1

.1 Introduction
Our previous researches [1] [2][3] [4] proved the feasibility of a fully-efficient monolithic pixel detector in SiGe BiCMOS technology with 100 ps RMS time resolution for minimum ionising particles (MIPs). The result of [4] was obtained with a simple design that integrated the pixel matrix inside the guard-ring, while keeping the electronics in the periphery of the chip and referring the substrate to ground. The 500 × 500 µm 2 area of the pixels of that chip, designed for the TT-PET project [5], was sufficient to utilise it without impacting the intrinsic resolution of positronemission tomography. That relatively-large pixel area resulted in a pixel capacitance of 750 fF that was limiting the noise performance of the front-end. Since Cadence Spectre simulations showed that the Equivalent Noise Charge (ENC) of the preamplifier implemented in that chip decreases linearly with the pixel capacitance down to 75 fF [3], we investigated the possibility for our SiGe BiCMOS frontend to achieve time resolutions below 100 ps, even in absence of an internal gain mechanism, simply by reducing the pixel capacitance.

Pixel matrix design
The reduction of the pixel capacitance requires to decrease the pixel size and reduce the signal routing distance to the preamplifier. In the prototype described here, realized in the SG13G2 130nm BiCMOS technology [6] of IHP, this is achieved by placing the electronics in triple wells inside the guard rings. Figure 1 shows the prototype chip. It contains two matrices of hexagonal pixels with side of either 130 or 65 µm and areas corresponding to square pixels of approximately 210 and 105 µm, respectively. The hexagonal shape of the pixels was chosen to increase the angles at the corners of the pixels, therefore reducing the electric field at the nearby surface and limit the risk of an early break-down due to the P-stop layer in the low-resistivity substrate. TCAD1 simulations were used to estimate the pixel capacitance, which resulted to be approximately 220 fF for the large pixel and 70 fF for the small ones, for a high voltage of 140 V that provides a depletion depth of 26 µm.

L3
L0 L2 L5 L1 L4 L6 S1 S0 S2 S3 Figure 1. Photograph of the monolithic chip prototype in SG13G2 IHP technology containing two matrices of hexagonal pixels. The larger-surface matrix is made of seven pixel of 130 µm side (pixels L0-L6) that share four outputs channels; pixel L3 and L5, in particular, are connected in OR to the same output driver. The second matrix, visible on the right, has nine 65 µm-side pixels, four of which (S0-S3) are connected to the front-end. The front-end electronics is placed in the region between the two matrices.
The top panel of Figure 2 shows a conceptual cross section of the detector. The P-doped substrate, in the technology standard resitivity of 50 Ω cm, is connected to the negative high voltage from the top surface outside the guard-rings and from the chip backside, while the pixels and the triple wells containing the electronics are referred to the positive low-voltage. During operation, the HV connection on the chip backside is AC coupled to ground. The chip was thinned to 60 µm to reduce the resistance in series to the preamplifier input circuit. Currents below 10 nA cm −2 were measured when the chip was operated at bias voltages up to 140 V to take the data presented here.
Probe-station tests showed that for HV ≈ 160 V or larger a current rising up to 700 nA appears after two or more days of continuous operation. This current disappears if the detector is powered off for several hours. After investigations, it was realised that this effect could be due to the very high electric field inside the shallow-trench insulation at the chip surface, which is caused by the necessity to deplete a low-resistivity silicon wafer 2. This current is too low to affect the noise of the pixel detector and impact its timing performance. The depth of the depletion layer is not controlled by a backside P+ implantation, but it is limited by the low resistivity of the wafer. This solution greatly simplified the production of this proof-of-concept detector, although it slightly degrades the uniformity of the timing performance due to the lower electric field at the boundary between two pixels. This effect is illustrated by the TCAD simulation shown in the bottom panel of Figure 2. (Bottom) TCAD simulation of the Electric field in the inter-pixel region of the sensor. The white line shows the boundary of the depletion region. The high electric field at the edge of the pixel will be reduced in future prototypes by the use of a higher-resistivity substrate.

SiGe HBT based front-end
The preamplifier design is based on the one developed for the TT-PET project [3], with minor circuital adaptations to increase the gain and allow for the placement inside a deep N-well. Figure  3 shows the ENC and gain of the amplifier as predicted by Cadence Spectre simulation.  The amplifier is DC connected to a CMOS-based open-loop 3-stage discriminator. The signal from the discriminator is sent directly to the output via a low-voltage differential driver. Both the Time Of Arrival (TOA) and the Time Over Threshold (TOT) of the amplifier output can be measured from the discriminated signal. Due to the limited number of I/Os available on the chip, the pixels share four output channels, as described in Figure 1. In order to be able to turn on/off single pixels, each of them has a dedicated discrimination threshold.

Experimental setup and calibrations
A 55 Fe radioactive source, that generates 5.9 keV photons, and a 109 Cd, that generates photons of 22 keV and 25 keV relevant for this study, were used to measure the performance of the preamplifier.
The measurement of the time resolution required the use of an LGAD detector [7] to provide a reference time. The LGAD was glued on a purposely-designed amplifier board, with a 1mmwide opening under the LGAD to let the electrons from a 90 Sr source reach our chip and enable a Time-Of-Flight (TOF) measurement (see Figure 4). The reference LGAD used for this test has a time resolution of 50 ps RMS [7]. To verify that the time resolution of the reference LGAD is not affected by the custom amplifier board, the TOF between two LGADs was measured using the same setup. Our measurement confirmed the time resolution found in the literature.

Performance of the front-end electronics
The left panel of Figure 5 shows the noise hit rate of the amplifier as a function of the discriminator threshold measured in the case of the small pixel S0 of Figure 1, both for a positive (above the baseline) and a negative threshold. The right panel of the same figure shows the noise hit rate for the large pixel L3. The noise hit rate measurements give an RMS voltage noise of 2.67 mV and 2.99 mV for the small and the large pixels, respectively. However, since the discriminator hysteresis acts as a filter, the actual RMS amplifier noise was obtained from Cadence Spectre simulations, and it is found to be σ V = 4.0 mV for the small pixels and σ V = 4.7 mV for the large ones.   of the amplifier noise and the charge gain it is possible to estimate the ENC as: which gives an ENC of 90 electrons for the small pixel and 160 electrons for the large one. This results is 30% higher than the CADENCE simulation. This discrepancy, generated by the measured values of A Q , could be explained either by a parasitic feedback capacitance of 1.5 fF in the amplifier circuit or by a lower voltage gain of the amplifier.

Time resolution
The electrons emitted by the 90 Sr source were used to measure the TOF between pixel L3 and pixel S0 of the prototype and the reference LGAD detector. For this measurement the output of the pixel under test was read by an oscilloscope with 25 Gs/s sampling rate and analogue bandwidth limited to 6 GHz. The remaining pixels were operated at low threshold and sent to a single channel of the oscilloscope to generate a tag signal for events with charge shared by the pixel under test and the neighbouring pixels. In the case of the large-pixel matrix, pixel L5, which shares the same output of L3, was masked. Data were taken at several threshold and HV values. The TOF values were calculated as: where t hexa is the time measured by the prototype chip and t LGAD is the time measured by the reference LGAD. The selection cuts applied to the LGAD to obtain the sample used for the TOF were the same used for the verification of its 50 ps time resolution. No event selection was applied to the data of the prototype chip under test. The left panels of Figure 7 show the time-walk corrections obtained for the small pixel S0 and the large pixel L3 at HV = 140 V and a threshold of 1400 and 2300 electrons, respectively. The maximum time walk is found to be less than 1 ns.
The right panels of Figure 7 show the TOF distribution for the same working points after time-walk correction. A non-Gaussian tail is observed for positive TOF values. This tail, present for all threshold and HV values, could be attributed to the electrons from the source crossing the region between two pixels and requires to be investigated in a testbeam. Gaussian fits to the time-walk corrected TOF distributions were performed to establish the time resolution of the core of the distributions. TOF times larger than +100 ps were excluded from the fits to avoid that the asymmetric tail alters the results. The time resolution of our monolithic prototype chip was calculated by subtraction in quadrature of the 50 ps time resolution contribution of the reference LGAD from the time-walk corrected TOF value. For the small pixel at the working point of Figure 7 bottom we obtain σ = σ 2 TOF − σ 2 LGAD = √ 68 2 − 50 2 = (46 ± 1) ps while for the large pixel at the working point of Figure 7 top the Gaussian part of the time resolution provides √ 74 2 − 50 2 = (55 ± 2) ps. In all instances the non-Gaussian tails were below 10 %. The negative mean value of the time-walk corrected TOF distributions is an artefact due to the fact that the time-walk corrections were calculated using all the events, including those in the tails. Figure 8 shows the time resolution of the prototype as a function of the discrimination threshold for the small pixel S0 and the large pixel L3 operated at HV = 140 V. For both pixel sizes the time resolution is measured to improve with increasing threshold. This observation could be explained by an improved resolution in the time-walk correction at high threshold values: the TOT, used to correct for the time walk, has a smaller error when the analogue signal crosses the discrimination threshold with a larger slope. Therefore, the present timing performance appears to be limited by the method selected to correct for the time walk.  Although the detection efficiency cannot be measured with the present experimental setup using a radioactive source, it is possible to verify that the threshold value is not cutting the measuredcharge distribution above its most-probable value. The depletion depth of a silicon sensor with bulk resistivity of 50 Ω cm operated at 140 V is 26 µm, which corresponds to a most probable deposited charge from a MIP of approximately 1600 electrons. Therefore, we should expect that in Figure  8 only the two higher-threshold measurements for the large pixel suffer from a significant loss in efficiency in the detection of MIPs. For the small pixel, at the intermediate threshold value, which should be close to maximal efficiency operation, the measured time resolution is (50 ± 1) ps. For a similar threshold the large pixel shows a time resolution of (83 ± 3) ps. Figure 9 shows the dependence of the time resolution on the high voltage for the small pixel. An improvement of the time resolution is observed with increasing high voltage. This behaviour could be attributed to: i) an increase of the depletion region that provides a larger charge and a slightly lower capacitance, and therefore larger signal/noise; ii) a better uniformity of the carrier drift velocity. These limiting factors can be controlled by producing the sensor on a high resistivity epitaxial layer with a highly doped substrate.

Conclusions
A monolithic pixel detector prototype was produced in the IHP SiGe BiCMOS SG13G2 technology, with a sensor design optimised for timing and a fast and low-noise SiGe HBT amplifier. The prototype contains small matrices of hexagonal pixels of 130 and 65 µm side and capacitance of approximately 220 and 70 fF, respectively. Single-hit rate scans performed with a 109 Cd source indicate an ENC of the preamplifier of 90 electrons RMS and a gain of 290 mV fC −1 for the small pixels, and 160 electrons RMS and 185 mV fC −1 for the large pixels.
Data taken with a 90 Sr source were used to measure the TOF between the prototype and a reference LGAD detector that has 50 ps time resolution. A total excursion of the time walk below 1 ns was measured, which confirms the fast response of the amplifier. At a bias voltage of 140 V, time resolutions between (62 ± 2) ps and (46 ± 1) ps were measured at different thresholds for the smaller pixels after time-walk correction. These resolutions refer to the ∼90% of the events in the Gaussian core of the distributions. No event selection was performed. These results are competitive with silicon technologies that integrate an avalanche mechanism, and prove that SiGe HBT technology can provide precision tracking and excellent time resolution even in the absence of an internal gain mechanism. Experiments at beamline facilities with an external tracking system will allow for more detailed studies and for an accurate measurement of the efficiency.