Silicon pixel R&D for CLIC

Challenging detector requirements are imposed by the physics goals at the future multi-TeV e+ e− Compact Linear Collider (CLIC). A single point resolution of 3 μm for the vertex detector and 7 μm for the tracker is required. Moreover, the CLIC vertex detector and tracker need to be extremely light weighted with a material budget of 0.2% X0 per layer in the vertex detector and 1–2% X0 in the tracker. A fast time slicing of 10 ns is further required to suppress background from beam-beam interactions. A wide range of sensor and readout ASIC technologies are investigated within the CLIC silicon pixel R&D effort. Various hybrid planar sensor assemblies with a pixel size of 25×25 μm2 and 55×55 μm2 have been produced and characterised by laboratory measurements and during test-beam campaigns. Experimental and simulation results for thin (50 μm–500 μm) slim edge and active-edge planar, and High-Voltage CMOS sensors hybridised to various readout ASICs (Timepix, Timepix3, CLICpix) are presented.

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Introduction
The Compact Linear Collider CLIC [1][2][3][4] is a proposed linear e + e − collider at CERN, with centreof-mass energies up to 3 TeV. Precision measurements of Standard Model parameters and possibly of BSM phenomena discovered by the LHC are one important part of the CLIC physics goals. In addition, CLIC has a great potential to discover new physics, both through direct production and indirectly via the high precision achievable to measure electroweak observables [2,5]. The requirements for high precision measurements at CLIC impose challenging constraints on the CLIC vertex detector and tracker. A single point tracking resolution of 3 µm in the vertex detector and 7 µm in the tracker needs to be achieved. In addition, the vertex detector and the tracker have to be low mass detectors, with a material budget of only 0.2% X 0 per layer in the vertex detector and 1-2% X 0 in the tracker. This demand of a very low material budget does not allow for a liquid cooling system in the vertex detector. Forced air flow cooling is feasible only for a low power dissipation and is currently under investigation for the CLIC vertex detector. To reach this, a pulsed power operation of the front end electronics is foreseen, taking advantage of the train repetition of the CLIC machine operating at 50 Hz and the low duty cycle. The strong focusing of the beam at the interaction point, as well as the high centre-of-mass energy at CLIC, result in a high rate of background particles from beam-beam interactions. To suppress this beam-induced background, a time slicing of 10 ns needs to be achieved for the vertex detector and tracker. The compatibility of different sensor and readout technologies has been studied in various test-beam campaigns, performed at DESY with a beam of 5.6 GeV electrons and at the CERN SPS with 120 GeV pions. As a reference system for the particle track reconstruction, either the AIDA telescope [6] or the CLICdp Timepix3 telescope have been used.

Planar sensor assemblies
To achieve the required low material budget and single point resolution in the vertex detector and tracker, very thin planar sensors with small pixel sizes are investigated. In the following sections test-beam and simulation results from Timepix and Timepix3 ASICs with a pixel size of 55×55 µm 2 , as well as CLICpix ASICs with a pixel size of 25 × 25 µm 2 are presented.

Timepix and Timepix3 assemblies
Timepix [7] and Timepix3 [8] readout ASICs are used as test vehicles due to their excellent performance in terms of timing and analogue charge measurement. Planar sensors from Micron [9] and Advacam [10] with different thicknesses ranging from 500 µm down to 50 µm and various edge designs have been bump-bonded to Timepix and Timepix3 readout ASICs.

Sensor performance for different sensor thicknesses
Since the particles passing thin sensors create only small signals, the detection threshold needs to be low in order to operate these thin planar assemblies at full efficiency. This, in turn, requires a low noise level of the readout ASICs. The noise level of the Timepix and Timepix3 assemblies can be sufficiently suppressed with a threshold of ∼ 1000 e − . The efficiency of the charge collection as a function of the detection threshold has been investigated in test-beams. Figure 1 shows, that the low noise of the Timepix3 assemblies allows to set the detection threshold below 1000 e − , where thin planar sensor assemblies with a thickness of 50 µm can be operated with an efficiency higher than 99%.  The low signal in the thinnest assemblies indirectly also affects the position resolution: larger cluster sizes provide better position resolution, but in thinner sensors generally smaller cluster sizes are observed. This has been studied in detail with a series of sensors coupled to Timepix ASICs [12].
Results are shown in figure 2, where the fraction of matched clusters as a function of sensor thickness is presented. A cluster is considered to be matched if the distance between the reconstructed cluster position and the interpolated telescope track position on the Device Under Test (DUT) is smaller than 100 µm. The lower fraction of matched clusters with size larger than 1 for thin sensors results in a loss of information in the reconstruction of the spacial position, as shown in figure 3, where the position resolution is presented as a function of the sensor thickness. The position resolution is defined as the difference between the position of the interpolated telescope track and the hit position on the DUT. The hit position on the DUT was determined by charge interpolation between the pixels in a matched cluster, applying an η-correction to correct for non linear charge sharing effects [12].  Position resolution versus sensor thickness for Timepix planar sensor assemblies (from [12]).

Edge efficiency
Active-edge sensors involve an extension of the backside potential to the edge of the sensor, to reduce inactive sensor regions and provide for the possibility of seamless tiling. This reduces the fraction of dead material and is thus an interesting technology to avoid the need for overlap due to inactive regions. It therefore helps to reduce the overall material budget of the detector.
The active-edge sensors tested were produced by Advacam. The Deep Reactive Ion Etching (DRIE) process was used to cut the sensors and extend the backside implant to this cut edge, resulting in a continuation of the electric field lines to the sensor edge. Charge created in the edge region gets collected by the closest pixel at the edge, leading to efficient charge collection up to the sensor edge. The closest pixel at the edge is in the following referred to as the last pixel. A very high potential gradient between the cut edge and the last pixel may lead to an earlier breakdown of the sensor and has been observed for a 50 µm thin planar active-edge sensor without a guard ring. To smoothen the potential gradient in this region, different guard ring designs are placed on the sensor surface between the active-edge and the last pixel. Results using sensors with a thickness of 50 µm without a guard ring, a floating guard ring and a grounded guard ring are presented. For the layout with a grounded guard ring different distances between the last pixel cell and the sensor edge are studied.

JINST 12 C01096
The efficiency close to the edge of the sensor for the different guard ring layouts is shown in figure 4. The design without a guard ring as well as the design with a floating guard ring are fully efficient up to the cut edge of the sensor. For the designs with a grounded guard ring the efficiency drops at the cut sensor edge.
Without guard ring:  This can be understood using a finite element TCAD [14] simulation of the described technology, as shown in figure 5. The figure shows the electric field lines for various active-edge planar sensors tested. As can be seen, most of the electric field lines are bent from the active-edge to the last pixel implant for the layout without a guard ring as well as for the one with a floating guard ring. In this case, charge created in this region will be collected by the last pixel at the sensor edge, leading to a fully efficient operation of the sensor right up to the cut sensor edge. For the design with a grounded guard ring the electric field lines reach from the active-edge to the grounded guard ring. Charge created in this region is thus directed away from the last pixel, leading to a drop in efficiency at the cut sensor edge.  In conclusion of these studies, the active edge planar sensor design with a floating guard ring was found to be a good compromise between operation stability up to higher bias voltages and efficient charge collection up to the sensor edge.

CLICpix assemblies
The pixel size of 55 × 55 µm 2 of the Timepix and Timepix3 assemblies is not expected to allow for the 3 µm single point resolution needed for the CLIC vertex detector (see also figure 3). Therefore, a CLICpix readout ASIC with a pixel size of 25 × 25 µm 2 was designed to meet the specific CLIC requirements [15]. Planar sensors with different thicknesses were bump-bonded to CLICpix readout ASICs, using a single chip bump-bonding process developed at SLAC [16]. Figure 6 shows the position resolution for different bias voltages of a 200 µm thick CLICpix planar sensor assembly. The position resolution improves with increasing bias voltage up to the depletion voltage at ∼ 35 V. A degradation of the position resolution for higher bias voltages can be observed. The fraction of matched clusters between 1 and 3 for different bias voltages is shown in figure 7. The fraction of clusters with a size larger than 1 increases with increasing bias voltage up to the depletion voltage and decreases for higher voltages.  For a bias voltage below the depletion voltage the active thickness of the sensor increases with the bias voltage, explaining the increase of the cluster size and the improvement of the position resolution up to the depletion voltage. For a bias voltage larger than the depletion voltage the electric field in the sensor increases and gets more homogeneous around the pixel implants, leading to less charge sharing and a degradation of the position resolution, as observed in figures 6 and 7.
Overall, a position resolution of 3-4 µm has been achieved for CLICpix planar sensor assemblies with a thickness of 200 µm. To further explore the feasibility of this technology with respect to the CLIC requirements, 50 µm thin planar sensors meeting the requirement of a low material budget are currently under investigation.

Simulation of planar sensors
To gain a detailed understanding as well as a validation of the results presented in section 2.1 and 2.2 a simulation chain has been developed to simulate the performance of tracking sensors. This simulation chain consists of four steps. First, a GEANT4 [17] simulation is performed to obtain the spacial energy deposit of a specific particle in the bulk silicon of the sensor.
-5 -Secondly, the sensor response is simulated with a finite element TCAD simulation, using the obtained distribution of the spacial energy deposit from the GEANT4 simulation to model the track of the particle in the sensor. In the next step, the impact of the digitisation, noise and energy fluctuation on the readout signal is simulated using a fast parametric model. Finally, a reconstruction is performed, including an η-corrected position reconstruction and a model of the resolution of the reference tracks from the telescope. A comparison of the simulation to Timepix planar sensor test-beam results is presented in figures 8 and 9. A good agreement can be observed for the spacial residual distribution and the dependence of the mean cluster size on the incident angle of the particle track. The Root Mean Square (RMS) from the simulated residual distribution of 13 µm reproduces well the RMS of 14 µm of the residual distribution from the test-beam data. The good agreement between simulation and test-beam data confirms the results from the planar sensor test-beam analysis and validates the developed simulation chain, which can be further used to explore other sensor designs.

HV-CMOS active sensors and capacitive coupling to CLICpix readout ASICs
Alternatives to the technology of planar sensor assemblies are investigated in the framework of the CLIC silicon pixel R&D programme. As an example, studies of active HV-CMOS sensors with capacitive coupling to the readout ASICs are presented in the following sections.

CLICpix assemblies
Capacitively Coupled Pixel Detectors (CCPDs), are used as active sensors and are capacitively coupled via a layer of glue to the CLICpix readout ASICs [18]. Sensors matching the CLICpix footprint (CCPDv3) were produced in a 180 nm HV-CMOS process. Deep N-wells are implanted in the pixel structure to shield the electronics from the substrate bias of ∼ 60 V. A fast signal collection is obtained by the drift of the created charges in the depleted region.
The schematic of the CCPDv3 and CLICpix pixels is presented in figure 10. The collected charge is amplified by a two stage amplifier implemented in the CCPDv3. The amplification of the signal within the pixel allows for a capacitive coupling of the CCPDv3 output signal to the CLICpix readout ASIC via a layer of glue with a thickness of ∼ 1 µm.  Figure 10. Pixel schematic of the CCPDv3 and CLICpix assemblies. The interconnection between the CCPDv3 and the CLICpix ASIC has been realised by capacitive coupling through a layer of glue (from [18]).
As presented in figure 11, a position resolution of 6 µm can be achieved, which is limited by the small amount of charge sharing due to the thin depletion layer. Moreover, figure 12 shows that the assembly can be operated at close to 100 % efficiency. ∼ 1000 e − Figure 11. Spacial residual distribution for a CCPDv3 sensor capacitively coupled to the CLICpix ASIC. A Gaussian fit with a width of 6 µm is indicated by the red dashed line (from [18] These first results of active HV-CMOS sensors with capacitive coupling to the CLICpix ASICs serve as a proof of principle of this technology. More work is needed to reach the required single point resolution of 3 µm for the vertex detector.

Simulation of HV-CMOS sensors
A two dimensional finite element TCAD simulation of the HV-CMOS sensor has been performed by implementing the detailed CCPDv3 structure in TCAD [19].
The calculated leakage current for different substrate resistivities as a function of the applied voltage is shown in figure 13. A breakdown of the CCPDv3 at ∼ 90 V can be seen, which has been reproduced by laboratory measurements of the CCPDv3 [18]. The simulation of the CCPDv3 has been used to identify the pixel layout as the reason for the breakdown at ∼ 90 V and is improved in next generations of CCPDs.
To gain further understanding of the charge collection time with respect to depleted and nondepleted regions of the CCPDv3, a transient simulation of particles entering the CCPDv3 sensor at the centre position of the pixel has been performed separately in the depleted and the non-depleted regions of the sensor. The collected charge versus time is shown in figure 14 separately for particles passing through the depleted region (drift) and the non-depleted region (diffusion), as well as the combination of both (sum). cm Ω 80 cm Ω 200 cm Ω 1000 CLICdp Figure 13. Leakage current versus bias voltage obtained from a finite element TCAD simulations of the CCPDv3 sensor (from [19]). Figure 14. Collected charge versus collection time for particles passing different parts of the CCPDv3. Results obtained through a simulation of the CCPDv3 sensor using TCAD (from [19]).

CLICdp
The charge created in the depleted region of the sensor is collected by the drift in the high electric field within ∼ 10 ns, whereas charge created outside the depleted region is collected by diffusion over a much longer timescale.

Summary
To address the challenging requirements for the CLIC vertex detector and tracker, various sensor and readout technologies have been investigated. Test-beam results for thin planar sensors with a thickness as small as 50 µm, read out by the Timepix and Timepix3 ASICs with a pixel size of 55 × 55 µm 2 are presented. Hybrid technologies with a pixel size of 25 × 25 µm 2 have been studied with planar sensors bump-bonded to the CLICpix ASICs. The obtained results are well reproduced by simulation. Further, the feasibility of active HV-CMOS sensors with capacitively coupling to the CLICpix ASICs has been demonstrated and a simulation of the CCPDv3 pixel structure has been performed.