Performance tests during the ATLAS IBL Stave Integration

In preparation of the ATLAS Pixel Insertable B-Layer integration, detector components, so called staves, were mounted around the Beryllium ATLAS beam pipe and tested using production quality assurance measurements as well as dedicated data taking runs to validate a correct grounding and shielding schema. Each stave consists of 32 new generation readout chips which sum up to over 860k pixels per stave. The integration tests include verification that neither the silicon planar n+-in-n nor the silicon 3D sensors were damaged by mechanical stress, and that their readout chips, including their bump-bond and wire-bond connections, did not suffer from the integration process. Evolution of the detector performance during its integration will be discussed as well as its final performance before installation.

. Technical drawing of one quarter of the ATLAS IBL [3]. is 20.2 × 18.8 mm 2 with an active area of 20.2 × 16.8 mm 2 and a periphery of 20.2 × 2.0 mm 2 , resulting in an active to inactive area fraction of about 90 %. The smaller feature size 4 leads to more radiation hardness due to thinner gate oxide transistors plus more digital complexity in less area. Each pixel holds internal calibration circuits as well as adjustable charge sensitive amplifiers and discriminators. The modules are glued to 64 cm long Parylene coated carbon foam support structures (staves), enabling charged track reconstruction up to a pseudo-rapidity 5 |η| ≤ 2.9. 12 planar modules (24 FE-I4 chips long) cover the central part of the stave, and 4 3D modules (4 FE-I4 chips long) cover the regions of the both ends of a stave. In total 32 FE-I4 units are placed on a stave.
The IBL consists of 14 staves made of low density carbon foams mounted at a tilt angle of 14 • (figure 1). The extremely light design structure of the IBL leads to a radiation length of 1.9 %. Inside the carbon foam support structure a titanium pipe carries CO 2 for cooling.

Module loading and results
Modules arriving at the stave loading site are dressed as seen in figure 2. Here, a planar module is shown. The electrical signals to and from the chips are transported via wire bonds through 4 130 nm CMOS process compared to 250 nm CMOS process in the 3-Layer ATLAS Pixel Detector. 5 η ≡ − ln [tan (θ /2)], where θ is the angle between the particle three-momentum p and the positive direction of the beam axis.
-2 - a flexible PCB (module flex) glued on top of the sensor-chip assembly. The assemblies were mounted on an aluminum carrier, along with the full size module flex for mechanical support and a connector for handling and testing. This temporary connector was removed and the remaining module was glued onto a bare stave with high precision alignment. Then the wings, guiding the electrical connections from the stave flex underneath the stave to its face plate, were glued onto the module flexes. For monitoring the wire bonding process, four additional wire bonds every two readout chips were set and pulled afterwards. The average pull strength of the entire production was ∼ 6.5 ± 0.6 g while 5 g was the required minimum pull strength. The module alignment was verified in metrology measurements where fiducial marks on the sensors served as reference points. The module positions were verified along and across the stave to avoid mechanical contact between two modules. It was observed that no module deviated more than 150 µm from its nominal position. Thus, all staves fulfilled the mechanical IBL qualification. The subsequent module tests comprised verification of the electrical and logical functionality of the chips and their calibration of deposited charge threshold and time over threshold. If those steps were successfully passed, the staves were shipped to CERN where they were integrated into a dedicated test bench for full qualification. In case of failure, a module not satisfying the requirements was replaced on site, which occured for 10 % of the production. In total 20 staves were loaded with 240 planar double chip, 88 3D CNM and 72 3D FBK modules.

The Stave QA bench and performance
The main part of the CERN ATLAS IBL Stave Quality Assurance (QA) bench located in SR1 laboratory comprises a ∼ 2 × 1 × 1 m 3 environmentally controlled, insulated aluminum box in which -3 - two staves were placed, connected to a transportable CO 2 cooling system, equipped with a humidity and temperature interlock. Close to the setup there are second stage regulated LV power supplies, readout adapter cards as well as a crate for scintillator triggering in case of cosmic tests. Two radioactive sources, namely 90 Sr and 241 Am, were mounted onto a support structure connected to a linear motor and used for sensor qualification and disconnected bump studies.
To minimize the services inside the active area of the detector, four chips are powered in parallel forming a "DCS 6 group". Two chips share one command line and thus form one readout group. The data is sent out on individual lines. The naming convention (A and C side, counting modules from the interaction point to each end of stave) is in accordance with the ATLAS naming scheme. The modularity is shown in figure 3. In the Stave QA a highly modular system developed at SLAC, based on an ATCA 7 crate was used as the IBL DAQ components [3] were not fully available by the time the QA measurements were performed. The RCE 8 system is composed of three main parts: the RCE boards which generate commands, receive and chart the data, the CIMs 9 which are the control units and communication interfaces, 96 channel 10 Gb/s ethernet switches, establishing connections between the DAQ computer and the corresponding RCEs and finally the HSIO 10 boards which provide routing, buffering, multiplexing of commands and 8b/10b decoding of the FE-I4 data as well as generation of the clock and cyclic or external triggers. The calibration and data taking is executed by an operator via a dedicated DAQ panel (GUI) which collects module configuration files, runs scans and displays the results of each scan. The module configuration files are lists in plain text format that hold the readout chips' register names and individual settings. The results were saved in the ROOT file format.
Four days were needed for each stave to be tested, including the time for installation, removal and optical inspections. The test flow comprised verification of the electrical and logical functionality of chips and sensors, calibration of all chips to the same (standard) settings, running of source scans for charge calibration, sensor functionality and disconnected bump bond studies and concludes in the determination of the total number of inoperable pixels based on the information from all previous scans. First, high resolution overview pictures were taken (as seen in figure 4(a)) followed by detailed inspection of all wire-bonds and critical electrical components. The inspector's comments and pictures were stored in a dedicated QA database. If nothing suspicious was found during the optical inspection, the stave was integrated into the environmental box. The electrical functionalities were checked by running sense line checks, LV power cycle studies and measuring the sensors' IV characteristics. Basic scans to check the logical parts included register read back  Chip Number   tests, digital and analog tests as well as a threshold and time over threshold (ToT) scan. The digital test injects pulses in each pixel to an OR element right after the discriminator. Analog test hits are generated by a calibration voltage that charges the injection capacitors and are used to verify the functionality of the analog part of a pixel cell. A threshold scan injects various charges at a fixed step width and thus measures the discriminator activation curve. The time over threshold scan injects a fixed reference charge and evaluates the according length of the discriminator output signal.
These basic tests were performed at a module temperature of ∼ 22 • C and mainly used for identifying major changes due to handling issues. All modules were calibrated to the desired threshold of 3000 e − with a dispersion of less than 100 e − with a time over threshold of 10 bunch crossings 11 as a response to an injected reference charge of 16 000 e − . After calibration they were 11 25 ns bunch crossing rate at the LHC. illuminated by a radioactive 90 Sr source for 400 s to verify the sensor functionality and to identify disconnected bumps. The seemingly low efficiency regions seen in the 2D hit map in figure 4(b) correspond to the passive components mounted on the module flex ( figure 4(a)). The increased number of hits in the outer column corresponds to longer pixels (see slim edge design in [4]). In order to mimic the conditions in the ATLAS Detector the most important operation was the calibration to a threshold of 1500 e − at a module temperature of −12 • C while the time over threshold setting is held constant. The production of detector components lead to a successful construction of 20 staves from which 18 were considered production staves as two were damaged by accidental exposure to condensation [6]. In figure 5 threshold and derived noise of the remaining 18 production staves as a function of chip position is shown. The error bars represent the RMS, the blue bars represent the minimum and maximum values found among the 18 staves. The central 24 entries correspond to FE-I4 chips connected to planar sensors, while the external 4+4 entries to 3D sensors. The slightly higher noise ( figure 5(b)) on the 3D sensors is expected due to a higher sensor capacitance. The significantly increased noise on A8-2 comes from one module on a stave which was not chosen for the IBL. After a successful threshold calibration to 1500 e − , three thermal cycles were performed with basic functionality checks (Digital, Analog, Threshold, ToT Scan) in-between -6 -  Figure 7. (a) Average bad pixel ratio distribution as a function of η for installed and not installed production staves and (b) the operational fraction of pixels in the η-φ plane for the 14 installed staves. Resolution: 128 bins in η from -3.03 to 3.03 that correspond to a bin width of 0.0473, 56 bins in φ from 0 to 2 π that correspond to a bin width of 0.112 [6,7].
to look for changes due to mechanical stress but none were observed. In figure 6 the IBL calibration performance before integration is summarized. Figure 6(a) shows the overall pixel thresholds for the different pixel types. All types peak at 1500 e − threshold in a very narrow distribution with a dispersion of less than 50 e − . Planar outer column and inter chip pixels are listed separately because of their longer size as can be seen in the derived noise plot ( figure 6(b)). The threshold over noise is the key parameter in determining the quality of the IBL modules with respect to their operability at a given discriminator setting. The bigger this factor the less contamination of noise hits in the sample of physics hits recorded during collisions. The physics occupancy in the ATLAS Pixel Detector b-layer was ∼ 5 · 10 −4 hits per pixel per bunch crossing at the end of Run 1 while the expected physics occupancy for the IBL is 10 −3 hits per pixel per bunch crossing in early operation and higher in later years. In both cases, pixels with a noise occupancy rate higher than 10 −6 hits per pixel per bunch crossing are referred to as noisy pixels and are disabled from data taking to ensure noise contamination in physics hits from collisions to be less than 0.5%. A threshold over noise value higher than 5 would ensure that the noise contamination in physics hits from IBL would be less than 0.1%. This is achieved for the majority of all pixels, as can be seen in figure 6(c). The fraction of noisy IBL pixels is less than 0.03% for the 1500 e − reference threshold calibration at −12 • C module temperature. The rate of noisy pixels in the 3-Layer Pixel Detector is twice as high at 0.06% for the 3500 e − operational threshold at the same module temperature. In figure 6(d) the most probable values of the cluster time over threshold distributions per chip as responses to the electrons from the 90 Sr source are presented. It shows a very homogeneous signal response over all chips in the detector.
The number of working pixels is the major criterium for choosing a stave for installation along with stave planarity and sensor IV stability. A production requirement for the IBL was to ensure a number of 99 % working pixels while all 18 staves show at least 99.7 % operable pixels. Figure 7    modules onto staves the low η regions were covered with the best modules available. The few defect channels are preferably distributed homogeneously in the η-φ plane. Thus, an η weighted ranking was applied on all staves. The resulting picture of the operational fraction of pixels in the η-φ plane for the 14 installed staves is displayed in figure 7(b). The planarity is defined as the difference between the minimum and maximum height of a stave and did not exceed 340 µm in the IBL production which is within the envelope requirements of the IST, 12 a carbon fiber tube inside the 3-Layer Pixel Detector. The applied classification of pixel failure modes, more detailed QA results and a selection of encountered issues during the production, namely double trigger responses, noise sensitivity on 3D sensors, charge calibration, weak differential driver output, oscillations on the low voltage supply lines and noise coupling on double chip sensors, can be found in [6].

Integration and current status
At the beginning of 2014, the stave QA finished and within one month 14 staves were integrated onto the IPT, 13 a carbon fiber tube surrounding the beam pipe. The entire IBL package was fully assembled including all services one month later and was lowered into the ATLAS cavern beginning of May 2014. Once the detector was fully connected to all supplies, cooling and readout, it was re-calibrated stave by stave with a transportable version of the readout system used for the stave QA (see section 3). The QA configuration files were used as starting points. All chips were still operational and the calibration results, as shown in figure 8, are comparable to the ones obtained in the QA setup (not shown here, but available in [7]).

Towards bake out and operation
The next steps towards Run 2 of the LHC were the cold operation of the Inner Detector, the bake-out of the new beam pipe and combined cosmics data taking of all subsystems of the ATLAS detector. 12 IBL Support Tube. 13 IBL Positioning Tube.  The new beam pipe which was integrated in the IBL package needed to be baked out to reduce thermal outgassing and to activate the Non Evaporable Getter (NEG) coating on the inside of the beam pipe. This is a crucial procedure for the targeted LHC vacuum. To understand the conditions during the beam pipe bake-out, CFD 14 simulations were run (see figure 9(b)). In addition to those, a real size IBL thermal mock-up (figure 9(a)) was built and installed in CERN SR1 clean room. It was operated with a 1000 W CO 2 cooling plant connected to stainless steel pipes running in aluminum staves in the mock up. Various heaters as well as temperature and humidity sensors were largely distributed over the entire mockup. Only every second stave could be cooled in that setup. However, comparing the results from the cold staves to the CFD simulation during bakeout, one can see that they are in very good agreement (see table 1). The beam pipe bake-out was performed at 220 • C. The stave temperatures, however, were not meant not exceed +40 • C which resulted in a substantial temperature gradient over just a few mm. With the help of the simulations and the mock-up it could be shown that the detector will remain unharmed during the bake-out if the coolant is set to −20 • C.

Conclusion
The IBL is the fourth layer of silicon pixel detectors in ATLAS, foreseen to take data up to the high luminosity upgrade of the LHC. All components used for the ATLAS IBL were built and found to meet the demanding requirements described above with respect to engineering constraints, operational stability, calibration performance and radiation hardness. Eventually the 14 best were chosen to build the IBL. All modules were functional after integration and 99.9 % of the pixels were working. The installation into the ATLAS Detector was successful and no damages were observed. Also the beam pipe bake out left the detector unharmed and first cosmic data in combination with other ATLAS sub-detectors was taken. The DAQ integration into the existing ATLAS frame is ongoing.