Design and Simulation of Optical Logic Gates Based on (MIM) Plasmonic Waveguides and slot cavity resonator for Optical Communications

In the field of optics the tinier devices are the better; therefore, the diffraction limit of light seems like an essential limitation in the way of that field. In return, new methods have appeared to resolve this issue. One of these methods is the plasmonic technology which allows light pressure into nanostructures. The current study proposes all-optical logic gates based on metal insulator metal structures (mim) waveguide. This waveguide has an important characteristic which is restricting the applied light strongly far from the diffraction limit. The proposed structure is small compared to the applied wavelength. The optical plasmonic gates proposed are (OR, NOR, AND, NAND, NOT). The comsol multiphysics 5.5 software was used for simulation by the 2-D FDTD method. Hence, these five gates will be obtained by optical interference between the propagating signals through the input ports and the control ports, whose positions can be altered according to the gate needed. The implementation and simulation of the proposed gates were all in the same structure, with the same dimensions, the same wavelength and the same transmission threshold, with applicable wavelength of (1550 nm). The performance of the proposed plasmonic gates was tested by two criteria; the optical transmission ratio and the contrast ratio, which is the ratio between the ON and OFF states of the proposed gate..


Introduction
Optical computing is a striking technology mainly because of its high speed in data processing and its low heat loss. These two features are the most significant obstacles that face modern electronic integrated circuits (ICs). There have been different devices performing different functions depending on optical computing, for instance, solving differential equations [1,2], differentials [3][4], integrals [5], analogue computer [6], features [7], comparative [8], due to the enormous advances in nan-photons and nano-plasmonics.

Literature Review
In [45], a structure implementing four optical logic gates was proposed; NAND, NOT, EX-OR and EX-NOR based on the plasmonic waveguide and nanoscale ring resonator. The geometric dimension of the proposed structure is (1220 × 1120) nm. The maximum contrast ratio of 26 dB was obtained at a wavelength of 525 nm. These gates were simulated and studied using the FDTD digital method. These simple and micro devices can be used in phonotonic integrated circuits (PICs). Their behavior and performance can be modified by altering the structural parameters. The proposed XOR gate had the best performance in this structure. In [47], new (MIM)-based optical logic gates of dielectric plasmonic waveguides were proposed. Hence, all the proposed optical logic gates were examined numerically using finite difference time domain (FDTD) method wherein the optical logic NOT gate was implemented. By changing the control port, the outbound field can be propagated or not in the waveguide. Therefore, the proposed device could serve as a major prospective component in applying the processing system of optical signals in the integrated circuits (a plasmonic (MIM) waveguide was used) as a structure to achieve the logic NOT gate in this study with structure as large as (2.4 μm). X 3 μm) and a maximum transmission of 65.35%. In [48], two structures implementing three plasmonic optical logic gates were proposed. These plasmonic logic gates are based on the plasmonic waveguide structures and MIM square ring resonator. These gates were NOT, AND, and NOR, realized in the two dimension structures of the first (750 nm x 900 nm) to implement the NOT gate, and (1.5 μm x 1.8 μm) for AND and NOR gates. The maximum transmissions was 70% and 90% for both structures, operating at the wavelength 1535 nm.
In [49], the gates OR, NOT, AND, and EX-OR based on a single matrix waveguide were proposed. The structure has one input port and three output ports. The waveguide length (L) was changed to obtain each of the above gates, where L1 = 0.68 μm is to implement the NOT gate, L2 = 0.38 μm is to implement the AND gate, and L3 = 0.32 μm is to implement the XOR gate. A maximum contrast ratio of 13.98 dB was obtained (the logic functions OR, AND, NOT, and EX-OR can be achieved by selecting the appropriate length of the waveguide, the specified input ports, the output ports, and the appropriate threshold value. Thus, the lengths of the waveguides of the proposed gates differed). In [50], a study proposed a structure to implement the three plasmonic optical logic gates, AND, XNOR, and NOR based on graphene-dielectric-metal structure. It contains one input port and three output ports. The geometric dimensions of the proposed structure are as follows; structure size = 4.5 μm, Si 2 layer width = 120 nm, Au layer width = 30 nm, and graphene layer thickness= 1 atom. The maximum contrast ratio obtained was (29.41, 97.38 and 29.40 dB) for (AND, XNOR, NOR), respectively. In [51], a study proposed a structure to implement the plasmonic logic gates OR, and NOR using the proposed linear waveguides and MIM Plasmonic structure based vertical linear cavities with high contrast ratio of the dimensions: linear waveguide length (l)= 500 nm, waveguide linear width (w= 50) nm, and the length of the linear vertical cavity (L)= 1000 nm. The maximum contrast ratio was (12.36 db) for NOR gate. In [52], a NAND gate based on Mach-Zehnder plasmonic interferometers (P-MZI) supported by MIM waveguides. The proposed structures were designed with a minimum number of P-MZI operating at 1550 nm wavelengths. The geometric dimension of the proposed structures are (40 x 7.5 μm). The contrast ratio of 10.25 db was obtained as maximum. In [53], researchers proposed a structure to implement simple basic logic gates for XOR, OR and NOT based on tape graphene nanoscale resonators attached with properly designed nano waveguides as input and output logic ports, and verified numerically using the time-difference-domain method FDTD. A typical extinction ratio of about (8 db) was achieved between the ON and OFF logic settings according to the remarkable advantage of the voltage-dependent chemical potential of graphene delivery, whereby the properties of structures can be effectively manipulated to control their behavior and performance. In [54], study, a structure was proposed to implement two gates: AND and NOR, based on plasmonic waveguides and a MIM-ring resonator. The multi-input structure was 2 and 3 bits. The size was more than (3 μm x 2 μm). The maximum transmission was up to 84.06% in the AND. All these studies aimed to minimize the size of optical devices used in the communication systems. Therefore, most of them implemented small number of gates in the one structure or more. Some studies alter some dimensions of the same structure to implement another gate. Moreover, most of these studies used a wavelength less than 1550 nm, which is the applicable wavelength in most optical communication systems. In the current study, the researchers aim to implement the largest number of gates in the same structure, with the same dimensions, the same wavelength of 1550 nm, and the same transmission threshold. It is hoped that this study will be a gateway to building integrated optical-plasmonic circuits.

Theoretical Calculations
The current proposed structure implementing (five) plasmonic optical gates, consists of a waveguide of three layers (metal -insulator -metal) (MIM) and a rectangular nano aperture, figure (1). Silver and air are used in this structure as conductive insulating material, respectively. The waveguide width is very small compared to the applied wavelength and the small size of the waveguide width will give a singlet propagation pattern for TM• in the waveguide (MIM), and the complex propagation constant can be calculated by solving the following dispersion relation: Free space wavenumber (4) The effective refractive index of the waveguide, MIM, can be obtained from the following relationship: = Stationary waves in the slot cavity can occur when the following condition is met Δ = 2 + = 2 . When this condition is met where Δ is the total phase displacement of the light for each transport round occurring in the slot cavity and is the phase displacement on both sides of the cavity boundary when the wave propagates [55]. The slot cavity length is and m is an integer that decides the order of the resonance mode in the slot cavity and m is the rank propagation constant of where is very small. It can be neglected without affecting the results. Hence, the resonance wavelength can be calculated by the following relation: is the refractive index of the slot cavity, when the input pulse is assumingly executed from one of the three ports 1,2,3 placed in the random location ∆ (i = 1,2,3) from the midpoint of the slot cavity. The magnetic field can be calculated, with m being the pattern rank, and the magnetic field in the slot cavity can be calculated by the following relation [55] where α is the total dissipation that takes place when the light propagates into the rectangular nano slot cavity, including the loss of both the losses that occur from the absorption of the metal and the coupling losses that occur between the waveguide and the slot cavity. In the current study, the first resonance of the slot cavity is considered through the resonance condition of the first mode of the wave input ports, 1,2,3,4, as shown in figure (1). Hence, the magnetic field of the first mode can be calculated as follows: By selecting the appropriate distance for Δ , we can achieve constructive and destructive interference to implement the required five gates.

PLASMONIC OR LOGIC GATE
Drawing on the discussion over the theoretical part of the structure illustrated in Fig. (1), ∆ is considered equal for all ports of all five gates proposed. In this gate, ports (2 and 4) were considered input ports, and port (1) an output port. Port (3) is neglected and is not used in the implementation of this gate As shown in the structure illustrated in Fig. (2.3), By examining the fact table of the OR gate in figure (2.2) and its form in figure (2.1), it can work as an OR gate and figure (2.4) shows the transmission to the proposed gate OR, the highest transmission ratio obtained is 0.91 and a transmission threshold is 0.35. When one input port is ON, the output in port (1) is ON, and when the two inputs are ON, the output in port (1) is ON as well. Likewise, when the two inputs are OFF, the output in port (1) is OFF, as shown in the figure (2.5).

PLASMONIC AND LOGIC GATE
In this gate; however, the ports (2 and 3) are considered as input ports, port (4) as a control port always on ON in all cases, and port (1) as an output port as shown in figure (4.3). As in the fact table of the AND gate in figure (4.2) and its shape in figure (4-1), it can operate as an AND gate. Figure (4.4) shows the transmission of the proposed AND gate, with the highest transmission ratio obtained as 0.85, as shown in the figure (4.4). When the input port (1) is ON in port (2) and the phase angle of the signal applied is 181 degrees, the output in port (1) will be OFF. On the other hand, when the second input is ON in port (3) and the phase angle of the applied signal is 0 degrees, the output in port (1) will be OFF. Likewise, when the two inputs are ON, the output in port (1) will be ON and when the two inputs are OFF, the output in port (1) will be OFF, as shown in the figure (4.5).

PLASMONIC NAND LOGIC GATE
To implement the NAND gate, the ports (2 and 4) will be considered as an input port, port (1) as a control port, always ON in all cases, and port (3) as an output port. As indicated in the fact table of NAND gate in the figure (5.2) and its shape shown in figure (5.1), it can work as a NAND gate. Figure  (5.4) shows the transmission of the proposed NAND gate, with the highest transmission ratio as 1.91, as shown in the figure (5.4). When the first input port is ON in port (2), with the phase angle of the signal 180, the output in port (3) will be ON and when the second input is ON in port (4) with the phase angle of the applied signal as180 degrees, the output in port (3) will be ON. On the other hand, when the two inputs are OFF, the output in port (3) will be ON, and when the two inputs are ON, the output in port (3) will be OFF, as shown in the figure (5.5).

PLASMONIC NOT LOGIC GATE
To execute this gate, port (1) was considered as the input port, port (2) was a control port always in the ON state in all cases, port (4) as an output and port (3) is neglected as shown in the figure (6.3). As in the fact table of the NOT gate in the figure (6.2) and its illustration in figure (6.1), it can operate as a NOT gate. Figure (6.4) shows the transmission of the proposed NOT gate, with the highest transmission ratio obtained 0.38 as in the figure (6.4). Hence, when port (1) is ON, the output in port (4) is OFF and when the input in port (1) is OFF, the output in port (4) is ON, as shown in the figure (6.5).

Results and Simulation
The two-dimensional finite-difference time-domain (FDTD) method was used to numerically solve Maxwell's equations using comsol multiphysics package software (5.6) with nm (5x5) network size and convolutional perfectly matched layer (CPML) to absorb the boundary conditions of the region being simulated. All input optical TM are polarized. The proposed structure in the current study has four ports, two of which are input ports, the third is a control port, and the last is an output port. The basic operations of logic gates are realized on the principle of constructive and destructive interferences between optical signals that propagate in the waveguide. Consequently, the interaction between the waveguides and the slot cavity the surface resonance plasmon (ssp) will occur as the interference between the incident light signals depends on the phase of the applied light field as well as the positions of stimulating ports (input or control), in which the structure dimensions of the waveguides are as follows. where w = = 100 nm is waveguide width and the slot cavity, = 560 nm is the slot cavity length, and d = 15 nm is the distance between the waveguide and the slot cavity . The materials used in this proposed structure are silver and air. The waveguides and the slot cavity are of air substance and the rest of the structure is of silver, figure (1). The proposed structure will simulate plasmonic optical logic gates (OR, NOR, AND, NAND, NOT) MIM based on plasmonic waveguide. All five proposed plasmonic optical gates have the same dimensions, the same materials and the same structure. The Jonson and Christy data are used in simulations to describe the permittivity of silver, while the refractive index of air is ( = 1) for the insulator, as the wavelength of resonance can be calculated by equation (2) . According to the above equation, the structure parameters and the type of material used in the simulations are considered a rule in selecting the wavelength, for which 1550 nm was selected as it is the best option in optical communication applications. These five gates can be measured by two criteria, the first is the transmission ratio which is the ratio between the optical power output to the optical power of the signal entering the port (input or control). The second criterion is the contrast ratio, which is the ratio between the lowest optical power in the ON state and the highest optical power in the OFF state in the output port, and the higher this ratio the better the performance of the gate, as follows. = / (for the ON and OFF states in the output) (10) where T represents the transmission and the is the optical output power in the output port in the ON and OFF states., whereas is the optical input power in the input port or control port. where the | is the lowest optical power exiting from the output port in the ON state, i.e. logic (1), whereas the | is the highest optical power exiting from the output port in the OFF state i.e. logic (0)..

Conclusion
This study proves that the plasmonic technology is one of the best techniques used to minimize the dimensions of optical devices used in communications to less than the wavelength dimensions applied to them. Five gates were designed: OR, NOR, AND, NAND and NOT gates in one structure with the same dimensions, the same wavelength and the same transmission threshold. The results were analyzed numerically using 2-D FDTD where these gates were implemented depending on the optical interference feature between the propagated signals in the input or control ports and the coupling process between the waveguides and the slot cavity. The results of simulations revealed that the highest transmission ratio exceeded 100% in the NAND gate, reaching 190%, and the highest contrast ratio was in the OR gate, of more than (26 db).