Paper The following article is Open access

Design and Implementation of Convolutional Neural Network Accelerator Based on RISCV

Published under licence by IOP Publishing Ltd
, , Citation Yangyang He 2021 J. Phys.: Conf. Ser. 1871 012073 DOI 10.1088/1742-6596/1871/1/012073

1742-6596/1871/1/012073

Abstract

Internet of Things devices are faced with ever-increasing amounts of data, and they can no longer only do data collection as they did in the past, and hand over computing tasks to servers on the cloud. The growing computing requirements in the field of Internet of Things and the diversity of its scenarios put forward configurable and flexible customization requirements for customized processors. This paper conducts in-depth analysis and research on configurable customized processors, and analyzes related work in the field of RISC-V chips and deep convolutional neural networks in the field of device-side optimization at home and abroad. Based on this, this paper proposes an instruction and hardware design of a customizable deep convolutional neural network accelerator attached to Rocket-Chip Generator based on the RISC-V modular instruction set.

Export citation and abstract BibTeX RIS

Content from this work may be used under the terms of the Creative Commons Attribution 3.0 licence. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI.

Please wait… references are loading.
10.1088/1742-6596/1871/1/012073