Phase cascade lattice rectifier array: an exactly solvable nonlinear network circuit

An exact analysis of a 2-D lattice network consisting of N × N sites with rectifier and AC source elements with controllable phases reveals a method for generating ripple-free DC power without the use of any filtering circuit elements. A phase cascade configuration is described in which the current ripple in a load resistor goes to zero in the large N limit, enhancing the rectification efficiency without requiring any additional capacitor or inductor based filters. The integrated modular configuration is qualitatively different from conventional rectenna arrays in which the source, rectifier and filter systems are physically disjoint. Nonlinear networks in the large N limit of source-rectifier arrays are potentially of interest to a fast evolving field of distributed power networks.


Introduction
The need for DC electrical power generation from AC sources is arguably the most significant nonlinear problem of central importance to modern society. Solutions to the problem involve fundamental aspects of nonlinear networks as well as in extensions to higher frequency applications of interest to Physicists. It has long been appreciated that rectifiers are nonlinear devices that break Lorentz reciprocity [1]. Interest in distributed energy networks [2], the need for alternative energy technologies [3,4], energy harvesting systems [5,6] and energy scavenging systems [7] have spurred renewed interest in the problem of scalability. New approaches to hierarchical control of AC and DC microgrids have in turn sparked innovation [8]. A number of configurations have been investigated for power generation from AC source networks, extending to wireless power generation [5,9], rectenna arrays and wireless power transfer systems [10][11][12] as well as smart grids [13]. A classic configuration consists of rectenna arrays in which diode arrays are used to rectify the output of a receiving antenna, followed by filters to provide the desired DC power. Such nonlinear networks have become very interesting recently for devices in which diode elements are integrated into plasmonic structures, and in the rapidly emerging new field of nonlinear metamaterial devices [14][15][16], efficient metamaterial based energy harvesters [17] among others. The ability to design and engineer local phase shifts within each element of a receiving array represents a new capability that has not been studied in detail, and the configuration space remains unexplored. Lattice networks consisting of nonlinear elements like diodes and random circuit elements have been extensively studied in Statistical Physics as models of directed networks and percolation problems [18][19][20][21]. More recently, networks of nonlinear circuit elements have been shown to exhibit symmetry-breaking transitions associated with bifurcations [22]. The range of phenomena is vast even for deterministic systems. Up to now, the inclusion of voltage sources within the lattice sites has not been widely considered. It may be expected that integration of sources with random or varying phases at each lattice site will lead to an even richer range of phenomena. Original content from this work may be used under the terms of the Creative Commons Attribution 3.0 licence.
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In this article, we investigate rectification phenomena in a particular 2-D lattice network consisting of N 2 sites , in which each lattice site consists of an AC source in a bridge-rectifier like configuration. As shown in figure 1, each lattice site shares one diode with each of its nearest neighbors. The configuration is inspired by rectenna arrays, but now with the addition of AC sources at each lattice site. The system consists of N 2 AC sources, and (N+1) 2 diodes. It can be seen that when N=1, the configuration is identical to a classic bridgerectifier combination. Each column of unit cells harks back to the iconic Cockroft-Walton generator. Each row of parallel cells is characteristic of a microgrid. Both the Cockroft-Walton generator and the microgrid configurations have disadvantages in terms of current carrying capacity and scalability of voltage. When arranged in a 2-D lattice, we show that new features emerge that overcome the shortcomings. Common to most nolinear circuit networks the current through the load resistor has many frequency components, with the zero frequency DC component being the most important for rectification.
The advent of distributed generation of power from both conventional and alternative energy sources provides motivation to study networks in which voltage sources are also distributed throughout the lattice. Of particular interest is the generation of DC power and ripple-free voltage sources, not only for their ubqiuitious use but also for efficiency in transmission over long distances with asynchronous power generators derived from a wide range of sources for energy harvesting.

Lattice model
We consider the challenge of how to arrange a lattice of M≡N 2 AC voltage sources, with suitably chosen relative phases and with diodes for rectification such that it can produce an almost dc source. For definiteness, consider a 2-D lattice of elements arranged as shown in the figure 1. In this section, we present the analysis for idealized diodes, which operate in just two states determined by the bias voltage across the diode: (i) an 'off' state, at negative bias, where the current is Zero; (ii) an 'on' state, at positive bias, where the current is an arbitrary positive value limited only by the load.
We will briefly consider in a later section more realistic diode models later using numerical simulations on commercially available Silicon diodes with a forward voltage of ∼.8 V, and with current set by a non-zero forward resistance.
The lattice arrangement of interest is shown in figure 1 with N 2 voltage sources arranged in series with a load resistor R L . The total number of diodes required is º M N 4 4 2 , with 4 diodes per unit cell. Motivation for this lattice network comes from shortcomings in simple series and parallel arrangements of rectifiers. In the simple series arrangement, each diode must then be rated to carry up to the maximum total current flowing through the load resistor, which limits the utility of the series configuration, as we show next. With the rectified sources in series, the total voltage at time t is Clearly, this is a periodic function of time, with time period T=2π/(ω N 2 ) that also violates time-reversal invariance. For the simple case when N is an even number, we have are the minima and maxima of ( ) V t . The ratio of minimum to maximum voltage is p ( ) N cos , 2 and the frequency of these ripples is N 2 ω. For large N, the ripples have height pV N , 0 2 and are superimposed on a DC voltage of p N V 2 .
2 0 We note that the peak current carried through each diode is approximately , which it carries for half the cycle. For large N this current can exceed the maximum rating for the diode in the series configuration. This limitation is inherent in any series configurations. The iconic Cockroft-Walton generator shown in figure 1(c) is constrained in its utility by such a limitation on the current.
As an alternative to the simple series arrangement, the current load in each diode can be reduced by adopting a parallel configuration shown on the left side of figure 1(a). For M bridge rectifiers arranged in a parallel configuration, the sources have to be in phase. The fraction of the ripple in the output voltage can be seen to be just as large it would be for a single rectifier, and additional filtering would be needed to get DC current through the load resistor. In the simple parallel arrangement shown in the figure, the current is distributed among the unit cells, but the voltage across the resistors is now limited by the forward voltage drop across two diodes.
These elementary arguments motivate us to investigate a hybrid system that combines series and parallel combinations into the 2-D lattice shown in figure 1, with each unit cell is mapped onto a conventional bridgerectifier. Remarkably, we find that for a special choice of phases of the AC sources, the configuration provides the advantage of reduced ripple in the rectified DC voltage of a series combination, with the advantage of reduction in peak current that is the hallmark of the parallel combination. The lattice arrangement analyzed here solves both problems and the system is inherently scalable for both high voltage and high currents while remaining within the damage thresholds of the diodes. We now show how hierarchical control of the phases results in perfect conversion efficiency. In our configuration, the phases of the voltage sources are uniformly distributed between zero and 2π.
where 0iN−1 and 1jN. The phase angle associated with the source at (i, j) is 2π( j/N+i/N 2 ) when the row index i is even or zero, and is =2π( j/N+i/N 2 )+π when the row index is odd within the index range 0iN−1. The sign of the voltage across a source is fixed by defining it as the difference between the voltage at the right end and at the left end of the source. Then one can verify that the voltage at the j'th junction between voltage sources in the i'th row is where 0jN and c i (t) is a j-independent function of time in the i'th row that has to be determined.
(Equation (4) can be verified by taking the difference in the voltages at successive nodes and comparing to equation (3).) The voltages V ij are then the voltages at the ends of the various diodes. The functions c i (t) can be determined by the condition that, at any time t and in the approximation we are working with, none of the diodes can be forward biased, and at least one diode in each row must be at zero bias in order for current to flow from one row to the next. This ensures that independent of t, for N−1>i0. This fixes c i+1 (t)−c i (t). Similar reasoning can determine the voltages at the conducting strips at the top and bottom of the lattice.
To understand the results obtained, we first consider a continuum approximation, where the number of nodes in each row is very large. From equation (4), the voltage across any row is a sinusoidal curve with amplitude N V 0 /(2π). The sinusoidal curve for each row is upside down compared to the adjacent rows. (The curve in each row is also shifted horizontally by a phase of 2π/N 2 with respect to the preceding row, but this shift is neglegible in the  ¥ N limit.) From equation (5), we immediately obtain By the same reasoning, the voltages of the two conducting strips are Therefore the voltage difference between the two conducting strips is N 2 V 0 /π, and a DC current flows across the load resistor.
With an understanding of the behavior of the phase cascade shown in the  ¥ N limit, we now consider the case of a finite lattice. The displacement in the sinusoidal curves for successive rows, i.e.
- Because N is even, replacing  + j j N 2 changes the sign of both cosine terms. Since the minimum over all j is taken, the factor of (−1) i can be dropped. We can also replace the minimum with the maximum, with a change of sign: The voltage of the horizontal strip at the top of the array in figure 1(a) is The voltage difference between the two horizontal strips can be obtained by subtracting these two equations. It is convenient to write this as  For the first part of equation (11), using equation (8), where we define ωτ=π/N+π/N 2 , and we have used the periodicity of the summand with respect to  + i i N to change the limits of the sum. This is a periodic function of time, with a period of 2π/(ω N 2 ). If w p < < t N 0 2 , 2 which covers one time period, every term in the sum on the right hand side of equation (13) is maximized at j=0. Thus the minima and maxima of c N (t−τ)−c 0 (t−τ) occur at The ratio of the two is p ( ) N cos . 2 Thus for large N, tends a DC voltage of magnitude N 2 V 0 /π, with ripples whose frequency is w N 2 and height is π V 0 /(2N 2 ). We now turn to the function d ( ) V t . In equation (12), it is easy to see that replacing w w p is equivalent to  + j j 1, i.e. the function is periodic with a period 2π/(Nω). Furthermore, δ V(t)=0 unless the two cosine functions have their maxima at different values of j. The first cosine has its maximum at j=0 for while the second cosine has its maximum at j=0 for −2π/N<ω t+2π/N<0. Thus δ V(t) is non-zero within equally spaced narrow time intervals 0<ω t+2mπ/N< 2π/N 2 . The maxima of δ V(t) occur when ω t+2m π/N=π/N 2 . It is easy to evaluate equation (12) and verify that Combining with the result of the previous paragraph, Δ V(t) has a ripple of height π V 0 /(N 2 ) and frequency Nω and a ripple of height π V 0 /(2N 2 ) and frequency N 2 ω, superimposed on the DC voltage N 2 V 0 /π. We now compare the square lattice with N 2 voltage sources to N 2 full-wave rectifiers in series. For a distributed voltage source, it is reasonable to choose the amplitude of the individual sources to scale as ∼1/N, i.e. V 0 =V c /N. Then, the DC voltage for the square lattice is N V c /π, compared to p NV 2 c for the rectifiers in series. On the other hand, for large N there is only one diode per source instead of four. As mentioned earlier, for a load R L the maximum current flowing through each diode is Similarly, for the square lattice with idealized diodes, the maximum current is N V c /(π R L ) because at any instant the current flows from top to bottom along a unique set of diodes. However, with realistic diodes, the current is distributed over numerous parallel 'channels', reducing the maximum current. (Without numerical simulations, it is not obvious whether the number of channels n is O(1) or ( ) O N .) Thus for the same current flowing through the load resistor, it is easier to exceed the maximum rating of the diodes for rectifiers in series. The maximum voltage across a diode when it is reverse biased is V 0 =V c /N for the rectifiers in series. For the lattice, the maximum reverse biased voltage can be approximately obtained from the continuum approximation, as Our results show prefect rectification and breaking of Lorentz reciprocity can be achieved using a nonlinear network consisting of a lattice of AC sources. This work provides an interesting example of an exact result that can be established for an infinite nonlinear network, consisting of ideal bridge rectifiers that are of interest for distributed energy generation. Simulations with realistic diodes confirm the exact results derived here. Importantly, the phase cascade sequence described is independent of frequency, and perfect rectification can be achieved for a wide range of frequencies, which makes it attractive for energy harvesting and distributed energy networks. A fabricated circuit constructed of light emitting diodes and phase cascaded AC sources confirms the results in the paper.

Numerical simulations
Simulations were performed in MATLAB Simulink, using Silicon diodes, with model parameters selected for a General purpose Rectifier (Fairchild 1N4004). The forward voltage was 0.8 V, with an internal resistance of 0.001 Ω, inductance 0. A snubber capacitance of 250 nF., and snubber resistance of 500 Ω were used to suppress voltage transients, but the values did not affect the steady state results discussed in the paper. More sophisticated models with nonlinear behavior arising from the diode effective capacitance were not considered. Parasitic effects in nonlinear circuits can give rise to non-local behavior affecting time synchronization and generate inhomogenieties in the periodic array. Inhomogeneities in in the electric fields and associated device characteristics have been shown by Xu and Teitsworth [23] to lead to bifurcations and the emergence of multiple current branches. The current is now a multivalued function of the driving voltage and the response is history dependent. Such effects are important in a variety of complex electronic systems [23] ranging from semiconductor superlattices [24] to quantum cascade lasers [25], but were not considered in our steady state analysis of a network circuit for power production. In our simulations, the amplitude of the AC sources was set at 10 V, and the frequency was set to 10 Hz, driving a load a 1 kΩ load resistor. Current probes were used to measure the load current, and the current and voltage difference across selected diodes and AC power sources. The load current was used to derive the load power. The lattice sizes were varied from = N 1 2 to a maximum of N 2 =64. Shown in figure 2 are the results of the simulation of the power for the 2-D square lattice with the Phase cascade array.
The simulations were used to calculate the representative duty cycle of the phase cascade array and compared to the series configuration, as shown in figure 3. It is evident that in the phase cascade array, the peak current is lower, and the duty cycle also lower than in the series configuration, reducing both thermal load and easing the limits on the forward current. One figure of merit is the efficiency of the phase cascade array estimated by considering the power delivered to the load compared to the power supplied to the sources. Fast Fourier transforms of the time series were used to calculate the power spectrum in the load resistor. Figure 4(a) shows a comparison of the power spectrum for the phase cascade array compared to the series configuration. The first consideration is the fraction of the power supplied to the load resistor compared to the total input power supplied by all the sources. For an ideal diode array, the efficiency is 1, but for the circuit shown in figure 1(a) with realistic diodes, the efficiency was 0.945 ± 0.005. A second perhaps more relevant figure of merit is the  noise-to-signal, or the relative standard deviation. The mean load powerP and standard deviation s P for the 6×6 phase cascade array was 11.79±0.05 W, corresponding to a coefficient of variation of s s ºP v P 0.4%, for the 6×6 array even in the absence of any filters. The question of how time synchronization affects the performance of the proposed phase cascade array circuit was addressed by adding random phase noise δ f to the cascaded phase f c of each source. Figure 4 (b) shows the time series of the load power for several realizations {δ f} of random phase noise configurations. In a lattice of random phase angles distributed uniformly over (0, 2π) significant power now appears at all harmonics at the expense of DC power, as expected. The load power for the random phase configuration was 12.03±4.66 W, with σ v ∼39% showing an enormous increase in the relative standard deviation. For configurations in which the phase noise is distributed uniformly randomly over a narrow range (0, 2π/N 2 ) and then added to the fixed phase angle in Eq(3), the load power was found to be 11.93±0.16 W, with σ v ∼1.3 %. The results suggest that the phase cascade is robust against small local phase angle variation. For ideal diodes in an infinite phase cascade array, the efficiency will tend to 1 as expected from the exact analytical results obtained in this paper.