Detection of charge motion in a non-metallic silicon isolated double quantum dot

As semiconductor device dimensions are reduced to the nanometer scale, effects of high defect density surfaces on the transport properties become important to the extent that the metallic character that prevails in large and highly doped structures is lost and the use of quantum dots for charge sensing becomes complex. Here we have investigated the mechanism behind the detection of electron motion inside an electrically isolated double quantum dot that is capacitively coupled to a single electron transistor, both fabricated from highly phosphorous doped silicon wafers. Despite, the absence of a direct charge transfer between the detector and the double dot structure, an efficient detection is obtained. In particular, unusually large Coulomb peak shifts in gate voltage are observed. Results are explained in terms of charge rearrangement and the presence of inelastic cotunneling via states at the periphery of the single electron transistor dot.

spinless matrix. However reading out the spin state and implanting single ions with high precision is challenging. So, we have fabricated an isolated double quantum dot (IDQD) coupled with a single electron transistor (SET) for charge detection both from p-doped silicon. In this approach, quantum computation is carried by molecular charge states in the IDQD [5] that are robust against decoherence [6] and noise is minimised by the creation of a physically isolated structure. In this article, we show that the existing impurities in the device controlled the electrostatic coupling between the SET and the IDQD so that, under specific conditions, the device behaves as coupled quantum dots in parallel and the SET is able to detect a charge motion in the IDQD by either the tunneling or cotunneling effect.
The devices are fabricated from a silicon-on-insulator (SOI) substrate with a 45 nmthick silicon layer, doped with phosphorous at a density of ∼ 2.9 10 19 cm −3 . High resolution electron beam lithography and reactive ion etching were used to pattern a single dot of diameter ∼75 nm with 30-nm width tunnel barriers for the detector as well as an isolated double dot of ∼75 nm diameter. After oxidation the silicon dots were reduced to 60 nm diameter with a surrounding oxide of 30 nm. The devices are controlled by two in-plane gates that are formed from the same SOI layer (Fig. 1), one controlling the SET and the other the double dot. A custom low temperature complementary metal-oxide-semiconductor circuit (LTCMOS) is used to provide the various voltages to the device and to measure the SET current through a charge integrator. This arrangement enabled an efficient noise gain suppression by using shorter cabling between the measurement circuit and the device as well as a sensitive and fast current detection compared to conventional measurements using room temperature source-measure units. [7] All lines were filtered by single stage low-pass resistance-inductance-capacitor filters with a cut-off of about 80 kHz to suppress electrical noise and minimize the electron heating. The device and the filters are protected from radiated electrical noise by a Faraday cage. Both the device and the LTCMOS were kept at 4.2 K by immersing the probe into liquid helium for preliminary assessment. Several devices were processed identically, some from different wafers. All showed similar characteristics and behaviour at low temperature or during thermal cycling.
The dependence of the SET source drain current I SD on the SET and IDQD gate voltages (respectively V g and V c ) is complex and characterised by the presence of short periodic oscillations on a large and aperiodic conductivity background (Fig. 2a). Both features have their position varying in gate voltage. This gives rise to lines of high or low conductivity in the gate dependency diagram (Fig. 2c) with a slope ∆V g /∆V c ∼0.25±0.01 for the short oscillations and ∆V g /∆V c ∼0.23±0.06 for the background features. For the most negative IDQD gate values, the leakage current is still relatively small compared to the source-drain current but high voltages may induce non-linear effects in the system especially through a dependence of the capacitance values in gate voltages. [8] This may explain the curvature observed for V c < −4 V. The aperiodic conductivity background is only reproducible within a single thermal cycle which suggests the presence of charging effects and the probable influence of localised states as discussed previously. [7] Indeed a thermal cycle allows localised electrons that have been thermally excited to recombine with a different trap during cooldown. So the electrostatic potential due to these charges is modified each time the device is thermally cycled and short periodic oscillations may be shifted in gate voltage. However their period is not altered and remains close to 96 mV.
From the measurement of the variation of the differential conductance with source-drain bias, it is possible to infer the various capacitances of the problem and deduce an estimated dot size. Unlike metallic system, Coulomb diamonds appear strongly modulated (Fig. 3a) and, in some ranges of V g , tunnelling is anomalously suppressed or enhanced. However, the structure remains roughly periodic and little variation is observed in the gate level arm value. From statistical analysis in the range 4.5 V < V g <7.5 V we obtain C g = 1.6 ± 0.2 aF, C D = 9.2 ± 3.5 aF and C Σ = 16.5 ± 3.8 aF respectively for the gate, drain and total SET dot capacitance. This gives a charging energy E C ∼ 5.1 ± 1.3 meV and a dot size of 40± 9 nm using the self capacitance for a flat disc. So it is expected that the short periodic oscillations corresponds to the usual Coulomb blockade oscillations. The difference with the value determined by SEM imaging results from the thickness of the oxide surrounding the SET island and enhanced sidewalls depletion effects due to electron trapping.
The aperiodic background as seen in figures 2a and c gives rise to the convolution of Their associated self capacitance is compatible with a dot diameter of 17 to 33 nm, a value close to the SET diameter. This is because of their very small gate level arm (∼0.02).
This suggest that most of the localised states are found in a ring around the SET island.
These traps can originate from broken silicon-oxygen bonds on the etched surfaces as well as dangling bonds at the Si-SiO 2 interface but also from phosphorous atoms that have been incorporated into the oxide to create non-bridging oxygen states. The trap occupation number is controlled by the electrostatic potential created by the gates. Occupied states strongly enhanced the SET depletion giving a smaller effective dot diameter. Figure 3 shows how these traps also strongly affect tunnelling in the SET island. Away from the centre of the large diamonds, Coulomb diamonds are properly formed (zone A) whereas at the centre, second order tunneling process is suppressed in the SET island (zone B) and SET diamonds overlap. Traps that have been ionised by the gate potential may favour cotunneling or sequential tunneling events by providing extra energy levels for tunneling whereas filled traps increase the charging energy so that electrons are Coulomb blocked from tunneling into the island.
Furthermore, we observed that the conductivity is strongly enhanced or suppressed along specific lines in the gate dependency diagram (black and white lines in Fig. 2b respectively).
Their slope is ∆V g /∆V c ∼0.43± 0.05 and well agrees with simulations using FASTCAP 3D capacitance modelling. [9] In a device containing a SET and no double dot, these features are not observed suggesting their origin from the presence of the IDQD. The presence of a double quantum dot near the SET island renormalises the various capacitances in the system. But the gate controlling the double dot or IDQD gate also influences the electrostatic environment of the SET in two different ways. The first is a direct coupling to the SET island, although weaker in the current device configuration than the one between the SET gate and the SET island. This direct influence is characterised by the monotonic variation of the Coulomb blockade peaks positions in gate voltage with IDQD gate voltage, which slope in the gate dependencies map reflects the ratio between the IDQD gate to SET capacitance and the SET gate to the SET capacitance. The second way of influencing the SET environment is indirectly by means of the double dot. This appears as conductance maxima following lines in the gate dependency diagram with a different slope compared with the usual short SET gate oscillations (Fig. 2b). The IDQD gate induces charge displacement in the IDQD that modifies the electrostaci potential sensed by the SET. In this case the slope is approximately given by the ratio between the double dot to SET capacitance and the SET gate to the SET capacitance. Any non-linearity in the variation of conductance peaks may then be explained by a significant change in the double dot electronic configuration.
Several situations in the gate dependency diagram could occur when the feature attributed previously to the double dot crosses a Coulomb peak line. The conductivity may be locally suppressed or enhanced without modifying the Coulomb peak dependence in gate voltage (Fig. 4a). In this case there is no effective coupling between the double dot and the SET. In the case of weak coupling, the Coulomb peaks may deviate from their original position so that locally the charging energy is reduced (Fig. 4b). Finally a clear and abrupt shift in the Coulomb blockade peak position may appear at a given IDQD gate voltage V c (Figs. 4c and d) indicating a strong coupling.
The observed shift between each branch (V c < V c and V c > V c ) is about 50±14% of the Coulomb blockade oscillation period (Fig. 4c). While following the Coulomb peak and sweeping the IDQD gate across V c there is always one single electron tunneling event in the SET island because the shift is always less than a Coulomb period. However, across V c there is a net change in the occupancy of the double dot because the double dot feature corresponds to a conductance maximum. This could be induced by either a dynamic charge transfer, for example from the upper to lower dot or vice-versa, or a significant change in the electron distribution of the double dot. This change is sensed by the SET and, in both cases, this situation is equivalent to a net charge motion from either the upper to lower dot of the double dot structure or vice-versa. Theoretical predictions for the value of the shift are of the order of 5 % in the case of charge movement in nanocrystalline silicon quantum dots that are detected by a multiple-gate single-electron transistor [10]. The experimentally greater value could be explained by a significant charge reorganisation in the IDQD prior to a tunnelling event in the SET [11]. This is possible because of the presence of both disorder, electron interactions in the system and a strong dependence of the capacitance on the electron distribution in the SET island.
In some cases, hexagonal structures similar to those observed in coupled quantum dots in parallel [12] appear in the charge stability diagram and blockade regime is lifted between two adjacent Coulomb peaks (Figs 4d and 5a). The various capacitances of the problem are extracted following Yamahata's procedure [13] that is applicable for the present geometry including a SET and a IDQD. Good agreement between experimental and theoretical values for the capacitances is obtained for an effective relative permittivity of 1.7. This low value reflects that the SET and the IDQD are surrounded by trenches filled with liquid helium with permittivity close to 1. Previous results imply that the value of the observed shift is given by the ratio between the IDQD-SET capacitance and the IDQD self-capacitance, which is found to be 31% theoretically. [14] However, in our device the IDQD is physically and electrically isolated from the SET so that no charge transfer can occurs between them. This suggests that a charge motion in the double dot induced a single electron tunneling event in the SET island with charge conservation. Cotunneling is a possible cause and would imply a tunneling time much shorter than the time scale for electron reorganisation in the island.
The presence of simultaneously a blockade lifting and a voltage shift could indicate that charge motion detection in the SET is preceded by charge reorganisation in the SET island before the addition of an electron. It is possible that the presence of localised states and the presence of phosphorous donors influences this rearrangement. In conclusion, it appears that localised states strongly influence the electrostatic coupling between the SET island and the IDQD so that, in some region of the gate dependency diagram, the SET becomes sensitive to charge motion in the IDQD. Detection occurs by either a single tunnelling event leading to a shift of the Coulomb blockade peaks in position or by the cotunneling effect leading to the formation of hexagonal structures similar to the ones observed in coupled quantum dots. This suggests that the present device arrangement is a viable architecture for carrying quantum computation via molecular charge states or for quantum automata protocols. The