Weak link nanobridges as single flux quantum elements

This paper investigates the feasibility of using weak link nanobridges as Josephson junction elements for the purpose of creating Josephson circuits. We demonstrate the development of a single-step electron beam lithography procedure to fabricate niobium nanobridges with dimensions down to 40 nm × 100 nm . The single-step process facilitates fabrication that is scalable to complex circuits that require many junctions. We measure the IV-characteristics (IVC) of the nanobridges between temperatures of 4.2 and 9 K and find agreement with numerical simulations and the analytical resistively shunted junction (RSJ) model. Furthermore, we investigate the behaviour of the nanobridges under rf irradiation and observe the characteristic microwave-induced Shapiro steps. Our simulated IVC under rf irradiation using both the RSJ model and circuit simulator JSIM are in agreement with the experimental data. As a potential use of nanobridges in circuits requiring many junctions, we investigate the theoretical performance of a nanobridge-based Josephson comparator circuit using JSIM.


Introduction
Nanobridge weak links are realised by creating a superconducting constriction between two superconducting electrodes. When the constriction is sufficiently small (comparable to the Ginzburg-Landau coherence length) the weak links behave as Josephson junctions and can be used in place of more traditional Josephson tunnel junctions [1]. The majority of the research in recent years has been focussed on the implementation of nanobridges to form nano-superconducting quantum interference devices (nanoSQUIDs) which allow the SQUID loop to have a very small sensitive area useful for detection of single magnetic nanoparticles amoung other uses [2].
In this work, we investigate the potential for nanobridge weak links to be used as Josephson junctions for more complex low-T c single flux quantum (SFQ) circuits which can be used to perform amplification, logic, or readout at lowtemperatures [3]. An advantage of nanobridges over more traditional tunnel junction devices is the ability to fabricate using only a single-step lithography process [4]. As well as being a simpler process, this method allows easier integration with other low-T c circuits and nanosensors fabricated by lithography at the same time. One example discussed later in this paper is a low-T c SFQ comparator circuit that could be employed as a null detector for voltage metrology. Josephson junction arrays used for voltage metrology are designed to be operated at temperatures similar to the devices discussed in this paper ( -4.2 9 K) [5]. The nanobridges must exhibit the Josephson effect with well understood critical current, normal-state resistance and junction dynamics, such that they can be accurately modelled in more complex multi-element circuits. In this paper we demonstrate that our devices exhibit characteristic microwave-induced Shapiro steps when the weak link is coupled to a high-frequency signal. In addition, to use the nanobridges in SFQ elements with many (∼20) junctions we must be able to reliably fabricate devices with the desired critical currents and resistances which are compatible with the loop inductances we are able to create.

Fabrication of devices
The main body of work using SFQ circuits has either used complex multi-layer niobium technology-usually utilising niobium foundry fabrication [6], or high-T c fabrication techniques such as bicrystal junctions [7] and ramp edge junctions [8]. The weak links fabricated in this work aim to reduce the complexity of the fabrication by using only a single-step lithography process. As the entire structure is made out of the same material there is no need for additional metal and oxide layers required in the case of Josephson tunnel junctions.
The nanobridge devices are fabricated using a combination of electron beam lithograpy and dry etching using an aluminium hard mask. A 150 nm thick layer of niobium is sputtered onto a silicon substrate, on top of which 70 nm of Al is thermally deposited. Nanobridges with a width of 40 nm and an electrode-electrode separation of 100 nm are defined using an electron beam. The Nb is dry etched into the Si substrate using a CHF SF 3 6 plasma. Finally, the Al hard mask is removed using a standard photoresist developer. A scanning electron micrograph of an example weak link is shown in figure 1.

Low temperature measurements
Electrical measurements of the nanobridge weak links are carried out using a dip probe in a helium dewar (4.2 K). The temperature is varied by raising and lowering the probe and the temperature is monitored using a silicon diode thermometer mounted to the same copper plate as the sample. In order to determine the junction parameters such as I c and R N , as well as film properties such as the critical temperature T c , the weak link current-voltage (IV )-characteristics (IVC) are measured in a four-terminal configuration. The critical current was determined for 12 nanobridge weak links and found to have a spread of ±17%. Figure 2(a) shows the IVC of one of the weak links at = T 4.4 K. The IVC shows hysteretic behaviour; as the applied current I is increased the voltage remains at zero until the critical current I c is reached, at which point the voltage increases sharply and then tends to = V IR N , the IVC becoming linear. When the current is subsequently decreased, the weak link remains in a resistive state below I c , only returning to the zero voltage state at a lower current defined as the retrapping current I r .
In conventional tunnel junction Josephson junctions the origin of this hysteresis can be explained by the inter-electrode capacitance described in the resistively and capacitively shunted junction model [9]. However, for lateral junctions  3too small to explain the hysteresis observed.
Instead, the origin of this hysteresis is attributed to thermal heating of the weak link [11][12][13]. As the junction enters the finite voltage state, power is dissipated resulting in an increase in temperature of the weak link and the neighbouring regions of the electrodes. The weak link remains in this dissipative state and can only return to a superconducting state when the current is reduced to a lower current, the retrapping current, which causes the observed hysteresis. Hysteresis is undesirable for SFQ operation as the junction may not return to the superconducting state between voltage pulses.
As the critical current reduces with increasing temperature faster than the retrapping current it is possible to achieve a non-hysteretic state close to T c . Figure 2(b) shows the IVC of the same device measured at = T 7.7 K where no hysteresis is observed. The device IVC are measured at a number of temperatures as shown in figure 2(c)-we find that for > T 7.2 K the weak links are in a non-hysteretic regime. As we have a usable non-hysteretic temperature range greater than 1 K we do not add any gold cap to the niobium to extend the non-hysteretic region to lower temperatures by improving heat extraction.
We investigate the Josephson behaviour of our junctions at = T 7.8 K in their non-hysteretic state. Figure 3 shows both experimentally obtained data and the results of numerical simulations. The red circles are the experimentally measured data points of a single junction nanobridge. To demonstrate that the devices exhibit close to ideal junction behaviour we plot (dashed red line) the output of the resistively shunted junction (RSJ) model for T=0 and b  1 Although the analytical model is only valid for T=0 we expect it to be a good approximation for our measurements performed at = T 7.8 K due to minimal thermal noise rounding of our devices at this temperature [15]. As a validation of our Josephson simulations carried out later in this paper we also plot the JSIM output for a single Josephson junction (dashed blue line). JSIM is a circuit simulator optimised for solving superconducting circuits including nonlinear Josephson junction elements [16]. The same nanobridge is then measured with an applied rf signal (black circles). From the IVC we observe characteristic microwaveinduced Shapiro steps [17], a signature of the ac Josephson effect, and thus of Josephson behaviour. The plateaus in the IVC form at voltages = ( ) V n hf e 2 where f is the frequency of the applied rf current. The horizontal dashed lines and the right-hand axis of figure 3 demonstrate that the Shapiro steps form at the expected voltages for an applied rf current at 20 GHz. The solid black line is the output from JSIM when the junction is coupled to an rf current. The agreement between our experimental data and the simulations of the induced steps provides further validation of the use of JSIM. Finally, we numerically solve (using Matlab) the first-order ordinary differential equation describing the RSJ model with an applied rf current [18,19]. The solution to this equation is shown in figure 3 by the dashed black lines. Both the numerical solution and the JSIM simulation reproduce the Shapiro step width and width evolution in current as exhibited by the measured data. Note that the sharp edges in the numerical solution is due to omission of thermal noise unlike both the experiment and the simulation.

Design of a nanobridge-based Josephson comparator
We now consider a potential application of nanobridge-based circuits-a Josephson comparator. The interest in this circuit is its potential application as a null detector in electrical metrology. Null detector performance is frequently a limiting factor in the application of quantum electrical standards to laboratory measurements [5,20].
A Josephson comparator (see figure 4) is used as a decision element in superconducting electronics [21] and consists of two Josephson junctions connected to a generator  . Josephson comparators have already been successfully fabricated using multi-layer niobium tunnel junctions [22,23] as well as high-T c bicrystal Josephson junctions [7].
The circuit of interest is shown in figure 4 and is based on the design described by Oelze et alwho fabricated their comparator circuit using high-T c YBCO bicrystal junctions [7]. One reason for choice of this design is that the authors report 15% spread of I c and still present robust operation of their device-this figure is close to our measured spread of 17%. This design has the advantage that it can be realised with a single superconducting layer. Implementing it with low-T c nanobridges rather than high-T c bicrystal junctions further simplifies the physical layout since there is no constraint to align the weak links along a grain boundary.
The full circuit consists of a generator junction, JTL and a buffer/comparator stage. The generator junction is biased by a DC current which causes the Josephson junction J g to produce quantized voltage pulses, the repetition frequency of which depends on the bias current. Each SFQ pulse propagates along the JTL reaching the buffer/comparator stage. When a pulse arrives at the comparator (junctions J 3 and J 4 ) the switching decision is determined by the value of the input current I x . In the ideal case, every generator pulse would be solely reproduced by either J 3 or J 4 depending on whether the input current I x is greater than or less than zero. In reality there is a region of decision uncertainty about = I 0 x where the generator pulses are not solely reproduced by either junction J 3 or J 4 but are instead equal to a sum of the switching events that occur at junctions J 3 and J 4 . This region is typically defined as the grey zone and its width DI x is a useful measure of the comparator's resolution.
The work presented by Oelze et alshows that the grey zone width is affected by both the generator frequency and the device temperature. It was also shown that the grey zone was affected by the I R c n product, where I c is the junction critical current and R n is the normal-state resistance. In this work we adapt this circuit to our nanobridge-based designs and the subsequently different parameters such as I c , R n , loop inductance, L, and temperature, T.

Numerical simulations
The simulations are performed using JSIM. Thermal noise is taken into account in our simulations using an additional JSIM package which enables simulation of the thermal noise in the time domain [24]. To include noise, a noise current source is added to the shunt resistor with a spectral density of where T is the bath temperature. The measure of comparator performance is determined by the decision uncertainty DI x . To investigate how the decision uncertainty varies with junction parameters such as I c we consider a device with m = I R 300 V c n (value determined from a measured device at = T 7.6 K). We use a capacitance » -C 10 F 15 corresponding to b c of the order of 10 −3 . We choose to operate the comparator at a frequency of » f 93 GHz which is less than the limit imposed on a typical SFQ element, 145 GHz max c n 0 c 0 [3]. The buffer/ comparator loop size is chosen such that b = F < LI 2 1 L c 0 (in our case b = 0.86 L ) in order to avoid flux storage [25]. Figure 5 shows the output voltage V dc versus the input current I x for comparator circuits with different values of critical current. We consider the case that the critical current is changed by varying junction dimensions during fabrication therefore the junction resistance is scaled such that I R c n is constant and the loop inductances are scaled such that b = 0.86 L . The grey zone width (DI x ) is determined from the model output using the equation where I th is the threshold current. The model output is normalised between 0 and 1 in order to determine the switching probability P J3 . A least squares fit of equation (3) is then used to determine the grey zone width which is defined as the current range DI x corresponding to between 0.1 and 0.9 of the switching probability [26]. Figure 5(b) shows that the grey zone width increases as the critical current increases. The differential reduces as the critical current increases as shown by figure 5(c). One well documented advantage of using superconducting SFQ circuits is the high-speed operation [6]. To this end, simulations were performed to investigate the effect of generator frequency on the circuit characteristics such as the grey zone width and V I d d x dc of the grey zone. Figure 6 shows the grey zone width and V I d d x dc as a function of the generator frequency. As the frequency is increased the grey zone DI x increases. Conversely as the frequency is increased the sensitivity or V I d d x dc is reduced. The simulation results are in line with those of Haddad et alwho also show such a compromise between the comparator operation speed and the comparator sensitivity [27]. The simulations demonstrate the functionality of the comparator as a null detector for electrical current. The figure of merit as an amplifying device is the rate of change of output voltage with input current, . The highest sensitivity demonstrated in our simulations is W 10 corresponding to a generator frequency of 60 GHz and a critical current of m 50 A. Figure 5 indicates that reduction of I c below m 50 A will yield a higher V . The critical current of the nanobridge weak links can be reduced by decreasing the bridge width and also the film thickness. In this way, an increase of to the 50-100 Ω range might be possible.

Conclusion
We have successfully fabricated niobium nanobridges using a single-step lithography process. The measured IVC show that there is significant hysteresis below 7.2 K due to Joule heating. By operating at a stabilised temperature between 7.2 and 8.5 K a non-hysteretic region can be accessed. The non-hysteretic range could be extended to lower temperatures in the future through further geometry and material considerations [28][29][30]. We have performed measurements of the nanobridge weak links and observe characteristic Josephson junction behaviour of Shapiro steps when coupled to an rf current. Our simulated IVC under rf irradiation using both the RSJ model and circuit simulator JSIM are in agreement with our experimental data. The use of JSIM is extended to a Josephson comparator circuit in which the variation of junction critical current on comparator performance is investigated. We find that as the critical current is reduced the grey zone is also reduced. The simulations demonstrate the functionality of the comparator as a null detector for electrical current.

Acknowledgments
This work is funded as part of two feasibility studies funded by Innovate UK: Project numbers 131874 and 102677. Cofunding supported by the UK NMS Electromagnetics and Time Programme and the EPSRC. CDS acknowledges AAdan for help with the initial setting up of JSIM, L M Bobb for assisting with the development of python simulation automation, I Rungger for useful discussions regarding numerical solutions, and J C Gallop for useful comments on the manuscript. The authors thank J P Griffiths and G A C Jones (Cavendish Laboratory, University of Cambridge) for the electron beam lithography. reduces as I c increases for a given frequency. Note that V dc refers to the voltage measured across J 3 .