Kirkendall void formation in reverse step graded Si1−xGex/Ge/Si(001) virtual substrates

Formation of Kirkendall voids is demonstrated in the Ge underlayer of reverse step graded Si1−xGex/Ge buffer layers grown on Si(001) using reduced pressure chemical vapour deposition (RP-CVD). This phenomenon is seen when the constant composition Si1−xGex layer is grown at high temperatures and for x ≤ 0.7. The density and size of the spherical voids can be tuned by changing Ge content in the Si1−xGex and other growth parameters.


Introduction
The Kirkendall effect occurs when a lattice has atoms of different diffusivity on either side of an interface and these atoms move across the interface at different rates, through vacancy exchange, leading to a supersaturation of lattice vacancies on one side of the interface and the development of pores [1,2]. Kirkendall voids have been a known phenomenon in nanomaterial interfaces, such as: solder joints (e.g.: Cu/CuSn interfaces) [3] and bonding between metals (e.g.: Au and Al) to semiconductors in integrated circuits [4] and photovoltaic cells [5,6]. Plastic deformation caused by thermal aging and electromigration have been shown to aid nucleation and growth of voids leading to poor electrical conductivity to the contacts.
Due to the extremely low inter-diffusion rates of Si and Ge [7,8], this effect is reported to occur mostly in nanowire and nanosphere structures [9] that use extended annealing [10,11] or electro-reduction of SiO 2 and GeO 2 (e.g. to create SiGe nanotubes for Li-ion battery electrode applications [12]) with minor developments in thin film [13]. Nevertheless, porous substrates have valuable thin film applications, such as for photovoltaics, through their ability to create strain relaxed Si 1−x Ge x buffer layers on Si(001) with low threading dislocation density (TDD). Previously, such cavities have been created through the complex process of He + or H + ion implantation and annealing [14,15] rather than through the Kirkendall effect.
Tensile strain relaxation has been employed in reverse linearly graded (RLG) Si Ge Ge Si 001 1 x x -( ) virtual substrates to create strain tuned platforms of 4 10 cm 6 2 -TDD and 3 nm rms roughness (R rms ) [16]. This type of virtual substrate has led to breakthrough high hole mobility in Ge quantum well channels, both at room temperature [17] and 12 K [18] for spintronics applications [19]. Such buffer layers are also suitable for SiGe superlattice structures for quantum cascade lasers [20] and for GaAs integration in optoelectronic devices. However, both the Ge underlayer and the Si 1−x Ge x layer in these RLG buffers are under 0.2% tensile strain and, as strain energy increases with increasing thickness, they are susceptible to cracking [21]. This is especially true when the Ge content is high and the heterostructure is more than 2.7 μm thick. As a means to eliminate cracks, the starting point of this investigation was to reduce the total RLG buffer thickness by omitting the compositionally graded layer. Usually, this graded layer acts to gradually relieve misfit strain in Si 1−x Ge x buffers [22] and thereby limit surface roughening as well as dislocation nucleation and multiplication; by omitting it, the high tensile strain relaxation and high growth temperatures normally cause a large misfit dislocation network to be generated at the Si Ge Ge 1 x x -interface, which provides a vacancy exchange path and creates cavities in the Ge underlayer.
In this paper, we analyze the effect on surface morphology, residual strain and defect levels of varying Ge composition in a reverse step graded structure in order to optimise the choice of parameters for a thin, strain balanced buffer.

Experiment
The samples for this work were grown by RP-CVD using an ASM Epsilon 2000. A very high quality Ge underlayer was first grown directly on a 100 mm diameter, 525 μm thick, on axis (+/− 0.5°) Si (001) substrate using GeH 4 precursor. A low temperature layer was grown at 350°C, up to 95 nm thick, followed by a high temperature layer which was grown at 550°C to a thickness of 835 nm. The layer was not annealed, in order to prevent excessive thermal budget being supplied, and thereby minimising the tensile strain in the layer. Reverse step graded (RSG) Si 1−x Ge x layers were subsequently grown on the Ge underlayer at 850°C using a SiH Cl 2 2 precursor. The RSG section was grown by keeping the GeH 4 flow rate constant and making stepwise increases to the SiH Cl 2 2 flow rate, in adherence with the relationship set by Suh & Lee [23]. The growth time for sample 2 was 120 s and for all subsequent samples was 180 s. The layers grown were characterised using cross-sectional transmission electron microscopy (X-TEM) in the 004 diffraction condition to measure thickness, AFM to measure surface roughness, high resolution x-ray diffraction (HR-XRD) to measure strain, and composition and plan view TEM to measure TDD. The list of samples is shown in table 1 and the buffer schematic is shown in figure 1.

Sample 1: Ge underlayer
HR-XRD reciprocal space maps (RSM) show that the Ge underlayer is under 0.22% tensile strain due to the thermal expansion coefficient mismatch to Si(001). Given that the lattice mismatch between Ge and Si(001) is greater than 2.3%, a predominantly Lomer misfit network of dislocations is formed at the interface between the Ge epilayer and Si substrate [24]; however, 60°misfits are also formed which can dissociate under tensile strain and recombine to form perfect Lomer dislocations, as shown in figure 2. The distance between Lomer dislocations required to achieve strain relaxation in the layer is 25a 2 9.6 nm si  = [25], where a Si =∼5.431 Å is the lattice constant of Si, which agrees with the distance measured from HR-XTEM ( figure 2(b)). The Ge underlayer has an R rms of 0.92 nm and a TDD of 6.2 10 cm 10%.    Grading to Si Ge 0.1 0.9 in a 230 nm thick layer creates a 60°m isfit network to the Ge underlayer, due to the −0.62% lattice mismatch, as seen in figure 3. This leads to modified Frank-Read multiplication and a 100-fold increase in TDD from the Ge underlayer, to 2.6 10 cm 10%. interface, is lower than in sample 1, suggesting some inter-mixing at the Ge/SiGe interface. An increase in surface roughness to 2.53 nm +/−5% is also measured, partly due to the heavy network of threading dislocations. HR-XRD measurements (figure 4), show that the Si Ge 0.1 0.9 layer is under 0.19% tensile strain. Reducing the Ge content further to x=0.84, which increases the misfit to the Ge underlayer to −0.919% with a maximum layer thickness of ∼460 nm, causes elastic strain relaxation [26] as a means to reduce bulk strain energy per unit volume [27]. Figure 5 is an X-TEM image of sample 3 and shows the severity of the undulations formed in this epilayer due to the elastic strain relaxation. The measured R rms for this sample reaches a maximum for this study with a value of 71.5 nm, as seen in figure 6. We presume that if the layer were grown any thicker, then the surface would return to 2D Frank van Der Merwe growth to minimise surface free energy [28]. The 60°m isfit network at the Si Ge Ge

+ --
At this point dislocations can nucleate either by high stress at the cusps of 3D islands, which have a reduced nucleation barrier for misfit dislocations, or on pre-existing threading dislocations in the Ge underlayer, which are able to nucleate heterogeneously to    x -buffer layer. It is hypothesised that this is caused by high temperature Ge diffusion into the Si Ge 1 x x buffer layer via vacancy exchange, through the 60°misfit network at their interface, akin to the Kirkendall effect. The heavy atomic packing density in {111} glide planes means that vacancy exchange could happen readily for {111} slip system dislocations, which may also explain why the Lomer network at the Ge underlayer/substrate interface remains intact as the slip plane is (001) and no perceivable diffusion has taken place into the substrate.
Images of sample 5 taken via FIB-SEM (figure 8) confirm that the spherical networks have collapsed into voids in some regions of the film through the vacancy exchange mechanism. The density of voids was insufficient to easily find them in high magnification X-TEM; however, the individual voids can be seen in low magnification SEM, with diameters of up to 370 nm. The average observed void diameter was 290 nm +/− 10% and their line density was measured to be 0.39/μm.
The XRD RSMs in figure 9 show that Ge diffusion has caused the Si Ge    ) is much thicker than in sample 3. Consequently, it exceeds a critical thickness for strain relaxation through misfit dislocation formation, which is evidenced by broadening of the Bragg peak. Figure 9(a) also shows that the Si Ge 0.21 0.79 layer is tilted by 0.0179°, which is probably caused by dislocation multiplication at the Si Ge Ge 0.21 0.79 underlayer interface due to the segregation. AFM measurements indicate that the surface of sample 5 is very rough, with R 33 nm 5%. rms = + -However, a noticeable reduction in surface roughness is observed from sample 3 (figure 6) to sample 5, which is because dislocation nucleation is energetically preferred to island formation at this level of lattice mismatch between the Ge underlayer and SiGe epilayer. The lattice mismatch between the Si Ge  0.79 alloy is the most thermodynamically stable layer to form during the Ge diffusion. It remains to be seen whether this particular alloy composition would continue to form if reverse step grading were taken to even lower Ge content layers at this temperature.
An even greater degree of segregation has occurred between the two constant composition layers in sample 7 than in sample 5. This has led to a higher density of Kirkendall voids, which can be captured through the X-TEM images, with the largest observed void being 590 nm +/− 5%. Low magnification SEM images show larger numbers of voids: the average void diameter was 380 nm +/− 10% with a standard deviation of 105 nm and the line density was measured as 0.48/μm. When compared with void measurements in sample 5, this suggests a relationship between Ge content in RSG buffer layers and the density of voids: i.e. the lower the Ge content in the SiGe buffer layer, the greater the vacancy exchange rate which leads to larger diameter voids and more of them. Figure 10 shows that the diameter of the void has reached a size great enough to disturb the Ge underlayer/ substrate Lomer network.  0.47 layer is much thicker. Consequently, strain relaxation takes place by generating a greater density of 60°misfit dislocations between adjacent SiGe layers, through surface roughening and also through the generation of voids in the Ge underlayer. Therefore, the surface of sample 7 is marginally smoother than sample 5 as shown in the AFM micrograph of figure 12 and the comparative R rms plot in figure 15.
As a consequence of a greater 60°misfit dislocation network, a higher TDD count was measured for sample 7. Figure 13 is a typical plan view TEM image of the sample. Due to the lower surface roughness for this sample, slightly better diffraction contrast TEM images could be taken of the surface. Stacking faults are also seen, which are more likely to occur in fcc diamond-like structures relaxing under tensile strain on a (001) substrate. This is because the 90°Shockley partial, which has a higher strain force, leads the 30°S hockley partial in 60°misfit dislocations under such conditions.

Atomic diffusion
From previous studies, the diffusivity D Si Ge  of Si into Ge between 550°C and 900°C follows an Arrhenius function [8,32,33] as does the Ge into Si diffusivity D Ge Si  [7]. The best approximation for the activation energy E a for Si into Ge diffusion on a Si(001) substrate is 3.32 eV [33], whereas for Ge into Si it was found to be between 4-5 eV. As such, for the 850°C growth temperature, D Si Ge  This suggests that Si should diffuse faster into Ge than vice versa; however, the minimisation of the Gibbs free energy is the defining parameter in explaining solid diffusion of a binary alloy [12]. In the case of silicon and germanium, Ge has a lower surface free energy than Si [11], which is why when the Ge underlayer is deposited on the substrate, a coherent interface is produced with minimal Ge diffusion observed into the substrate (as seen in all the X-TEM images). This line of reasoning explains the net diffusion in the RSG buffer, which takes place from the Ge underlayer through to the Si Ge 1 x x -layer. Furthermore, it is presumed that for relaxation under high tensile strain, the generation of large networks of 60°misfit dislocations, which are kinetically inhibited from gliding, causes a drop in E a . This leads to accelerated vacancy exchange diffusion along the heavily packed {111} glide planes from the Ge underlayer into the Si Ge 1 x x -buffer layer.

Void formation
Numerical models have shown that void density and diameter are proportional to strain rates in atomic mismatched regions and to deformation time [34]. This means that voids tend to form preferentially at material interfaces where the interface free energy has reduced, causing a reduction in the energy barrier. However, X-TEM images show that the voids seen in this study are very much in the middle of the Ge underlayer. So despite the nucleation point being at an incoherent interface, such as the undulating 60°misfit network in sample 3 (figure 5) that acts as a non-ideal source and sink for vacancies, migration of the interface and enlargement of the pore seems to cause it to detach from the interface [35]. This phenomenon may be seen in sample 5 ( figure 7), where a diffusion pore is attached to the Si Ge Ge 1 x x -interface. By comparing samples 5 & 7, the emergence and line density of voids in the Ge underlayer appears to be correlated with reducing the Ge content in the RSG Si Ge 1 x x -overlayer. Furthermore, the standard deviation of void size increases from 70 nm in sample 5 to 105 nm in sample 7, which suggests that smaller voids can be nucleated and existing ones increase in diameter as the Si Ge 1 x x -layer is graded to lower Ge percentages. Although void line densities have been estimated for samples 5 & 7, a volume density of voids could not be obtained in this investigation. It is recommended that future work investigates reducing the Ge content in the Si Ge 1 x x -layer further to see if more voids are generated or if an asymptotic limit is ever reached in size and distribution.

Strain variation
When buffers are grown by reverse step grading, in the absence of a graded layer which allows the slow release of lattice mismatch strain, it appears that the tensile strain in the top, constant composition, layer increases and doesn't stay at a constant 0.2%. For a Si Ge 0.1 0.9 step layer the strain is maintained at 0.2% from the Ge underlayer. However, when grading to lower and lower compositions of Ge, with more steps, the strain in the SiGe layer increases. It reaches a maximum at 0.43% for the Si Ge 0.3 0.7 layer in sample 5, in which Kirkendall voids are first witnessed. This formation of voids appears to relieve tensile strain by Ge incorporation in SiGe vacancy sites. When the voids start to form in greater density, the strain in the SiGe step layer drops back to 0.2%, as seen at point (6) in the strain plot of figure 14 for a Si Ge 0.46 0.54 step. The strain then starts to increase again as another lower Ge content step layer is grown, possibly due to the voids in the Ge underlayer.
In figure 14 the green dashed circle highlights the Si Ge 0.21 0.79 layer in sample 7. This layer, and the Ge underlayer beneath it with voids, have marginally higher tensile strain which may be due to the radial stresses around the cavities, but this has not been confirmed.

Surface morphology variation
As mentioned earlier, sample 3 had the roughest surface, this is because, at 84% Ge in the step layer, maximum strain relief is obtained through the formation of surface undulations, figure 15 shows the surface roughness plot. After 84% Ge in the step layer, the roughness reduces as higher densities of 60°misfit dislocations are generated to relieve misfit strain. After the voids start to form in the Ge underlayer a large reduction in surface roughness is observed which further supports the idea that the voids act to relieve strain.

Dislocation density variation
The highest recorded TDD for the SiGe buffer layer in this investigation was for sample 2, where 60°misfits contributed to a value of 2.5×10 9 cm −2 . At this level of TDD, the main dislocation reduction method is thought to be anti-Burger's vector annihilation, as opposed to glide. It is assumed that the layer is not thick enough for dislocation climb. When a Si Ge 0.17 0.83 step layer is deposited on the Ge underlayer, the TDD measured is approximately ten times lower. From 83% down to 70% step graded layers, the TDD is shown to be in annihilation regime. As the growth rate increases for lower Ge content layers in reverse graded structures, thicker layers are deposited and so adjacent SiGe layers undergo strain relaxation through 60°misfit network generation. This leads to a higher threading dislocation density, as seen in figure 16 for buffer layers with less than 70% Ge.
Pile-up of threading dislocations is not observed, which is not surprising as tensile strain relaxation causes the 60°F   misfit to readily dissociate, therefore cross-slip is unlikely to happen. The emergence of stacking faults in sample 7 shows that the strain force present in the Si Ge 0.45 0.55 layer has caused the 90°partial dislocation to glide away from 30°partial. A quantitative count of stacking fault density was not carried out in this study, although it would be interesting to see how the stacking fault density might change on reverse step grading to even lower Ge content.

Conclusions
This study presents a novel method of producing cavities in thin film Si Ge Ge 1 x x -buffer layers, requiring reasonably short growth times, via the Kirkendall effect. Previously this effect has mainly been seen in silicon germanium nanowire and nanosphere structures via either extended time annealing or electro-reduction. The RSG buffer design, presented here, omits the compositionally graded layer. Growth under tensile strain, at high growth temperature and relatively short growth times, initially led to 60°misfit dislocations being generated at the Si Ge Ge 1 x x -underlayer interface, when x=0.9, which multiplied and led to an increase in TDD. Initial intermixing between Ge and Si species is observed, with the Ge underlayer measured to be thinner than its nominal width.
Reverse step grading to Si Ge 0.16 0.84 increases the surface roughness to a maximum, due to elastic strain relaxation. This creates an incoherent 60°misfit network, which coupled with a high strain rate and kinetically inhibited glide, provides nucleation sites for vacancy exchange from the Ge underlayer into the Si Ge 1 x x -buffer layer. Further step grading to below x0.7 causes two distinct constant composition layers to form, through increased Ge underlayer diffusion into vacancy sites. The lower of these two layers approaches a consistent composition of Si Ge 0.21 0.79 in each sample, with the same degree of strain as the Ge underlayer, while the top layer continues to reduce in Ge content but with greater tensile strain.
The diffusion of Ge out from the underlayer and into the Si Ge 1 x x -buffer layer leaves behind spherical dislocation networks and vacancies ( figure 17). Under increased stress, by reverse step grading below x<0.7, the spherical networks collapse to form voids via the Kirkendall effect. The diameter and distribution of voids was found to depend on the Ge content in the SiGe buffer layer. It is also surmised that the high growth temperature and strain rate affects the size and distribution of the voids.
Such voided structures could open avenues of exploration into optoelectronics, for example as IR sensors, where the buried cavities have a change in refractive index that could lead to detection devices with improved signal to noise ratio. A further investigation could be carried out into the deposition of dielectric materials inside the voids for applications in MOS capacitors and MOSFETs. Further processing could also be carried out to planarize the Si Ge 1 x x -buffer layer surface, for instance through chemical and mechanical polishing techniques [36], to provide a strain tuned platform for SiGe epitaxy.