Electrical characterization of carrier trapping behavior of defects created by plasma exposures

Defect creation in Si substrates during plasma exposure was investigated by means of a capacitance–voltage technique employing various modulation frequencies. We focused on the frequency-dependent capacitance near the flat-band voltage of the damaged structures on its depletion/inversion side. The proposed technique provides the density of defects (ndam) and characteristic damaged layer thickness (λdam) for various modulation frequencies. We characterized carrier capture and emission processes governed by the created defects—responsible for the key performances of electronic devices such as noise behavior—from the obtained frequency-dependent ndam. In the case of Ar plasma exposure, ndam was shown to increase as the average energy of impinging ions increases. The trap time constants for the defects to capture and emit carriers were found to be on the order of 10−7 s. The proposed technique provides the detailed carrier trapping feature of defects which is indispensable for future plasma process and electronic device designs.


Introduction
The increasing demand for higher performance of ultra-large scale integration (ULSI) circuits requires the aggressive shrinkage of device feature sizes and precise control of the material processing. Defect generation in materials during plasma processing-leading to the degradation of the electrical performance-has been one of the critical problems [1][2][3]. Such degradation mechanisms-the negative aspect of plasma processing-are usually referred to as 'plasma (process)induced damage' [2,4,5]. In general, plasma-induced damage (PID) is classified on the basis of mechanisms [6] such as 'physical damage', 'charging damage', and 'radiation damage'. Physical damage is induced by high-energy ion bombardment on Si substrates or other material surfaces [7]. Charging damage is induced by conduction current from plasma flowing into dielectric materials in a metal-oxide-semiconductor fieldeffect transistor (MOSFET) [2], resulting in the degradation of the device performance. Radiation damage corresponds to bond-breaking in materials due to high-energy photon interactions [8,9]. Each mechanism has become considerable with the scaling of MOSFETs. Plasma-induced physical damage (PPD) creates local defect structures in materials. In the case of PPD to Si substrates, the created defects (knock-on species and vacancies) play two major roles; (1) accelerating the surface oxidation following the plasma process and (2) capturing and emitting carriers degrading the electric performance of MOSFETs [10,11]. The enhanced surface-oxidation

Letter
Original content from this work may be used under the terms of the Creative Commons Attribution 3.0 licence. Any further distribution of this work must maintain attribution to the author(s) and the title of the work, journal citation and DOI. mech anism is widely understood as the momentum transfer from incident light ions such as hydrogen ions to oxygen atoms in the exposed Si surface [12,13], which finally leads to the so-called Si recess [14]. Various plasma technologies have been developed to suppress PPD, in particular, by controlling (lowering) the energy of incident ions upon the surface of materials. Despite advancements in plasma processing such as atomic layer etching where extremely low-energy ions are employed, the degradation of material properties due to plasma exposures is still a key concern.
The experimental and theoretical studies have identified the nature of the created defects by PPD. The electrical techniques are believed desirable because it is more sensitive and can directly assign the impacts on the performance of electronic devices. Various electrical measurements have been carried out, such as the current-voltage (I-V ) measurement [15], sheet resistance measurement [10], and deep-level transient spectroscopy [16]. The I-V measurement monitors the tunneling current at the semiconductor (Si)-metal interface. The defects created in the Si substrate become electron hopping sites for the carrier conduction. Thus, the tunneling current increases by PPD under the reverse bias. Capacitancevoltage (C-V) measurement has been recently implemented into the characterization of PPD in Si substrates [17]. The 1/C 2 -V measurement in depletion/inversion [18] is confirmed to probe the density of defects n dam created by plasma exposure [17]. Recently, Okada et al have proposed a technique that assesses the profile of defects using the C-V measurement in combination with the theoretical prediction [19]. The first principle simulations assign various stable local defect structures that create the band gap states in the crystalline Si [20,21]. These quantum mechanical calculations predict that the energy level depends on each localized structure such as Si dumbbell, interstitial, and vacancy. In addition, several representative defect structures were presented on the basis of molecular dynamics (MD) simulations [22]. Variation of the energy level of the defect significantly affects the performance of MOSFETs because the created defects play a role as carrier trapping and detrapping centers in response to applied biases. The corresponding trap time constant has been commonly used as a measure of parameter fluctuation in devices [23,24] such as random telegraph noise (RTN) behavior in MOSFETs [25]. However, the previous C-V characterizations do not consider the trap time constant of defects-only the density of defects which respond to biases within a limited frequency was investigated [18]. The trap time constant is one of the fundamental parameters that determine not only the effective carrier density in semiconductor materials but also the noise behaviors of MOSFETs, analog devices, and image sensors. Therefore, the detailed characterization of the trap time constant of the defects created during plasma exposure is extremely important for an in-depth understanding of PPD in terms of the degradation of the electrical ('noise') performance. In this paper, we propose a new PPD characterization scheme measuring the frequencydependent C-V feature. The prediction scheme assigns the trapping and detrapping time constant for defects created by plasma exposure.

Experimental procedure and defect characterization
N-type (100) silicon substrates with a resistivity of approximately 0.02 Ω cm were used. The samples were mounted on a wafer stage and exposed to inductively coupled plasma (ICP) for 30 s unless otherwise noted. Ar was used as a working gas. The self-dc bias voltages (|V dc |) applied to the wafer stage were varied from 50 to 300 V. The flux of Ar ions incident on the surface of the samples was estimated approximately to be 3 × 10 15 cm −2 s −1 from Langmuir probe measurements. The structure of the samples consisted of a native oxide layer and the substrate. The sample without plasma exposure is denoted as the reference. Figure 1 illustrates the typical damaged structure after plasma exposure. The damaged layer primarily consists of two regions, i.e. the surface oxidized region (SL) and the interfacial transition region (IL) with displaced Si atoms and the interstitial atoms. The SL is identified as SiO 2 layer by physical and C-V analysis techniques. The fixed charges and the trapped carriers in the SL induce the shift of the C-V curve. The IL region is assigned by various techniques and the definition is sometimes dependent on the analysis technique employed. Spectroscopic ellipsometry (SE) is usually used to investigate the structures of the surface damaged layer. For the SE analysis, an optimized optical model-SiO 2 /SiO 2 :Si/ Si sub.-is used [26,27]. The thickness of SiO 2 layer (d SL ) is determined using the optical constant. The IL is assumed to be a composite of SiO 2 and crystalline silicon. The IL contains carrier trapping sites in the (amorphous) Si background. The thickness (d IL ) and the volume fraction of the crystalline silicon in the IL are used as the fitting parameters of the Bruggeman effective medium approximation (EMA). In this study, the thickness assigned by the SE is denoted as the optical thickness [17]. An increase in the extinction coefficientenhanced absorbance of incident photons-is revealed by SE, which indicates the presence of the carrier trap level as shown in figure 1(a). This increase is attributed to the presence of the carrier trapping sites in the IL. Furthermore, localized defects exist in the form of the interstitial species or displaced Si atoms underneath the IL. These defects are difficult to be removed by conventional wet etching process following plasma exposure. Thus, here we define these defects as latent defects. The latent defects play a role as the carrier capture and emission sites (a cause of the noise behavior of devices) usually identified by the C-V measurement. In this study a mercury probe system was employed for the C-V measurement. The structure in the measurement consists of pseudo-MOS structure (Hg/damaged layer/Si sub.) as shown in figure 1(b). The measurement focuses on the capacitance in the depletion/inversion side near the flat-band voltage. Under the presence of defects as shown in figure 1(b), the differential capacitance in the depletion/ inversion side is strongly affected. On the basis of the conventional 1/C 2 -V technique, one can estimate the defect density (n dam ) in Si substrates as follows [17,18]: where e is the elementary charge, ε Si is the relative dielectric constant of substrate, ε 0 is the permittivity in vacuum, and V b is applied bias voltage, C m is the measured capacitance, and n D is the impurity (donor) concentration (n D ~ 10 18 cm −3 in this study). Note that the 1/C m is equal to the sum of C 1 SiO2 / and 1/C Si , where C SiO2 and C Si are the capacitances of the surface damaged layer and the depletion/inversion layer (including the defects), respectively. C SiO2 is determined from the measured differential capacitance in accumulation. Nakakubo et al reported [17] that the electrical thickness (d ele ) determined from C SiO2 is approximately equal to (d SL + d IL ), i.e. the d ele value corresponds to (d SL + d IL ) assigned by the SE on the basis of the optimized optical model [27]. The change in the C Si is related to that in the effective doping concentration including n dam . Recently, Okada et al proposed a defect profiling method using the 1/C 2 -V technique where the profile of defect density [n dam (x)] and the characteristic thickness of the damaged layer (λ dam ) are implemented [19]. The technique simultaneously assigns the flat-band voltage shift ΔV fb [18] corresponding to the density of fixed charges. In the C-V measurement, an ac bias is superimposed on the dc sweeping bias. In this study, we investigate the dependence of the measured capacitance on ac modulation frequency f (=50-400 kHz) to assign the trap time constant of the defects (figure 1(b)) [28]. All the measurements were performed at room temperature.

Damaged layer structures
Figure 2(a) shows d IL and the damaged layer thickness (=d SL + d IL ) determined by SE as a function of |V dc |. d IL monotonically increases with an increase in |V dc |, which is attributed to the presence of PPD. Note that the d IL value directly corresponds to the PPD in the case of Si substrate [27]. Figure 2(b) shows transmission electron microscopy (TEM) pictures for the references and damaged samples (|V dc | = 150 V, exposure time = 120 s, d SL = 5.2 nm, d IL = 2.5 nm). We consider that the thickness determined by the SE (d SL + d IL ) approximately assigns the thickness of the damagedphysically disordered-layer [26,27] by taking into account the variation. Figure 3 shows the obtained C-V curves for the reference and damaged samples (|V dc | = 100 V). As seen, the C-V curve is distorted as a result of plasma exposure. On the basis of C-V prediction scheme extended to the PPD evaluation [19], n dam (x) is assumed to obey the following equation where n 0 is the peak defect density. In this figure, the C-V curve predicted by the model is also shown, by assuming that the energy level of defects locates at the bottom of the conduction band E C . (In this study we assume the trap energy level E trap = E C as the first order approximation, because various model prediction results [20,21] suggest that the local defect structures create the energy level close to the band edge.

Trapped charge
Trap site

Metal
Si sub. Moreover, the 1/C 2 -V technique clearly assigns the change in the slope [17,26], which implies that the energy level of carrier trap sites is located near the band edge.) The model prediction assigns that n 0 = 6.5 × 10 18 cm −3 and λ dam = 3.0 nm in this case. Figure 4 shows the densities of defects estimated on the basis of this model as a function of |V dc | (f = 100 kHz). The areal density (N dam cm −2 ) is defined as the total number of defects extracted from (2) as N dam = n 0 × λ dam . Both of the densities monotonically increase with an increase in |V dc |. The ranges of the densities shown in figure 4 fall on those estimated by photoreflectance spectroscopy (~10 12 cm −2 [29]) and MD simulations (assumed to be 10 18 − 10 19 cm −3 by taking into account the domain size [30]).

Frequency dependence of C-V characteristics-trap time constant
The capacitance in the depletion/inversion region varies in accordance with a given modulation frequency f (Hz). Figure 5 shows an example of f-dependent 1/C 2 -V curves. As seen, 1/C 2 increases (C decreases) with an increase in f. This implies the increased number of defects responding to the modulation bias. (We have observed no clear f-dependent C for the reference.) Thus, the C-V characteristics of the damaged sample are confirmed to depend on the modulation frequency. The observed f-dependence suggests that the defect created by PPD plays a role as the carrier trapping and detrapping center with the characteristic time constant. The effective defect density as a function of f is described as [25,26] Figure 6 shows the f-dependent ( ) n f 0 experimentally obtained from the model prediction   results. Overall the model prediction results agree well with the experimental results, except for the case of |V dc | = 250 V and f = 400 kHz. (We do not have a positive answer to this deviation at present.) Table 1 summarizes the estimated τ dam and volume density N 0 for various PPD cases. The decrease in ( ) n f 0 with an increase in f is attributed to a decrease in the number of trap sites responding to the modulation biases. There have been many reports discussing the trap time constant for various defects in MOSFETs [25,28,31]. The present study reveals that the trap time constant for defects created by PPD (τ dam ) falls on the range of ~10 −7 s for the case of relatively lower incident ion energy regions. The τ dam values assessed here are in the range widely discussed for the RTN characterizations. Further studies are hoped to clarify the detailed range of τ dam , which becomes key to designing future electronic devices such as analog circuits and image sensors.

Summary
We clarified the carrier trapping behaviors of defects in Si substrates created by plasma exposure using the C-V measurement with various modulation frequencies. The estimated density of defects increased with an increase in |V dc | and decreased with the modulation frequency. The trap time constant was found to fall on the range of ~10 −7 s in the case of relatively lower ion energies. The time constants obtained here correspond to those widely discussed in the RTN characterization. The present findings imply that PPD may enhance the RTN behaviors of future electronic devices.