DSP based current controlled single stage single phase integrated converter with external compensating signal for Class-C & Class-D appliances

Design and implementation of a current controlled single stage single phase integrated AC/DC isolated Power Factor Correction (PFC) converter is presented in this paper. With the integrated topology reduces the number control switches. The proposed converter has the advantage of low bulk capacitor voltage and only single control switch hence reduce in complexity in control and cost. Sub-harmonic oscillations which are produced in conventional current controller. By adding an external compensating signal effect of oscillations are reduced and performance of the converter is improved. The proposed scheme is implemented in real time by TMS320F2812 digital signal processor (DSP) board. The performance of converter is verified both experimentally and by simulation at different load and line conditions. The proposed converter is designed for 90–230 V, 50 Hz AC input, 48 V DC output and operating at 100 kHz switching frequency. The Experimental results shows that the DSP-based fuzzy controlled single phase single switch integrated PFC converter achieve high power factor and satisfies IEC-61000-3-2 and other European input current harmonic limits for Class-C & Class-D applications. Subjects: Power & Energy; Electrical & Electronic Engineering; Digital Signal Processing; Electronics


PUBLIC INTEREST STATEMENT
An integrated converter is a synthesized device based on the overall system integration, which is simplified by the system objective and can implement the system functions similar to the discrete converters without integration. Simplification means the process of synthesizing converters with reduced components, smaller size, and lower weight or cost. System objectives can include minimum cost, maximum efficiency, high reliability, low power packing, wide conversion range, PFC and output regulation, inverter PFC, and better performance.
In this paper 1-pahse integrated buck-flyback converter (IBFC) is analyzed, designed and implemented for Class-C & Class-D appliances. Experimental results of the proposed converter satisfy the IEC-61000-3-2 and other European standards.

Introduction
Based on the current harmonic limits by IEC-61000-3-2 and other European standards, electrical equipment are classified into four groups: Class-A, Class-B, Class-C and Class-D (Table 1).
(1) Using passive elements like inductor, capacitor along with uncontrolled rectifiers. It is a good solution only for low power ratings and difficult to operate in universal range of input due to the large size of passive elements (Singh et al., 2003).
(2) Other technique uses active power factor correction (PFC) circuit which consists of switching converter along with small size filter components. This technique reaches high efficiency and high power factor. Despite its expensiveness, complexity and EMI generation, this topology is considered as the best solution for high power levels and operating in universal range of input.
Active PFC techniques are of two types-single stage and two stage. Single stage topologies are boost, buck-boost or flyback converter. Major drawbacks with this topology are poor dynamic response and high switching stress (Basu & Bollen, 2005;Lu et al., 2008).
In two stage topology, first stage employees either buck or boost converter as a Power factor correction (PFC) and second stage consists of buck-boost derived topologies or flyback converter for power conditioning (PC). Though this topology gives unit power factor and fast dynamic response has drawback of high component size and cost.
An alternate solution to meet the IEC-61000-3-2 standards for Class-C & Class-D equipment is integrated single stage converter. This is formed by integration of PFC stage and PC stage. In this, single control switch shares the two stages. This converter performance is same as two stage topology with reduced component size and cost. There are different integrated topologies presented in literature (Alonso, Calleja, Ribas, Corominas, & Rico-Secades, 2004;Dalla Costa, Alonso, Marchesan, Cervi, & Prado, 2007;Dalla Costa et al., 2010). This paper focuses on integrated buck flyback converter (IBFC) as a power factor corrected converter. In IBFC, buck converter for PFC and flyback converter feeds supply to the load, both converters are operating in DCM to achieve high power factor.
Analog PFC control used to be the general commercial control for Class-C & Class-D equipment. Due to advantages like insensitive to parameter variations, more reliable, less number of passive components, now a days, digital control has become a competitive option. Digital control can be implemented using low cost microprocessor or Digital signal processor (DSP) or Field programmable gate array (FPGA). In literature, several analog and digital control approaches have been proposed to improve power factor and achieve regulated voltage (Buccella, Cecati, & Latafat, 2012;Gegner & Lee, 1996;Jiuming & Shulin, 2011;Murahari Rao, Kumar Jain, Reddy, & Behal, 2008;Yang et al., 2015;Ye & Jovanovich, 2005;Zhang & Feng, 2006 In this paper, analysis and design of DSP (TMS320F2812) based Constant frequency Current Controlled Integrated buck flyback Converter with External ramp is implemented for Class-D & Class-C appliances to achieve high power factor and regulated voltage.

Integrated power converter
An integration criterion in switched mode converters reduces number of control switches and increases steadfastness of converter. Both features of buck and flyback converters are integrated into a converter named IBFC is implemented in this paper as shown in Figure 1. In this, buck converter is a PFC converter and flyback converter is a power control converter. Buck Converter consists of This converter operates in four stages, First Stage: When SW 1 is on, buck inductor (L b ) and flyback primary inductor (L f ) are storing energy and output capacitance (C o ) feeding load.
Second Stage: When SW 1 is off, buck inductor (L b ) is discharging and flyback secondary inductance is discharging.  Third Stage: Even before complete discharge of flyback secondary inductor energy, buck inductor discharges its energy completely.
Fourth Stage: In this, flyback secondary inductor discharges energy completely and output capacitor feeds load.
The above four stages of working are shown in Figure 2.

Digital current control with slope compensation
Due to high computational speed, high reliability and cost reduction now a day's DSPs have been using extensively in various applications like control of drives, communication systems, intelligent systems etc. Figure 3 shows the block diagram of current controlled IBFC with external ramp by using DSP (TMS320F2812). This control approach contains two loops an inner current loop to achieve near unity power factor and outer voltage loop to achieve regulated voltage. The control to output transfer function without external signal has high frequency term, due to this sub harmonics will occur, so in inner loop a compensating signal is added to reduce sub harmonic oscillations. Control to output transfer function is, Figure 3. Block diagram of current controlled IBFC with external ramp by using DSP.
where Q c is Quality factor, m c is slope of compensating ramp, D is duty ratio, W n = π/T s , T s is switching frequency.
By selecting suitable value of Q c which is less than or equal to 1, then external signal slope can be adjusted to reduce sub harmonics. This compensation technique is implemented in TMS320F2812 processor by using library functions. Height of the external signal must be converted in to digital vale to subtract from DAC register over a switching period.
The flow chart shown in Figure 4 is used to accomplish the software. (2)

Design example
In this section, design example is presented to define component values. Table 2 shows some of the defined paramenters. To meet IEC-1000-30-2 regulations, the minimum conduction angle is 130° selected to achieve maximum powerfactor of 0.96 as in Alonso et al. (2004).

The voltage ratio (m) is calculated from the following relation;
where θ is the conduction angle, V b is the bulk capacitor voltage, V p is the peak value of line voltage. In the universal line voltage range (90-265 V) the minimum bulk capacitor voltage of 53 V and maximum value rises up to 158 V. In this design considered bulk capacitor voltage (V b ) = 137 V From the analysis of IBFC = 84.46Ω.

Simulation results
Current controlled integrated converter with external ramp compensation is implemented in MATLAB/Simulink. Figure 5 shows the simulink model of converter.   Designed converter performance is verified for universal line voltage range at different load conditions. Figure 6 shows the source voltage and source current waveform for source voltage of 150 V at rated load, it is observed that source voltage and currents are in phase. The calculated power factor is 0.94 and respective line current %THD is 19%.
Converter is supplied with 230 V at rated load the corresponding line voltage & line current waveform is shown in Figure 7. The power factor and line current %THD are 0.96 and 15%.
The Load voltage and load current wave forms are shown in Figures 8 and 9. It is observed that regulated load voltage of 48 V is appeared across the load and load current of 4A.
Load change is done on the converter at 0.2sec from rated load of 200-100 W the converter giving the regulated voltage of 48 V across the load terminals. This shows that converter operating effectively for load changes Figures 10 and 11 shows the respective load current and voltage waveforms of the converter with load change. Figure 12 shows the bulk capacitor voltage is around 130 V, which is low voltage as compared to two stage and single stage converters. This is the special feature of integrated converter. Figure 13 shows the bulk capacitor voltage after load change at 0.25 s (Tables 3 and 4).

Experimental results
Digital current controlled IBFC with external compensating signal is implemented experimentally by using TMS320F2812 DSP. Hardware setup was implemented in the laboratory as shown in the Figure 14 to investigate the performance of the controller for the integrated buck-flyback converter. The components used in the experimental work are tabulated in Table 5.
The source voltage and current waveforms at supply voltage of 230 V, 50 Hz and 150 V, 50 Hz at rated load are shown in Figures 15 and 16. In Figure 17 i5 is the load current waveform and V 5 is the load voltage waveform. Figure 18 shows the bulk capacitor voltage waveform.  The harmonic content in the input current wave is shown in bar chart of Figure 19. From FFT analysis the %THD of current is 15% at full load condition.
Experimental results of Power Factor for universal Input voltage range at rated load is shown in Table 6.
Simulation and experimental results comparative table is shown in Table 7.

Conclusion
Integrated power converter is designed by cascading buck converter with flyback converter because of having feature of current flowing through switch is either buck current or flyback current not sum of both currents, hence switch losses are reduced. Designed converter results are verified for different line and load conditions obtained lower value of power factor is 0.9 at low line voltage and reaches to 0.96 for 230 V, highest percentage of THD is 24% and lowest percentage of THD is 15% and it meets the IEC-6100-3-2 norms for Class-C & Class-D appliances. In the proposed current controller a digital compensating ramp signal is used for slope compensation to reduce sub-harmonics. This scheme applied to the converter and implemented in MATLAB/Simulink tool, their performance was evaluated both in steady state and dynamic conditions. Simulation and experimental results shows that controller acts quickly for load changes as shown in the load current waveform. Experimental results validate the satisfactory with simulation results.   Figure 19. THD bar graph for line current waveform.