Fluorinated greenhouse gas and net-zero emissions from the electronics industry: the proof is in the pudding

Abstract The electronics industry has made remarkable progress over the past 25 years in reducing the emission intensity of long-lived volatile fluorinated compounds (FCs) that typically represent 80 to 90% of uncontrolled direct (scope 1) greenhouse gas (GHG) emissions during the manufacturing of semiconductor, display, and photovoltaic devices. However, while Normalized Emission Rates (NERs) have decreased in terms of CO2-equivalent emissions per surface area of electronic devices produced, absolute FC emissions from the sector have continued to grow at a compound annual rate of 3.4% between 1995 and 2020. Despite these trends, industry has not, to date, renewed their sectoral commitments to strengthen global FC emission reduction goals for the 2020–2030 decade, and it is unlikely that recently announced net-zero emission objectives from a few leading companies can reverse upwards industry emission trends in the near-term. Meanwhile, the persisting gap between “top-down” atmospheric measurements-based FC emission estimates and “bottom-up” emissions estimates is increasingly concerning as recent studies suggest that the gap is likely due, in part, to an underestimation of FC emissions from the electronics sector. Thus, the accuracy of industry-average (Tier 2) emission factors is increasingly questionable. Considering that most FCs essentially permanently persist in the atmosphere on a human time scale, the electronics industry needs to reassert its collective leadership on climate action, increase its ambition to reduce absolute emissions, and ground net-zero commitments in science by embarking on a concerted effort to monitor, report, and verify their process and abatement emission factors. To this effect, this article provides practicable solutions to cross-check bottom-up and top-down emission factors at the facility level and suggests that further implementing cost-effective FC abatement technologies, possibly in conjunction with a sectoral cap-and-trade mechanism, can help achieve residual FC emission levels compatible with net-zero neutralization principles and the 1.5 °C objective of the Paris Agreement.


Introduction
Despite significant achievements in reducing normalized emission rates, absolute FC emissions from the manufacture of electronic devices have continued to grow at a compound annual rate of 3.4% between 1995 and 2020, and the persisting gap between top-down atmospheric measurements-based emission estimates and bottom-up emissions inventories indicates that emissions from the sector are likely underestimated.
Volatile fluorinated compounds (FCs), including perfluorocompounds (PFCs), hydrofluorocompounds (HFCs), NF 3 , and SF 6 , are potent long-lived greenhouse gases used and emitted by the electronics industry during the manufacture of semiconductor, display, and photovoltaic (PV) devices [1].In terms of carbon dioxide equivalents (CO 2 e), emissions of FC gases from electronic device manufacturing facilities typically represent 80 to 90% of uncontrolled direct (scope 1) emissions, compared to about 5-15% for CO 2 from on-site fossil fuel combustion, 2-10% for nitrous oxide (N 2 O) process-related emissions, and minor methane (CH 4 ) emissions [2].The vast majority of FC emissions from the sector (85 to 90% in CO 2 e) originate from plasma-based etching and cleaning processes that are based on fluorine chemistry, without which electronic device manufacturing would not be technically feasible [2,3].The remainder of FC emissions from the sector (typically 10-15% in CO 2 e) originate from the use of fluorinated heat transfer fluids (F-HTFs) [4].In 2020, about 75% of global FC emissions from the electronics industry originated from semiconductor device production, while display manufacturing emissions represented 20% of the total, and approximately 5% came from photovoltaic device manufacturing (see Figure 1).
Despite efforts by industry to voluntarily reduce FC emissions over the past 25 years and an initial decrease for the semiconductor sub-sector during the 2000-2010 period, the trend reversed over the last decade and absolute emissions (not including F-HFT emissions) have grown at an estimated compound annual growth rate (CAGR) of 3.4% between 1995 and 2020 (see Figure 1).Note that F-HTF emissions have not been included in Figure 1 because such emissions have not been part of industry's voluntary emissions reduction goals and have not been systematically reported at the global level.In absolute terms, while the display industry managed to reduce its FC emissions over the last decade (2010-2020) by an estimated CAGR of À3.6%, emissions from semiconductor and photovoltaic manufacturing grew by CAGRs of 2.1% and 31%, respectively.Overall, absolute FC emissions from the sector grew at a compound annual growth rate of 1.1% between 2010 and 2020 as the implementation of emissions reduction solutions insufficiently compensated for the continued global growth in production of electronic devices.
To be sure, emissions would have been significantly higher under a business-as-usual scenario.Indeed, as indicated in Figure 1, Relative Emission Rates (RERscomparing relative emission rate reductions between the semiconductor and display sub-sectors using a 2000 baseline) decreased by 65% and 85% for semiconductor and display device manufacturing, respectively, between 2000 and 2010.Such outstanding results were made possible, in large part, by the implementation of the NF 3 "remote clean" technology, which typically provides 98% utilization efficiency of the cleaning gas compared to less efficient CF 4 -and C 2 F 6 -based "in-situ" cleaning processes [5], but also through process optimization, alternate chemistries, and the development and implementation of FC-capable abatement devices [6][7][8].However, as shown in Figure 1, the flattening out of Relative Emission Rates over the last decade (2010-2020) suggests that it is becoming increasingly challenging to further optimize processes.
In terms of Normalized Emission Rates (NERsexpressed in kgCO 2 e per m2 of electronic device manufactured), a 2018 interim report from the World Display device Industry Cooperation Committee (WDICC) indicated that the display subsector was on track to meet or possibly even exceed its 2020 goal of reducing normalized emissions below 32.07 kgCO 2 e/m 2 of display device manufactured [9].For semiconductor manufacturing, an analysis of the latest results published by the World Semiconductor Council (WSC) indicates that, collectively, the world's leading industry associations did not achieve their 2020 goal of reducing normalized emissions below 2,200 kgCO 2 e/m 2 , missing their voluntary target by 18% [10].However, the industry's mitigation efforts appear to have been significantly uneven across regions since the European Semiconductor Industry Association announced having achieved a NER of 1,400 kgCO 2 e/m 2 in 2020 À 36% lower than the WSC goalindicating that emission rates could still be improved at the global level by a significant margin [11].
Even though significant improvements have been achieved in curbing normalized emission rates across the semiconductor and display subsectors, the continued growth of absolute FC emissions from the electronics industry is particularly concerning in light of the persisting gaps between "bottom-up" FC emissions reported in National Inventory Reports (NIRs) and "top-down" emission estimates derived from atmospheric measurements.Indeed, as shown by M€ uhle et al. [12], Kim et al. [13,14] and Trudinger et al. [15], and summarized in Figure 2 for the period of 1995-2019, global top-down emissions of CF 4 and C 2 F 6 have been 59% and 86% higher, respectively, than predicted from bottom-up inventories, principally from the production of aluminum and semiconductor devices.Further, as concluded by Arnold et al. [16], bottom-up NF 3 emissions also appear significantly underestimated on a global scale, which is disconcerting since the electronics industry is the principal consumer of nitrogen trifluoride, whose atmospheric concentration is currently growing at an alarming rate of 12% annually [17].
Beyond aluminum and semiconductor production, additional sources of CF 4 , C 2 F 6 , and NF 3 emissions could contribute to the gaps, including from display device manufacturing, chemical production, circuit board waterproofing, and PV cells manufacturing as reported under "miscellaneous sources" by Kim et al. [14], but also from rare earth elements production as well as from the fluorinated surface treatment of textile and other substrates [18,19].Notwithstanding, the evidence provided by Kim et al. indicates that the CF 4 and C 2 F 6 gaps may be due, in part, to overestimating FC abatement efficiencies from semiconductor and flat panel display manufacturing facilities, at least in the region covered by their study [14].However, as argued in this article, the gap may also result from inaccurate process emissions factors, which could lead to overestimating FC's utilization efficiencies and underestimating FC by-products' formation rates.

The need for increased ambition in reducing emissions
The apparent inability of the electronics industry to adopt sector-wide FC emissions reduction targets towards 2030 points to a lack of collective leadership in climate action and the need for increased ambition.While net-zero emission goals have been announced by a few leading companies, net-zero standards and carbon neutralization thresholds and strategies must be established throughout the whole industry.
Despite earlier commitments to working on establishing a new FC emissions reduction goal towards 2030 and to announce this goal by the end of 2021, the World Semiconductor Council (WSC) is still finalizing it [10,20].Similarly, no global commitment has been announced for the display sector to reduce emissions towards 2030, with the World Display Industry Cooperation Committee (WDICC) even neglecting to update its 2018 Environmental Report and reporting on its 2020 FC emissions reduction goal [9].Regarding the manufacturing of solar photovoltaic devices, the lack of concerted industry efforts to measure, report, and reduce FC emissions is also concerning.
Despite the current lack of global sectoral emission reduction goals, many electronic device manufacturing companies continue to show good climate management practices since 42 out of the top 100 global companies in the sector obtained an "A" (Leadership) or "B" (Management) score as part of their CDP reporting in 2021 [21].Also, the level of awareness is above average since 62 of these top 100 companies either disclose their emissions under the CDP mechanism or became part of the Science Based Target initiative (SBTi) [22].However, a closer review of the SBTi database indicates that nearly half (19 out of 41) of the participating electronic device manufacturing companies still have to set independently validated targets, with two companies actually having failed to meet their commitment to set such targets within 24 months [Id.].All in all, only 22 of the top 100 electronic device manufacturing companies have formally set near-term SBTi targets: 13 in line with the 1.5 C goal of the Paris Agreement, 7 in line with the "well-below 2 C" goal, and 2 companies with a near-term target of 2 C [Id.].The question, then, is whether individual corporate commitments could reverse upward emission trends in the short-term, which, unfortunately, appears doubtful.
Among corporations committed to near-term emission reduction goals, a few leading companies have also established long-term objectives.For instance, Analog Devices, UMC, TSMC, and Intel recently announced that they would target netzero greenhouse gas emissions by 2040 or 2050 [23][24][25][26].At the global level, net-zero means that an equilibrium would be reached, whereby no more greenhouse gases (GHGs) would be added to the atmosphere than we could remove from it.At the corporate level, a net-zero commitment requires reducing a company's emissions to zero or to a residual level consistent with reaching netzero emissions at the global or sector level in eligible 1.5 C-aligned pathways, and to neutralize any residual emissions thereafter by removing carbon from the atmosphere and permanently storing it to counterbalance the impact of emissions that remain unabated [27].
For electronic device manufacturing companies, setting long-term science-based and netzero targets implies that their boundaries should cover at least 90% of their scope 3 emissions (indirect emissions from the upstream and downstream value chains of the company, excluding energy), with a net-zero level of decarbonization consistent with a 1.5 C pathway [Id.].For scope 2 emissions (indirect emissions from the generation of purchased energy), companies should procure at least 80% of their electricity from renewable sources by 2025, and 100% by 2030 [Id.].For scope 1 emissions (direct emissions from owned or controlled sources), the main challenge for electronic device manufacturers will be to reduce their direct FC emissions to a residual level consistent with net-zero principles.To this effect, while both absolute and intensity targets are eligible under the SBTi Net-Zero Standard, no level playing field can be created until a consensus is reached about what a credible, fair, and ambitious residual level of FC emissions should be before their neutralization would be deemed acceptable.
Considering that most fluorinated compounds have extremely high global warming potentials (up to 25,200 for SF 6 using a 100-year time horizon and 34,100 using a 500-year time horizon [28]) and essentially permanently persist in the atmosphere on a human time scale (in the worst case of CF 4 having an atmospheric lifetime of 50,000 years [Id.]), the electronics industry must define a credible and verifiable path towards netzero emissions.To this effect, one should recognize that neutralizing long-lived FC emissions with CO 2 emissions reduction activities (e.g. by planting trees) would not account for the timeintegrated climate impact of fluorinated compounds under a limited 100-year time horizon.For example, using a 100-year GWP for CF 4 only accounts for less than 1% of its climate impact over the lifetime of the molecule in the atmosphere.
Without sectoral targets and standards in place, including a definition of residual FC emission thresholds, and in the absence of a credible neutralization strategy, net-zero emission goals will remain questionable and elusive.The electronics industry should create a level playing field through the adoption of science-based targets, with transparent baselines and either absolute or relative intensity targets consistent with 1.5 C pathways.Such targets could differ by sub-sector (e.g.semiconductor, display, photovoltaic) and even possibly by type of devices and technologies (discrete vs. logic vs. memory devices, LCD vs. OLED displays, polycrystalline vs. thin film PVs, etc.) to reflect past emission reduction achievements in each sub-sector and specific technological challenges in achieving net-zero goals.

The need for increased accuracy in reporting emissions
FC emissions from the electronics sector may be underestimated due to both lower than reported abatement efficiencies and inaccurate process emission factors.Industry can and should verify the accuracy of their reporting methodologies by comparing fab-level bottomup and top-down emission factors.
As discussed earlier, the existence of significant gaps between top-down and bottom-up estimates of CF 4 , C 2 F 6 , and NF 3 emissions is now well established [12][13][14][15][16].And because CF 4 , C 2 F 6 , and NF 3 currently represent over 80% of total FC gas consumption from semiconductor manufacturing [10], inaccurate reporting of the corresponding emissions could significantly affect the estimate of the impact of the electronics industry on climate change.Indeed, the uncertainty and possible lack of accuracy of bottom-up inventory methodologies currently used by industry is not a trivial issue: let us take the example of one of the most widely used FC-based processes across industry, the "remote clean," with an NF 3 consumption estimated at 12,180 tons in 2020 for the semiconductor industry alone [Id.].Assuming that the field-average utilization efficiency of NF 3 for the remote clean technology would actually be 95% instead of the average IPCC default of 98% (less than one standard deviation below the average), the difference in terms of absolute emissions for the global semiconductor industry in 2020 would have been 6 million tons CO 2 ethe equivalent in annual GHG emissions of a small country.
Because there could be several reasons for inaccurate reporting of FC emissions from the electronics industry, let us turn towards an analysis of the corresponding reporting methodologies.Current bottom-up emission estimates from electronic device manufacturing are principally based on "Tier 2" methodologies developed by the Intergovernmental Panel on Climate Change (IPCC) [1].As shown in Equation (1) (which was simplified for the purpose of this discussion compared to actual IPCC equations), the estimation of Tier 2 emissions for a particular FC precursor "i" and a particular process "p" (E i,p ) is based on the multiplication of the mass of the precursor consumed by the process (C i,pthe activity data) by a combination of "default" emissions factors, namely the utilization efficiency of precursor i during the process (U i,p ), the formation of FC by-product(s) "k" resulting from the decomposition of precursor i (B k,i,p , e.g. when CF 4 is formed as a by-product of the decomposition of C 2 F 6 ), and the eventual application of emissions control technologies to destroy unreacted precursor i and by-product(s) k (D i,p , D k,p ): where E p ¼ Emissions from process p (mass); C i,p ¼ Consumption of input gas i for process p (mass); U i,p ¼ Emission factor for utilization efficiency of gas i for process p (fraction); D i,p ¼ Destruction removal efficiency of gas i for process p (fraction); B k,i,p ¼ Emission factor for by-product k generated from gas i during process p (fraction); and D k,p ¼ Destruction removal efficiency of byproduct k for process p (fraction).
While there is no reason to question the scientific soundness of the IPCC approach, the veracity of IPCC Tier 2 inventories still essentially depends on the representativeness and accuracy of the underlying data.Evidently, Equation (1) shows that discrepancies in Tier 2 emission estimates can originate from either incorrect reporting of activity data or inaccurate default emission factors (process-or abatement-related).While effectively lower than reported abatement efficiencies (D i,p , D k,p ) can indeed explain the observed discrepancies between bottom-up estimates and top-down measurements as reported by Kim et al. [14], it is postulated here that such discrepancies may also result from inaccurate process emission factors, i.e. inaccurate default U i,p and B k,i,p values.To support this postulate, let us examine potential sources of errors in Tier 2 emission estimates, starting with two known potential sources (inaccurate reporting of precursors' consumption and of abatement efficiencies) and then turning to potentially insidious inaccuracies in default process emission factors.

Potential inaccuracies in reporting of activity data
While the consumption of FC gases (activity data) can be accurately measured by monitoring and integrating the signal of Mass Flow Controllers (MFCs) of manufacturing process tools, this may not always be feasible across an entire manufacturing facility.Thus, one significant source of uncertainty and potential inaccuracy in Tier 2 estimates arises from estimating heels (the fraction of FC precursors that remain in containers returned by the electronics manufacturing facility to the chemical supplier) and the need to allocate facility-wide gas consumption figures to specific process types (e.g.etch vs. cleaning).Allocating gas consumption can be achieved by using site-specific engineering models that assess consumption as a function of the types of devices manufactured and the surface area of substrates processed.While significant uncertainties and possible inaccuracies can be introduced by the need to allocate the consumption of FC gases, it is possible to verify the repeatability and accuracy of the allocation model, which is routinely done by electronic device manufacturing in some regions, including in the United States [3].Thus, sources of potential reporting errors due to incorrect estimates of activity data can be verified and controlled.

Potential inaccuracies in reporting of abatement efficiencies
Regarding the hypothesis that abatement efficiencies may be overestimated, and, consequently, that emissions may be underestimated, one must consider that many FCs are extremely stable molecules that are particularly difficult to abate.Indeed, only certain types of emissions control technologies can meet the IPCC default DREs, which vary from 89% for CF 4 to 95%-99% for other FCs [1].Although the 2019 IPCC default DREs were derived on the basis of a significant number of 1,462 experimental data points collected across representative "FC-capable" abatement systems and manufacturers, it is known that DRE performance can drop below default DRE values when FC flows exceed the abatement systems' design capacity [Id.].Further, improper installation, operation, and maintenance of abatement systems can cause actual operational DRE values to be lower in production conditions than in controlled laboratory conditions [Id.].It has also been shown that, under certain conditions, poorly designed abatement systems can even generate CF 4 emissions from the reaction between CH 4 (when methane is used as a combustion fuel) and F 2 (when significant amounts of fluorine are emitted from CVD chamber cleaning processes) [Id.].Thus, it is not unforeseeable that FC abatement systems can perform at a lower efficiency than defaults DREs.Consequently, prior to selecting suitable abatement technologies and reporting emissions, facilities should ensure that the abatement systems are certified by the original equipment manufacturers to meet default DRE values under actual use conditions, particularly for "worst-case" FC and total effluent flow conditions [Id.].Further, adequate maintenance procedures should be implemented to ensure the reliable operation of the abatement systems during their life, and periodic verification of DRE performance should be conducted.

Potential inaccuracies in Tier 2 "default" process emission factors
Regarding the accuracy of Tier 2 default process emission factors (U i,p , B k,i,p ), the gist of the issue is whether these emission factors accurately reflect the actual "average" combination of individual manufacturing processes used for particular electronic devices, production facilities, and regions.Indeed, production facilities typically use hundreds or even thousands of distinct processes "p" for which actual emission factors can significantly differ from the defaults.In fact, the relative uncertainties of the Tier 2 EFs vary from 40% to 600% at the 95 percent confidence interval [1].Such large uncertainties are inherent in the wide variety of process "recipes" used in production, where the same FC gas may be used in different process reactors under a broad spectrum of process conditions (flows, plasma power, pressure, etc.), resulting in wide EF probability density functions.But, of course, large uncertainties do not necessarily imply that average emission factors may be inaccurate.Rather, the accuracy of Tier 2 default emission factors rests on the statistical significance and representativeness of the underlying experimental data.
Currently, Tier 2 default process emission factors are derived from the simple averaging of experimental EF data points obtained from the measurement of actual production processes.The accuracy of this averaging approach rests of the assumption that default emission factors do reflect industryaveraged precursors' utilization efficiencies and byproducts' formation rates.As of 2019, default IPCC Tier 2 process emission factors resulted from the averaging of 3,280 experimentally measured EF data points historically collected over the past 30 years [Id.].Although the sheer number of individual data points could suggest that the data may be representative, and even though the data set provided to the IPCC is believed to be one of the most encompassing available worldwide, a key issue is that processes used in the electronics industry constantly evolve along with new generations of devices, particularly in semiconductor device manufacturing.As a result, one problem is that older experimental emission factors can correspond to processes that no longer reflect current production processes.
Another potential source of errors in estimating Tier 2 default emission factors is that a simple averaging technique (as opposed to a weighted averaging approach that would better account for the weight of certain processes against others) may be inaccurate.Further, different methods (so-called "dominant" versus "all-input" conventions) have been used historically to derive by-product emission factors, and their impact on reporting accuracy is unclear [29,30].While increasing degrees of refinement can be introduced through sub-tiered Tier 2 methodologies (Tier 2a, 2b, 2c) by distinguishing default emissions factors as a function of substrate size or more refined definitions of main process types and sub-types, these sub-tiered approaches are still based on simple averaging techniques (within each sub-tier) and can only be as accurate as the underlying experimental data is, or is not, representative of industry's actual "average" processes.
With all these hypothetical considerations in mind, it is still true that "actual" emission factors can be higher or lower than Tier 2 default ones and that it is the combination of these default factors that can lead to either overestimating or underestimating emissions.Notwithstanding, scientific evidence provided by M€ uhle et al.Kim et al. Trudinger et al. and Arnold et al. tips the balance towards an apparent underestimation of emissions [12][13][14][15][16]. Further, the hypothesis that an underestimation of emissions may not only be due to an overestimation of FC abatement efficiencies but also to inaccurate process-emission factors implies that bottom-up emission reports from the electronics industry may also underestimate emissions for facilities that do not actually use emission control technologies (still a significant fraction of manufacturing plants), which could further contribute to the persisting atmospheric FC gaps at the global level.While this conclusion remains conjectural, the fact is that the accuracy of default Tier 2 emission factors is unknown and that, as further discussed below, the veracity of emission reports from industry can only be proven through verifying the accuracy of the reporting methodologies and ideally time-integrated measurements at the facilities' exhaust level.

Verifying the accuracy of reporting methodologies
A viable approach to assess the accuracy of emissions factors from the electronics industry would be to compare bottom-up and top-down emissions at the facility (fab) level, which can be achieved by comparing the results of Tier 2 and Tier 3 emissions estimates.Indeed, the 2019 Refinement to the IPCC Guidelines introduced two Tier 3 methodologies that respectively allow for the use of process-or recipe-specific emission factors (Tier 3a) and the measurement of emissions from a specific facility through stack systems (Tier 3b) [1].While the Tier 3a method can be used to compare facility-specific (measured) emission factors to industry-average (Tier 2) default EFs, the Tier 3b methodology can be used to compare bottom-up emission factors to those derived from facility-specific top-down (end-of-pipe) emission factors, encompassing both actual process EFs and the DREs of emission control technologies.While implementing Tier 3 methodologies globally across all electronic device manufacturing facilities would be costly and unnecessary, a concerted program to survey representative facilities (e.g. by substrate sizes, types of electronic devices, and eventually by generations of facilities) and compare bottomup and top-down emission factors at the fab level would be manageable.Suitable measurement techniques and protocols are well established for the purpose [31][32][33][34], and their cost in the context of a survey program (as opposed to continuous monitoring) would be insignificant for a trilliondollar industry.
To bolster the credibility of emissions reduction pledges, including of net-zero commitments, and to help assess the degree to which the electronics industry contributes to the global FC gap, the accuracy of the sector's emissions inventories must be verified, and industry should embark on a monitoring program to periodically measure and update default emission factors.The program should be well balanced across production regions to equitably share monitoring burden and reflect possible regional differences in reporting accuracy.

Further reducing FC emissions: cost and policy considerations
Cost-effective abatement solutions are available to further reduce FC emissions, and a failure to voluntarily do so will likely trigger disparate carbon taxing measures.As an alternative, a sectoral cap-and-trade program could be designed and implemented to foster equity across regions and companies and to create a level-playing field towards implementing netzero objectives.
Besides defining credible baselines and implementing rigorous monitoring, reporting, and verification (MRV) programs, the crux of net-zero objectives is to reduce emissions as far as possible, down to residual levels before neutralization.As numerous and comprehensive research and development programs have been conducted over the past 30 years, notwithstanding the possibility that innovative low-emission technologies can still always emerge, effective FC mitigation approaches are readily available.For example, optimizing processes by reducing excessive FC input flows while increasing the utilization efficiency of FC precursors has proved effective in reducing both emissions and manufacturing costs [1,6,7].Also, using alternate FC chemicals with low or even no GWP (e.g.F 2 ) is an available option for some processes [Id.].However, as discussed in the introduction, the flattening out of relative emission rates for semiconductor and display manufacturers over the last ten years suggests that it is becoming increasingly challenging to further optimize processes (recall Figure 1).Nevertheless, emission rates could still be brought down to near-zero through the implementation of effective emission control technologies.
While somewhat capital intensive, abating FC emissions is still relatively cost effective per ton of CO 2 e avoided.Indeed, due to their high GWPs (and thus high CO 2 equivalency per mass of FC gas abated), controlling FCs emissions can be achieved at a cost-of-ownership (COO) of less than one US dollar per ton of CO 2 e reduced for high flow applications such as in-situ CF 4 and C 2 F 6 Chemical Vapor Deposition (CVD) chamber cleaning, and less than USD 20/tCO 2 e for many lower flow etch applications [35].Such COOs are well below the range of carbon prices of USD 50-100/tCO 2 by 2030 that are required to reduce emissions in line with the temperature goals of the Paris Agreement [36].Further, while some electronic device manufacturing companies have pointed out that they do not have the space to install point-of-use abatement devices in their subfabs (where real estate can indeed be limited), the space issue can be overcome by using stack-level (centralized) abatement systems that have proved effective in reducing emissions [8,37].Thus, the generalized implementation of cost-effective FC abatement solutions (say, those with a COO below USD 50-100/tCO 2 e) could create a benchmark for the definition of residual FC emissions in the context of a sectoral net-zero standard.
Should the electronics industry fail to further reduce FC emissions on a voluntarily basisparticularly when doing so can be done relatively costeffectively when compared to many other industrial sectorsregulatory pressure will undoubtedly increase.And while command and control measures (mandating that emissions do not exceed certain levels) are part of the regulatory arsenal, it is more likely that carbon taxes would be favored by regulators, at least in some jurisdictions.Indeed, carbon taxes are fairly straightforward to implement and could effectively compel electronic device manufacturers to further reduce FC emissions.Even a relatively low-level carbon tax such as that currently imposed in Singapore on semiconductor manufacturers (5 SGD/tCO 2 e [38]) can be motivating since, simply through tax avoidance, installing an FC-capable abatement system on a high-emitting CVD tool running a C 2 F 6 in-situ cleaning process can provide a return on capital of less than two years.At a tax rate of 50 USD/tCO 2 e, the return on capital would be measured in months.
As an alternative to carbon taxes that inevitably would lack uniformity across jurisdictions, a sectoral (electronics industry specific) cap-and-trade mechanism could be designed and implemented.Under such a program, FC emission allowances could be assigned to individual facilities and electronic device manufacturers that have reduced their emissions below agreed-upon targets (caps) could sell their remaining allowances to device manufacturers that have not been able to achieve their emissions reduction commitments.Of course, the environmental integrity of the system should be assured by only allowing for emission reduction credits that are additional (i.e.those that would not have happened under a business-as-usual scenario, as would normally be the case for the implementation of abatement measures), and the cap should be reduced over time at the global industry level, consistent with net-zero principles.Note that the effectiveness of the approach would need to consider market liquidity issues and the pricing of allowances over time because the credit pool would shrink as industry would progress towards net-zero emissions.The design of the program would also need to overcome international trade issues (e.g.carbon border adjustment mechanisms) and account for the fact that some electronic device manufacturing companies are already subject to carbon taxes and compliance trading schemes, such as in Singapore and South Korea [38,39].From a monitoring, reporting, and verification standpoint, the Clean Development Mechanism (CDM) methodologies developed and approved for the electronics industry as part of the Kyoto Protocol [40][41][42][43] can provide a basis to expand carbon trading mechanisms from a project-based approach to a sectoral system.
One essential benefit of a sectoral carbon trading mechanism is that a well-designed system would create a level playing field and help ensure equity across regions, countries, and companies by creating a uniform carbon pricing mechanism across industry.As such, the approach would help address competitiveness concerns and prevent carbon leakage, i.e. avoiding increases in emissions in one region or country as a result of other regions or countries having adopted more stringent reduction targets.Finally, a well-designed cap-and-trade regime could help the electronics industry effectively achieve netzero emissions for the entire sector.

Conclusion
The electronics industry must show increased ambition in their decarbonization targets and reassert their collective commitment to reduce emissions of potent long-lived fluorinated greenhouse gases towards residual levels that can effectively be neutralized.As some leading companies are setting a path towards achieving net-zero emissions, science-based targets must be transparently defined for this decade and towards 2040-2050.To facilitate such objectives, a sectoral capand-trade regime could be an effective means to create a level playing field and ensure that emission reduction efforts are equitably shared across production regions and companies.But a prerequisite to any credible net-zero emissions roadmap will be to ensure that emission inventories are accurate.To this effect, industry must verify its emission factors to determine the extent to which the sector contributes to the global FC gap, which can be done by comparing bottom-up and topdown emission estimates at the facility level.As the saying goes, the proof is in the pudding.

Materials and method
Absolute emissions for the semiconductor industry are published by the World Semiconductor Council (WSC) [20].Normalized Emission Rates (NERs) for the semiconductor industry are published by the WSC for the 2010-2020 period [Id.] and were derived from absolute WSC emissions and silicon demand (in m 2 ) for the 1995-2010 period [44].Relative Emission Rates (RERs) for the 2011-2020 period are calculated based on the 2020 NER value (RER 2000 ¼1, see further details below).Absolute emissions for display device manufacturing are those published by Ohkura et al. for 1999-2010 [8].For the 2011-2016 period, absolute emissions for display are derived from normalized emissions rates published by the World Display device Cooperation Committee [9], multiplied by display manufacturing production data (m 2 ) published by Ohkura et al. (2000Ohkura et al. ( -2010) ) [8], IHS Markit (2015 production capacity multiplied by an average 75% utilization efficiency) [45], and DSSC for the 2018-2020 period [46].For the periods of 2011-2014 and 2016-2017, for which no display production data is publicly available, production was estimated by interpolating the data between the sources previously mentioned.For the 2017-2020 period, absolute display emissions were derived from production data (m 2 ) multiplied by estimated NERs, and assuming that the WDICC NER continued to decrease at the same rate as for 2008-2016 [9].Absolute display emissions for the 1995-1998 period were assumed to grow from negligible emissions in 1995 to the 1999 emissions published by Ohkura et al. [8].Absolute emissions from PV device manufacturing were estimated for 2018 based on the United States 2020 National GHG Inventory Report [4], scaled up to account for the global share of PV device produced in the rest of the world [47], and estimated for other years based on historical data for solar modules produced globally from 2000 to 2019 [48].Absolute emissions from PV manufacturing for 2020 were extrapolated based on the 2019 estimate, assuming the same rate of growth as for the 2018-2019 period.Insufficient data was available to estimate the historical RER for PV device manufacturing.
Relative Emissions Rates (RERs) are expressed in terms of CO 2 -equivalent (CO 2 e) emissions per surface area of electronic device produced, relative to a 2000 baseline (RER 2000 ¼1).For reference, the Normalized Emissions Rate (NER) for semiconductor device manufacturing was estimated at 0.93 kgCO 2 e/cm 2 of semiconductor device in year 2000 and announced by the World Semiconductor Council to have reached 0.26 kgCO 2 e/cm 2 in 2020 [10].For display manufacturing, industry reported a NER of 0.0286 kgCO 2 e/cm 2 in 2000 [8], which was estimated to have reached 0.0018 kgCO 2 e/cm 2 in 2020.

Figure 2
Data presented in Figure 2 compiled from Kim et al. [13,14] and Trudinger et al. [15] as follows: 1995 to 2007 top-down CF 4 and C 2 F 6 emissions averaged between Kim et al. [13] and Trudinger et al. [15]; 2008 to 2013 top-down CF 4 and C 2 F 6 emissions averaged between Kim et al. [14] and Inversion InvE1 data from Trudinger et al. [15]; 2014 to 2019 top-down CF 4 and C 2 F 6 emissions from Kim et al. [14]; 1995 to 2008 bottom-up aluminum CF 4 and C 2 F 6 emissions from Kim et al. [13]; 2009 to 2019 bottom-up aluminum CF 4 and C 2 F 6 emissions from Kim et al. [14]; 1995 to 2010 bottom-up semiconductor CF 4 and C 2 F 6 emissions from Kim et al. [13]; 2012 to 2019 bottom-up semiconductor CF 4 and C 2 F 6 emissions from Kim et al. [14]; 2011 bottom-up semiconductor CF 4 and C 2 F 6 emissions averaged between 2010 and 2012 data points from Kim et al. [13,14]; 2008 to 2018 bottom-up miscellaneous CF 4 and C 2 F 6 emissions from Kim et al. [14].2019 bottom-up miscellaneous CF 4 and C 2 F 6 emissions extrapolated from 2016 to 2018 data points from Kim et al. [14].

Statement of competing interests
Non-financial competing interests: I am a Lead Author of the 2019 Refinement to the 2006 Intergovernmental Panel on Climate Change (IPCC) Guidelines for National Greenhouse Gas Inventories (Volume 3, Chapter 6: Electronics Industry Emissions), and a Member of the Editorial Board of the IPCC Emissions Factor Database (EFDB).I do not believe that such professional affiliations create any conflict of interest or that it could be perceived to influence my professional judgment and/or the presentation of the opinions expressed in the article.
Financial competing interests: Even though the majority of my work with the IPCC is done on a pro-bono basis, I am hereby disclosing that the United States Environmental Protection Agency (US EPA) financially supported part of my work with the IPCC during the Refinement of the IPCC Guidelines between 2015 and 2019, part of my work as a Member of the Editorial Board of the IPCC EFDB, and that I have been a consultant for the US EPA since 2010 in regard to the development of the US Greenhouse Gas Reporting Rule (Subpart I, Electronics Manufacturing).Further, as an independent paid international consultant and advisor, I work for both public and private clients that may have an interest in the article.While some of my clients and I may financially benefit from increased awareness from the public and private sectors, and civil society, concerning the impact of fluorinated greenhouse gas emissions from the electronics industry, I do not believe that such potential benefits undermine the objectivity, integrity, and value of the opinions expressed in the article.

Figure 1 .
Figure 1.Absolute emissions for the semiconductor, display, and photovoltaic device manufacturing industries (1995-2020) and relative emission rates (2000 baseline) for the semiconductor and display manufacturing industries (2000-2020).

Figure 2 .
Figure 2. Global top-down and bottom-up emissions of CF 4 and C 2 F 6 between 1995 and 2019.Compiled and reproduced with permission from Kim et al. [13,14] and Trudinger et al. [15].