Low temperature processed, highly stable CMOS inverter by integrating Zn-ON and tellurium thin-film transistors

Semiconductors processed at low temperature for complementary metal–oxide semiconductors (CMOS) devices are receiving considerable attention in the field of integrated electronic applications. In this work, we demonstrated a CMOS inverter constructed by n-type ZnON and p-type Te TFTs where all the processes have been done at low temperature. The electrical measurements of proposed TFTs exhibit high mobility (> 100 and > 3 cm2/Vs in case of ZnON and Te TFTs, respectively) and a stable on/off current ratio. The resulted CMOS inverter exhibits a high voltage swing and a high voltage gain of 15.89. Since all the synthesis and fabrication processes are performed at low temperatures with easy processing techniques, the results may open new opportunities in the field of integrated electronics field.


Introduction
Low temperature processed semiconductors are highly preferred for large-area electronic devices such as complementary metal-oxide-semiconductor (CMOS) combination circuits, diode-based circuits, and logic circuits [1,2]. In particular, amorphous oxide semiconductors (AOS) such as indium gallium zinc oxide (IGZO) [3], silicon indium zinc oxide (SIZO) [4], and zinc tin oxide (ZTO) [5] are promising candidates for ntype high-performance thin-film transistors (TFTs) with good electrical performances in terms of electron mobility, on/off ratio and current density. However, they are still limited in obtaining high carrier mobility at lowtemperature, light-stressed stability, and stable transport measurements. In this regard, zinc oxynitride (ZnON) has previously been reported as a promising candidate for stable transport measurements and high carrier mobility [6], but obtaining easy processing steps, high integration, and low-cost manufacturing still requires considerable work and attention.
Regarding microelectronic CMOS circuits, various ptype semiconductors materials such as carbon nanotubes (CNTs) [7], pentacene [8], and Dinaphthothienothiophene (DNTT) [9] have recently been reported to form hybrid combinations of complementary circuits with ntype AOS. These combinations provide good electrical performance but are limited in terms of easy processing, high integration compatibility, large-scale processing, and low process temperature characteristics. Among various p-type semiconductors, tellurium (Te) has gained tremendous attention with its easy processing techniques, high uniformity, and good electrical performance [10][11][12]. In particular, Te-based thin-film transistors have successfully been demonstrated in photo-sensing devices and large-scale integrations [10][11][12], but they are still limited in terms of high-level integration and applicability in the field of electronics.
Here, we demonstrate a hybrid integration of n-type Zn-ON and p-type Te TFTs to achieve high CMOS inverter properties that show potential as replacement for conventional CMOS technology. The low-temperature sputter processed n-type Zn-ON-based TFT exhibits a high field-effect mobility value of 106.17 cm 2 /Vs along with excellent output properties, revealing highly stable saturation I DS at high V DS . The p-type Te semiconductor material was deposited using a direct current (DC) sputtering technique at low temperature ( < 25°C) without any additional annealing treatment. The Te-based TFT resulted in mobility of 4.35 cm 2 /Vs along with stable output properties. The complementary configurations of Zn-ON and Te TFTs were integrated to fabricate the CMOS inverter. The results exhibit a high gain of 15.89 and stable electrical performances, offering new opportunities in designing logic circuits based on hybrid semiconductor materials.

Results and discussion
To obtain high electrical performance and uniform distribution of ZnON film, a radio frequency (RF) sputtering process was utilized to deposit the ZnON film where the applied RF power was fixed at 40 W and plasma gas flow of Ar:O 2 :N 2 was 5:0.1:20 sccm. UV-vis spectrometer analysis was performed to confirm the optical properties of ZnON film. Figure 1a shows the transmittance of ZnON film from 200 nm to 1000 nm wavelength with the ZnON film showing a transmittance of over 55% at a wavelength of 550 nm. The inset image of Figure 1a shows the extracted optical bandgap of 1.45 eV using the Tauc method. ZnON film shows the smooth surface of RMS 0.677 nm, confirmed with atomic force microscope (AFM), as shown in Figure 1b.
Next, the ZnON TFTs were fabricated on highly doped p-type Si substrates with a thermally grown 100 nm thick SiO 2 using a simple shadow mask technique. The final width and length of devices were 800 and 200 um, respectively. The electrical properties of ZnON TFTs are depicted in Figure 2a and b. In transfer curves, the drain voltage was fixed at 0.1 V, while the sweep range of gate voltage was from −50 to 50 V (Figure 2(a)). ZnON TFT exhibits field-effect mobility, threshold voltage, and SS value of 110.26 cm 2 /Vs, 3.25 V, and 1.12 V/dec, respectively. Output curves were obtained where the drain voltage ranges from 0 to 20 V and gate voltage ranges from 0 to 10 V in the steps of 2 V (Figure 2(b)). The output curves show a clear pinch-off and no current crowding.
Driven by the potential applications for complementary configurations, a uniform Te-film is deposited through DC sputtering process at low temperature ( < 25°C) in the presence of argon (Ar) gas flow on SiO 2 /Si substrate, as shown in the 3D layout of Figure  3a. The thickness ( ∼ 10 nm) of the Te-film is confirmed by using AFM, revealing highly uniform film deposition as shown in Figure 3b in terms of microscopy image (upside) and graphical representation (downside). A clear view of Te-film and Si wafer is also shown. To understand the Te-film quality and van der Waals interactions, Raman spectroscopy is measured on the Te sample under an excitation wavelength of 532 nm, showing the A 1 peak at 120.5 (cm −1 ), E 2 peak at 139.1 (cm −1 ) as shown in Figure 3c, revealing the presence of high quality and uniform Te-film. Moreover, the inset of Figure 3c reveals the clear optical view for distinguishing Te-film and SiO 2 wafer, demonstrating high uniformity of the sputtered Te-film.
After the synthesis of uniform Te-film, the Te-based TFT is fabricated using a simple shadow mask technique. The transistor characteristics are then measured in terms of transfer and output curves, as shown in Figure  4a and b, respectively. The fabricated Te-TFT is shown in the inset of Figure 4a in terms of schematic layout and real image. The transfer properties (V GS -I DS ) of the proposed Te-TFT reveal a smooth p-type curve with an I on /I off of ∼ 10 4 and a threshold of 15.5 V at V DS of −5 V (Figure 4(a)). The proposed Te-TFT exhibits carrier mobility of 3.45 cm 2 V −1 s −1 by using the formula μ eff = Lg m /WC ox V DS , where L/W represents the channel length/width of 30/50 μm, gm represents the transconductance, V DS represents the drain voltage and      (Table  S1) to promote understanding of the advantages of the proposed CMOS inverter device. The voltage transfer characteristics were measured at different V DD ranges from 5 V to 20 V with a step of 5 V, revealing a fullswing mode as shown in Figure 5c. In addition, Figure 5d shows the inverter gain of the proposed CMOS inverter device in the range of 5.12-15.89. Here, the gain was extracted from the formula G = abs.dV OUT /dV IN . Next, the time-domain measurement of the CMOS inverter device was measured by applying the pulse of V IN of 20 V, while the output voltage (V OUT ) was analyzed at V DD of 20 V as shown in Figure 5e. Results reveal the high stability and reliability of the inverter swing, consequently enabling low-temperature processed materials to be utilized in the integrated devices for next-generation electronic applications.

Conclusion
The integration of n-type ZnON and Te TFTs has been successfully fabricated at low-temperature for the CMOS inverter. The electrical properties of the proposed ZnON and Te TFTs exhibit high mobility of > 100 cm 2 /Vs and > 3 cm 2 /Vs, respectively, with high on/off current ratio. All the processes to synthesize the channel materials of ZnON and Te are performed at low temperature with uncomplicated processing techniques. The combination of ZnON and Te TFTs results in CMOS inverters with full-swing output properties and high inverter gain. With the advantages of low temperature and easy processing, the reported results may provide new opportunities for circuit designing in the field of integrated electronics.

Disclosure statement
No potential conflict of interest was reported by the author(s).

Funding
This work was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (Grant numbers: 2021R1A6A1A03043682, 2022R1A2C2008273, 2022R1I1A1A 01058825, 2021M3F3A2A03017873).