Investigation and validation of PV fed reduced switch asymmetric multilevel inverter using optimization based selective harmonic elimination technique

Pulse width modulation for Selective Harmonics Elimination (SHE) is mostly employed in the reduction of lower order harmonics. The PV system in this research provides input voltage to the reduced switch 31-level inverter, which is based on the Artificial Bee Colony algorithm. With a high gain DC-DC single-ended primary-inductor converter (SEPIC), the PV panel output voltage is kept constant. The Grey wolf optimization algorithm (GWO) approach is used to get the most power out PV scheme. Multi Carrier modulation, a high-frequency modulation technology, is also used in this novel design of the inverter to reduce upper order harmonics. The suggested Artificial Bee Colony (ABC) algorithm, harmonics is compared to a SHE technique based on a genetic algorithm. The hardware findings were confirmed using DSPIC30F2010 controller simulation, and the recommended system was validated using Matlab simulation.


Introduction
Solar powered stand-alone voltage source inverters have become increasingly popular in low-and mediumpower claims in latest ages. Because of their power electronic circuitry, traditional inverters contain higher order harmonics. The life of electrical and electronic equipment is shortened because of harmonics. A multilevel inverter is used to address the harmonic difficulties [1]. The switching stress and switching loss of power semiconductor circuitry are reduced by using a multilevel inverter (MLI). PV (Photovoltaic) systems have become increasingly important in our daily lives in this century. However, in a PV system, higher order waves are present in the output voltage, as well as in the output power is varied due to natural temperature and irradiance variations. The MPPT method, along with a proper converter, overcomes these limitations. The output voltage of a multilevel inverter is generally regulated by sinusoidal PWM, however, switching losses and Total Harmonic Distortions are slightly higher in high-frequency modulation approaches. The adaptive selective Harmonics Elimination approach overcomes these disadvantages. Here are some existing works of literature that are discussed. The three primary types of multilevel inverters are diode clamped multilevel CONTACT Vivekananda Ganji vivekganji@dtu.edu.et Department of Electrical and Computer Engineering, Debre Tabor University, Debre Tabor, Ethiopia inverters, capacitor type multilevel inverters, and cascaded H bridge inverters. The Cascaded H-Bridge Multilevel Inverter (CHBMLI) is widely utilized of these three types due to its little capacity, compact interchanging pressure and losses, capabilities, and high efficiency. CHBMLI is divided into two types: symmetrical MLI and asymmetrical MLI. In symmetrical MLI, the number of switches used is extremely high. In paper [1], author discussed about reduced switch symmetrical MLI with different values, this topology achieves output voltage with fewer shifts. But high-frequency variation increases the losses. In paper [2] author discussed about the multi-level inverter that reduces the harmonics level but it is suitable only for low-power applications. The numbers of DC voltage sources are reduced by switched capacitor MLI [3]. But here the capacitor induces a voltage stability problem. The high-frequency modulation drawbacks are overcome by selective harmonics elimination technique [4]. But this inverter is not suitable for nonlinear loads.
The input voltage from switched rectifier requires large amount of capacitor bank and also need EB supply. These drawbacks are overcome by [5], PV based cascaded MLI. But the control technique used in this paper is level shifted and phase shifted PWM techniques. The suggested inverter's application regions are reduced using these strategies. Boosting gain inverters is presented in [6,7]. But the number of switches in this topology is large, and the control circuit is likewise complicated.
PV based T-shape inverter has analysed in paper [8]. This inverter is ideal for PV systems that are connected to the grid. MLI with SHE PWM method is used with current source rectifiers in [9]. A current source rectifier, on the other hand, quality while increasing losses. The strategies for removing selective harmonics in general are explained in [10]. This technique will be extremely beneficial in the development of future SHE techniques. To lower the harmonics, various forms of selective harmonics reduction approaches are presented in [11,12]. It is discussed how to remove chosen harmonics using four quadrant operation. in [13][14][15]. The reduction of selective harmonics with a smaller number of DC source based Multilevel Inverters is described. in [16,17]. A SHE technique based on a parallel resultant elimination procedure is used in [18]. The proposed inverter in this technique features a large number of switches. The use of a SHE system and a DC-DC converter to power an MLI is discussed in [19,20]. However, for the boost converter switch, a low gain DC-DC boost converter utilized.
For the removal of unwanted lower order harmonics in the cascaded H-bridge multilevel inverter, a hybrid asynchronous particle swarm optimizationgenetic algorithm (APSO-GA) is proposed (MLI). The APSO-GA is applicable to all MLI levels. The proposed method combines ring topology-based APSO with GA. APSO is used for exploration, while GA is used to extract the best solutions. APSO-GA is used to calculate optimized switching angles for seven-level and ninelevel inverters, and the results are compared to GA, PSO, APSO, bee algorithm (BA), differential evolution (DE), synchronous PSO, and teaching-learning-based optimization (TLBO). The performance of APSO-GA is validated experimentally on a single-phase sevenlevel inverter [21].
A preliminary examination of existing control techniques revealed that selective harmonic elimination pulse-width modulation (SHEPWM) is more capable of removing low-order harmonics. However, the nonlinear transcendental equations used in this technique are difficult to solve, especially for calculus-based methods. Bio-inspired intelligent algorithms (BIAs) appear to be a better approach for solving these complex equations with the advent of powerful and low-cost computers. This review paper explains the basic operation of nine well-known BIAs and discusses their use in inverters for harmonic elimination (HE). The paper covers all of the important information about HE in inverters, which will assist researchers in designing an efficient RE conversion system [22].
Hybrid asynchronous PSO-Newton-Raphson (APSO-NR) algorithm based on selective harmonic elimination pulse width modulation technique for the elimination of undesired harmonics in cascaded H-bridge multilevel inverter. The proposed algorithm works for all levels of MLI with equal and unequal DC sources. The proposed method combines the ring topology-based APSO algorithm with the NR method. APSO was used as a global search technique, while NR was used to refine the best solutions. To eliminate fifth and seventh harmonics, APSO-NR is applied to the seven-level inverter. In simulations, the proposed algorithm's performance is compared to that of the genetic algorithm, the bee algorithm, and particle swarm optimization [23].
The suggested work solves all of the existing issues. The PV system's input voltage converter in this suggested system. The output voltage is fine-tuned using the GWO algorithm-based PI controller. The suggested reduced switch 31-level inverter is provided varied output voltages. High frequency modulation and selective harmonics removal techniques are used to regulate the inverter. In the result and discussion chapter, the THD parameters are shown in the comparison result. Figure 1 depicts 31-level inverter. The PV system's highly oscillated voltage is fed into the DC-DC, which maintains a constant feedback. The GWO method is used to achieve the needed DC output voltage to the multilevel inverter.

Proposed system
The error is sent to the comparator after the reference and actual voltages are compared. The SEPIC Converter's output is used to determine the actual voltage. The PI controller receives the error. decreases the that is used to generate PWM. The GWO algorithm adjusts the proportional and integral gain. To generate a PWM pulse, the reference and carrier signals are compared. The SEPIC Converter receives the PWM pulse. The compact switch multilevel Inverter receives the Converter, which produces four input voltages.
A single H Bridge inverter and a voltage multiplier circuit make up the proposed system's reduced switch multilevel inverter. For a 31-level inverter, the power circuit includes eight MOSFETs and four DC sources.
The multilayer inverter is regulated via Multi Carrier Modulation. High frequency modulation is another name for the MCM technology. THD and considerable techniques. To overcome these challenges, a selective harmonics removal approach based on Artificial BEE colonies is developed, and the results are compared to those of a genetic algorithm.

PV panel modeling
The equivalent circuit which represents one diode model of the PV system is shown in Figure 2. One of the most commonly used solar cell models is the single-diode model, also known as the five-parameter model.
The I-V characteristic of the solar cell is given as follows by the implicit and nonlinear equation. where I L , light current (A); I 0 , diode reverse saturation current (A); R s , series resistance (Ω); R sh , shunt resistance (Ω); n, diode ideality factor (unit less).

SEPIC converter
SEPIC is a DC to DC converter that can function in either step up or step down mode and is extensively used in battery-powered devices by altering the duty cycle of the gate signal of the MOSFET (see Figure 3). We may change the voltage by stepping up or down. It will step up the voltage if the duty cycle is more than 0.5, and it will step down the voltage if the duty cycle is less than 0.5.  A comprehensive comparison of several converters accessible in the literature, such as cuk converter, buck boost, and buck converter, is done in order to verify the suggested sepic converter. Figure 4 shows the parameters such as tracking capabilities and efficiency that are examined using a traditional converter.
SEPIC is not the most efficient or cost-effective, according to the aforementioned assessments.
Buck-Boost and SEPIC converters are excellent for MPPT applications because their operations are not affected by radiation or temperature, allowing them to follow the maximum point.

Grey wolf optimization algorithm
The flowchart of Grey Wolf Optimization Algorithmare shown in Figure 5.

Proposed system reduced switch MLI
A suggested 31-level inverter consists of four switches S1-S4, and four diodes D1-D4. In the positive half cycle, 15 levels of voltage are created, and in the negative half cycle, 15 levels of voltage are produced Table 1.

PWM generation (a) Multi carrier modulation
Basic multicarrier modulation approach has been at first. The 50 Hz reference sinusoidal signal is compared  to 15 carrier signals with a switching frequency of 10 kHz. The output voltage levels of the suggested topology are varied using the modulation index M.I. The angle generation for the suggested reduced switch 31-level multi-level inverter is shown in Figure 6.
Modulation index of the proposed 31-level inverter is, V carr -Peak value of the carrier signal amplitude. V ref -Peak to peak value of the reference signal.

(b) Selective harmonic elimination technique
The inverter's output voltage may be stated as follows using harmonic elimination theory: where V n -(0 < = θ i < = π/2). Since even order to be zero      where n = 1, 3, 5, 7 Shortly cos(nθ 1 ) for odd ns 0 f o r e v e n n s The planned 31-level inverter is intended to reduce harmonics by up to 15 orders.

Results and discussion
In a Matlab simulation, the proposed work has been implemented, with DSPIC30F2010 controller as the hardware.
The characteristics of the solar panel utilized in this system are shown in Table 2.
The Figure 8a shows the Matlab simulation output voltage from the solar PV panel and figure 8b shows the corresponding hardware result of solar PV panel output voltage waveform.
The SEPIC converter produces four DC voltages in the range of 6, 12, 24, and 48 V, The SEPIC converters' ratings are listed in Table 3. Figure 9 shows the input DC voltages simulated using Matlab software in the ranges of 6, 12, 24, and 48 V. Figure 10 shows how input DC voltages in the range of 6, 12, 24, and 48 V are created with the aid of a controller for developing a laboratory prototype.  The multilayer inverter is controlled using the multicarrier modulation method (MCM). A PI controller is used to create the reference signal. Figure 12 presents the Matlab simulation output and corresponding FFT analysis of proposed 31-level inverter by using multi carrier modulation (MCM) technique and FFT analysis are made and total harmonic distortion (THD) 3.37% Table 4 shows the various firing angles created by the evolutionary algorithm and the Artificial BEE colony-based selective harmonics removal approach. The proposed Artificial BEE colony based SHE optimization technique gives the best firing angle compared to the genetic algorithm based angle generation approach. Using the DSPIC30F2010 controller, the suggested multilayer inverter is given this firing angle obtained by the ABC-SHE approach. Figure 13 shows the Matlab simulation and hardware output voltage and FFT analyse of the proposed 31-level inverter using Artificial Bee colony based SHE Elimination technique and FFT analysis are made and total harmonic distortion (THD) 3.13% < 5% THD value which satisfies IEEE519 harmonic standard. Figure 14 shows the Matlab simulation and hardware output voltage and FFT analyse of the proposed 31-level inverter using Genetic algorithm based SHE Elimination technique and FFT analysis are made and total harmonic distortion (THD) 3.21%.
The hardware experimental laboratory prototype is being carried out to test the system performance with the help of DSPIC30F2010 controller. It is observed that the total harmonic distortion is 5.18% to closely match with the simulation results and proposed ABC

Conclusions
Selective Harmonics Elimination PWM based on the suggested Artificial Bee Colony method is mostly utilized to remove lower order harmonics. Using a high gain DC-DC SEPIC converter, the GW gets the most power from the PV system. Multi carrier modulation is used to design and assess the decreased switch suggested 31-level inverters. Finally, the THD's of the two SHE approaches and the techniques for high-frequency modulation are compared; the ABC SHE technique generates fewer harmonic content other than two procedures. The suggested system has been confirmed by Matlab simulation, and the hardware results have been verified using controller.