Reducing contact resistance in ferroelectric organic transistors by buffering the semiconductor/dielectric interface

Charge injection at the metal/organic contact is one of the most crucial issues in the development of organic field-effect transistors (OFETs).^1,2 A large contact resistance (R_c) can cause serious impacts on device performance, such as the low carrier mobility extracted from the transfer curves,³ superlinearity in the output characteristics,⁴ and extra power consumption with heat generation at the metal contact region.⁵ A large variety of methods have been successfully proposed thus far for the enhancement of the charge injection from the metal to the conducting channel in OFETs, such as materials engineering for contact electrodes^6–8 and inserting layers that can either tune the work function or dope the contact region.^9–11 However, charge injection is surprisingly seldom studied in Fe-OFETs, although they have received intensive attention for various non-volatile memory device applications.^12–15 Few studies have been conducted because Fe-OFETs have long been suffering from low charge carrier mobility. Such a limiting factor has been recently overcome by our interfacial buffering method, which inserts an ultrathin poly(methyl methacrylate) (PMMA) between the ferroelectric gate insulator and organic semiconductor layers. A high carrier mobility of 4.6 cm²/V s was obtained.¹⁶ The challenging issue of charge injection should be carefully considered for the further development of Fe-OFETs.

In this letter, the contact resistance of Fe-OFETs was significantly reduced to 55 kΩ cm by our interfacial buffering method using poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)) as the gate dielectric. By contrast, the device without buffering exhibited a significantly larger contact resistance of 260 kΩ cm. Such a reduction in contact resistance was mainly due to the buffering of the polarization fluctuation at the semiconductor/ferroelectric interface, which can energetically broaden the trapped charge distribution in the contact region of the organic semiconductor. These results implied that the proposed method can efficiently lower the contact resistance in Fe-OFETs and is beneficial for the further development of Fe-OFETs.

Bottom-gate top-contact Fe-OFETs were fabricated on an n-doped silicon substrate with a thermally grown SiO₂ layer. Bottom gate electrodes were formed through the successive thermal evaporation of Ti (3 nm) and Au (20 nm). The polymeric ferroelectric material P(VDF-TrFE) (Fig. 1(a)) was dissolved in 2-butanone with a concentration of 3 wt. %. The P(VDF-TrFE) solution was spin-coated onto the Si/SiO₂ substrates (500 rpm for 5 s and 1500 rpm for 30 s). The P(VDF-TrFE) film was annealed in a vacuum chamber at 120 °C for 2 h. For the buffering process, PMMA (Sigma-Aldrich, MW = 996k) was dissolved in anisole with a concentration of 0.1 wt. %. The solution was spin-coated onto the P(VDF-TrFE) film (500 rpm for 5 s and 4000 rpm for 60 s) and soft baked at 90 °C for 10 min. The organic semiconductor of dioctylbenzothienobenzothiophene (C₈-BTBT) (Fig. 1(b)) was thermally evaporated at a deposition rate of ∼0.1 Å/s to obtain a 30 nm-thick film in polycrystalline phase. Finally, MoO₃ (3 nm) and Au (35 nm) were successively evaporated to form the source and drain electrodes. The channel width (W) was 1000 μm, and the channel length (L) ranged from 50 μm to 250 μm (Fig. 1(c)). Atomic force microscopy (AFM) measurements were performed using an SPA-400 scanning probe microscope controlled by SPI 4000 probe station (Seiko Instruments, Inc.). The electrical performances of the Fe-OFETs were characterized under ambient conditions using an Agilent 4156C semiconductor parameter analyzer.

The ferroelectric property of P(VDF-TrFE) stems from the flexibility of the molecular axis, enabling the change in the dipole moment direction.¹⁷ Given that ferroelectricity originates from the crystalline phase, an annealing treatment of P(VDF-TrFE) is necessary to increase the degree of crystallinity.¹⁸ Figures 2(a) and 2(b) show the AFM morphology images of the surfaces of thermally annealed P(VDF-TrFE) without and with the PMMA buffering layer, respectively, both exhibiting as polycrystalline films with similar needle-like domains and roughness. The electrical performances of our Fe-OFETs were characterized with a double sweep mode of forward and reverse directions in the gate voltage (V_g) at the source-drain voltage (V_ds) of −2 V. The red and blue lines in the inset of Fig. 3(a) present typical transfer curves of the Fe-OFETs without and with the PMMA buffering layer, respectively. Clockwise hysteresis obtained in each transfer curve stems from the ferroelectric property of the dielectric layer. As presented in our previous work, the PMMA buffering layer can significantly enhance the field-effect mobility (μ_FET) to 4.6 cm²/V s, whereas the device without buffering exhibited a only low μ_FET of 0.55 cm²/V s.¹⁶ Such an improvement in μ_FET is attributable to the PMMA buffering effect, which eliminates the scattering of charge carriers additionally induced by the polarization fluctuation at the semiconductor/ferroelectric interface.

In the present work, inserting a PMMA buffering layer can also significantly reduce the contact resistance in Fe-OFETs. In an investigation on contact resistance, the built-in polarization in the P(VDF-TrFE) layer was aligned by applying a V_g pulses of −30 V for 1 s. We selected the transfer curves when V_g was swept in a reverse manner from negative to positive voltage (i.e., red and blue lines in Fig. 3(a)), in order to avoid the switching process of the ferroelectric layer in a relative large V_g range from −30 V to ∼10 V. The contact resistance of each Fe-OFET was extracted using the modified transmission-line method (M-TLM)¹⁹ 

where R_totW is the value of the total resistance, μ_ch is the channel mobility, V_g is the gate voltage, V_th is the threshold voltage, C_i is the capacitance of the dielectric layer per unit area, and R_cW is the value of the contact resistance. In M-TLM, the value of the contact resistance is calculated from the slopes of the fitting lines in the plot of R_totW/L versus 1/L. It can lead to a negligible device-to-device variation. In Figs. 3(b) and 3(c), the plots show R_totW/L with respect to 1/L for the Fe-OFETs without and with PMMA buffering layer, respectively. As illustrated in Fig. 3(d), the R_cW value in the Fe-OFET that employs PMMA buffering is significantly reduced to 55 kΩ cm, whereas that in the Fe-OFET without buffering exhibits a significantly larger contact resistance of 260 kΩ cm (V_g − V_th = −20 V).

The contact resistance in a transistor includes the resistance at the metal/organic interface (interface resistance, R_int) and the resistance at the access region (access resistance, R_acs), where charge carriers transport from the metal/semiconductor interface to the conducting channel.^20,21 In our work, not only were the electrode materials but also the crystalline and surface properties of the organic semiconductors nearly the same.¹⁶ Meanwhile, the MoO₃ inserting layer between Au and C₈-BTBT can greatly enhance the charge injection into the organic layer.²² Therefore, the reduction of contact resistance in our Fe-OFETs is related to the lowering of R_acs.^1,8,23

The mobility of charge carriers in the access region (μ_acs) follows an empirical V_g dependence, given as:^24,25

where A₀ is a constant and α is related to the electrical property of the organic semiconductor. Thus, R_acs can be expressed as²⁶ 

where D is the film thickness and A is a constant. Our results imply a V_g-dependent mobility. In addition, our previous work shows that the thermally evaporated C₈-BTBT layer exhibited a highly crystalline property. And the transfer curves also exhibited high carrier mobility. Because multiple trap and release (MTR) model is often used to describe the charge transport in high-mobility organic semiconductors,²⁷ it is a suitable one used to study the electrical behavior in the access region in our Fe-OFETs. Therefore, μ_acs can be expressed as

where σ_f is the free surface charge density, σ is the trapped surface charge density, N_c is the effective density of traps, N_t0 is the total density of traps, and T is the temperature. T_c represents the steepness of the energetic distribution of traps.²⁷ Therefore, from Eqs. (2) and (4), α is equal to (T_c/T − 1).

Figure 4 presents the extracted contact resistance (R_cW) versus V_g − V_th characteristics of the Fe-OFETs without and with PMMA buffering. In regions A and B, the external electrical field through the dielectric layer is at the same and opposite directions, respectively, with the orientation of the dipole moments in the ferroelectric layer (inset of Fig. 4). The linear fitting lines indicate a relationship between R_cW and V_g − V_th, as expressed by Eq. (3), and the slope of the fitting line is (−α − 1). This further confirms that the reduction in contact resistance is dominated by the lowering of R_acs. The value of the slope can characterize the energetic distribution of the trapped charge because α is equal to (T_c/T − 1). As shown in Fig. 4, both the slopes of the fitting lines of Fe-OFETs without and with PMMA buffering yield smaller values in region B than those in region A because of the manipulation effect of the external electric field on the ferroelectric gate dielectric.^28–30 Moreover, the slope is reduced by 0.06 from region A to B for the ferroelectric transistor without PMMA, and it decreases slightly from region A to B for the device with interfacial buffering. This reveals that the interfacial buffering also weakens the effect of the external electric field. Moreover, by inserting a PMMA buffering layer, the slope decreases from 0.71 to 0.62 in region A and from 0.65 to 0.60 in region B. These results indicate that buffering the polarization fluctuation at the semiconductor/ferroelectric interface can narrow the energetic distributions of the charge carriers in the access region (Figs. 5(a) and 5(b)). Thus, the density of the free charges at the access region increases through the PMMA buffering effect, thereby lowering the resistance at the access region and reducing the contact resistance. Similar studies also show the strong influence of the gate dielectric interface on the contact resistance.^31,32

In summary, the contact resistance in Fe-OFETs was significantly reduced by using an ultrathin PMMA layer inserted between the ferroelectric polymer and organic semiconductor layers. Our investigations revealed that such an enhanced charge injection was due to the narrowing of the trap distribution in the access region of Fe-OFETs after buffering the interfacial polarization fluctuation. This work demonstrated that the effect of the dielectric layer is critical in the injection of charges from electrodes to the conducting channel and provided an efficient method of lowering the contact resistance in Fe-OFETs.

We would like to express our appreciation to Dr. Koichi Ikeda from Nippon Kayaku for providing C₈-BTBT. This study was supported partially by 973 projects under Grant Nos. 2013CBA01600 and 2013CB932900, NSFC under Grant Nos. 61306021, 61204050, and 61229401, NSFJS under Grant Nos. BK20130579, KB2011011, and BK20130055, and Open Partnership Joint Projects of NSFC-JSPS Bilateral Joint Research Projects under Grant No. 61511140098.