HARDWARE BASED CHARACTERISATION OF LV INVERTER FAULT RESPONSE

This paper presents the experimental testing of commercial LV-connected PV inverters to characterise their behaviour during fault conditions. Understanding this behaviour is critical for the proper design and operation of distribution networks with a large amount of inverter-connected generation. Hardware test results for a number of different inverters are discussed and compared. The challenges for modelling, particularly with respect to fault conditions, are discussed with an example simulation.


INTRODUCTION
An increasing number of inverter interfaced generation is being connected to the distribution grid, necessitating a better understanding of the performance of these inverters during network disturbances.This is particularly important when performing system studies using outdated or outright invalid assumptions about inverter behaviour during such disturbancesan aspect that is exacerbated by the seemingly inconsistent behaviour across inverters from different manufacturers.It is thus important to understand said behaviour using empirical data that is obtained through means of physical testing of off-the-shelf inverter hardware.
The literature has reported a number of simulation and hardware based studies that detail the response of inverters to fault conditions.For example, the work reported in [1] reported on simulation studies based on manufacturer supplied models.This showed the influence of retained voltages on the inverter output.The reported fault contribution of the inverters did not exceed 1.2pu of inverter rating, while some inverters maintained pre-fault current output levels.A PSCAD inverter model behaviour which was validated using hardware testing of an inverter is presented in [2].It reports a slight and sustained increase in current contribution during a fault where the pre-fault inverter loading was at 1pu of its rating.Inverter fault response was tested using a power electronic grid simulator as reported in [3].The authors reported an inverter fault current contribution of 178%-200% lasting for about 9 cycles at 60Hz.A number of guidelines exist for developing inverter models or limiting their fault contribution when connected to the network.For example, guidelines for connecting inverter interfaced generating plant connected to the Medium Voltage (MV) network in Germany assume 100% rated current during fault.Where this is expected to be exceeded and would have an impact on the network, an agreement must be reached between the generator and network operator [4].The Western Electricity Coordinating Council (WECC) provides guidelines and a specification for developing generic dynamic simulation models for transmission connected PV inverters or aggregated distribution connected PV inverters [5,6].This paper presents the main experimental results from testing commercial off-the-shelf LV PV inverters at the Power Networks Demonstration Centre (PNDC) [7].The paper describes the test setup including the inverters under test, the test network configuration and applied fault conditions.This is followed by a summary of the main characteristics of the inverter behaviour observed during testing.Finally, the results of a simulation designed to mimic one of the PNDC test scenarios are presented and compared with the experimental results.

Inverters under test and test environment
Four commercially available LV PV inverters were tested, as summarised in Table 1.[8,9].Single phase inverters were connected to the A phase and only P-E faults were applied in this case.

Test findings
In total, 88 fault tests were performed across all inverters.Due to space limitations, this section will summarise the main findings and illustrate them with selected examples from the test measurements (the full test report can be requested directly from the PNDC).

ABB inverter behaviour
During a fault, the inverter attempts to maintain the prefault output power as set by the PV emulator depending on the retained voltage level.This is achieved by increasing the current output of the inverter for the duration of the fault.This is only the case when the retained inverter voltage is at 62.6% of nominal or above.However, the increase in current output does not occur when the inverter is operating at 100% power output rating pre-fault.With lower retained voltages, the inverter maintains the prefault current output levels unless the fault is a solid short circuit.At a retained voltage of 32%, the output current is reduced slightly from its pre-fault level.Whereas the prefault current level is maintained with a retained voltage of 47% during a fault.Upon post-fault voltage recovery, the output current returns to its pre-fault level.With a solid phase to earth fault, the output current ceases to be sinusoidal for a few cycles after fault inception then current injection stops.In this case, the current output does not resume immediately after post fault voltage recovery.
Figure 2 shows the instantaneous and RMS values of measured inverter voltage and current, measured grid side current and calculated inverter real and reactive power output for a solid fault test case.The instantaneous voltage and current are depicted in blue, while the RMS values are in red.Active and reactive powers are shown in blue and red respectively.Note that the grid current prior to the fault is equal to the inverter current output so it appears very small due to the graph scale.The test case parameters are as indicated in the figure caption, where Pout is the pre-fault inverter active power output and Rf is the fault resistance.
The RMS and power values are calculated using a Simulink library which requires one cycle of input to produce a result.This is why these values are at an initial value zero in the results graphs.

KACO inverter behaviour
During the majority of fault scenarios, the current output generally increases regardless of retained voltage.With a retained voltage of 46.6% and above, the inverter attempts to retain the pre-fault power output levels.During some of the tests, the inverter stops injecting current after several cycles of fault inception.During this condition, it can be observed that the reactive power output is increasing over time.This can also be accompanied by a phase angle jump of the current that causes a step reduction of reactive power output.A gradual increase of reactive power output then ensues unless the current output stops.This adjustment of current angle and reactive power output may be symptomatic of a device limit being breached for which the inverter controls react.Generally, the inverter is capable of increasing its current output to maintain pre- fault power (bearing in mind that the maximum pre-fault loading of this inverter was 80% of its rating due to issues with the DC side supply).In cases were the current injection stops during the fault, the current does not resume immediately after post fault voltage recovery.As an example, Figure 3 shows the measurements for a resistive fault test with a retained voltage of 31.9%.This is one of the tests where the inverter stops injecting current.Note the gradual increase in reactive power before it goes to zero.

SMA (single phase) inverter behaviour
During a fault, with a retained voltage of 77.2% of nominal and above, the inverter attempts to maintain the pre-fault output power determined by the PV emulator.This is manifested by an increase in current output.This is true when the inverter is operating at 50% of rated power.
During tests where the inverter is operating at 100% of rated power, the inverter does not increase its current output.For retained voltages lower than 62.2% of nominal, the inverter current output is sustained for up to around 1.5 cycles then stops.In this case, the current output does not resume immediately after post fault voltage recovery.Figure 4 shows the measurements for a resistive fault test with a retained voltage of 77.2%.Note that in this case, with a high retained voltage and the inverter at full power, the inverter current continues at its pre-fault value.

SMA (three phase) inverter behaviour
During phase to earth faults, the inverter ceases to output current if the retained voltage falls below 55.4%.At a retained voltage of 70.7%, the inverter attempts to maintain the pre-fault power by increasing the current output of a healthy phase (phase B).During multi-phase faults, the inverter does not sustain the current output for the tested scenarios and the inverter does not resume current injection immediately after post fault voltage recovery.Figure 5, Figure 6 and Figure 7 show the measurements for a resistive fault test with retained voltages (measured on the A phase) of 72.7%, 50.9% and 67.1% respectively.Instantaneous voltages and current as well as phase active powers are depicted in red, green and blue.RMS values and phase reactive powers are depicted in brown, black and grey.

SIMULATION STUDIES
A model of the PNDC test network was built in the PowerFactory analysis software (v15.2.5).The generic PV template available in the PowerFactory library was configured to represent a 3-phase, 10kVA PV inverter.
Only the power rating was adjusted; all other parameters (of which there are more than 50 across 11 blocks within the PV model) were left as their default values.Some simple preliminary studies were performed to explore the behaviour of this generic library model and compare it with what was observed in the hardware tests.The results shown below are for a single-phase to ground fault on phase A with a resistance of 1.5Ω.The initial power output of the PV generator is set to 3kW, and so the studies are comparable with those shown in Figure 5.The same model was used to run both an electromagnetic transient (EMT) and unbalanced root mean squared (RMS) simulation.A steady state short circuit analysis was also performed.
Figure 8 shows the inverter voltage and current in the EMT simulation, for the red, green and blue phases.The fault is on the red phase.The voltage waveforms are very similar to those in Figure 5 except there is evidence of very fast transient phenomena at 0.1 and 0.4 seconds when the fault is applied and removed.The inverter current waveform appears similar with only the faulted phase showing an increase in current output.In the simulation the remaining healthy phases retain a clean sinusoidal output; in the hardware test case these waveforms are distorted.Also, hardware testing showed that the inverter increased the current output in one of the healthy phases rather than the faulted phase.

Figure 8 PowerFactory simulation EMT results
Figure 9 shows the inverter voltage and current in the unbalanced RMS simulation, again for the red, green and blue phases.The voltage dip on the faulted red phase is clear.The simulation indicates that all three phases of the inverter current move together and increase by approximately 9% from their pre-fault value before dropping.This is somewhat inconsistent with the EMT results, suggesting that the EMT and RMS models are not directly comparable, or that the PV model is not suitable for unbalanced RMS simulation.

Figure 9 PowerFactory simulation RMS results
The steady state short circuit study was run using the PowerFactory Complete method with the PV generator modelled as an equivalent synchronous machine with Ik"=Ik'=14.43376kA, which is rated current.The limitations of this approach are clear but this is still the most practical method when there are very large numbers of generators, as in the large-scale short-circuit analysis routinely performed by network operators.The singlephase to earth fault with resistance 1.5Ω resulted in a voltage on the faulted phase of 190V and fault currents of Ik"=Ik'=4.35kAon all three phases of the inverter.The PowerFactory documentation notes that the standard short circuit methods cannot give precise results for a controlled PV system and suggest that dynamic simulations are necessary.

GENERALISING INVERTER BEHAVIOUR
From the observations related to all tested inverters, there is no clear impact of PoW fault inception on the sustained behaviour of the inverter output current during the fault.
For faults introduced at 90° of the phase A voltage, the inverters' current output experiences a short transient increase.When the inverters stop current output as described in the different scenarios above, it is not clear if the inverter's internal protection is operating or the inverter is merely stopping current injection.This is because the inverters do not provide a clear alarm or indication regarding the trip or the status of the connection.
From the network protection point of view, the presence or absence of a current injection is the parameter of greatest interest during fault conditions.From the wider system operation perspective, it is concerning that the inverters display inconsistent and unexplained behaviours in terms of fault ride through.Furthermore, the current injection does not resume immediately after post fault voltage recovery.This suggests that further effort is required to achieve common understanding of capabilities and performance requirements which are heavily influenced by controller design and internal capacitive and inductive components.
Paper 0330 CIRED 2017 5/5 It can be argued that there is value in developing a generic tuneable inverter model whose parameters can be adjusted to represent specific designs or network operating conditions.In order to develop such model, a comprehensive inverter hardware test should be designed to extract sufficient characteristics to tune this model.This includes identifying the retained voltage boundaries at which the inverters begin to exhibit different behaviours.These characteristics would then have to be translated into the required data to be provided by customers for all new inverter connections.This would then give network operators the information necessary to model inverter behaviour accurately.
Furthermore, there is potentially a need to stipulate more consistent inverter behaviour across all manufacturers that would facilitate grid planning and operation.Otherwise, grid operators will be faced with a difficult task managing connected inverter behaviour, as demonstrated by this small sample of tests.

CONCLUSION
This paper presented the main findings from the experimental testing of LV connected PV inverters during fault conditions.Inverters from different manufacturers exhibited a wide range of behaviours, but the following common features of behaviour have been observed:  Inverters are more likely to provide a sustained current contribution with a higher retained voltage.A voltage drop of 38% is sufficient for some of the inverters to cease current injection. Inverters tend to increase their current output to maintain the pre-fault active power output provided that the inverter is within its rating limits. No increase in current over the inverter rating has been observed as reported in some of the literature.
The simulation examples illustrate some of the problems faced by network operators when modelling the fault response of inverter-interfaced generation:  Generic models can have a very large number of parameters and tuning them to represent specific types of inverter is difficult, and impractical for the smallest devices connected at LV.  Different models or different configuration of models may be necessary depending on the type of analysis being performed. The current data submitted as part of the ENA New Generator Application Form process does not allow for the detailed modelling of the LV inverters With the volume of LV-connected PV and other inverterinterfaced generation continuing to grow, it is important that the responses of such devices in fault conditions is well understood.The tests described here indicate that there can be significant differences between devices.Some of the modelling challenges have been illustrated.Further work is required, across the industry, to ensure that the capabilities and performance requirements for this type of generation are widely understood.
The authors believe that some level of standardisation with regards to inverter fault response would be a very positive development as it would help to develop more representative models and thus assess the aggregate impact on the existing network.

Table 1
PV inverters under test (detailed parameters can be obtained from manufacturer data sheets available online) is to ensure that the inverter built-in under-voltage protection does not operate during the test.Inverters trip after 0.5s if the voltage drops below nominal by 20% as stipulated by G83 and G59 engineering recommendations